CN106328076B - Bidirectional scanning gate driving module - Google Patents
Bidirectional scanning gate driving module Download PDFInfo
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- CN106328076B CN106328076B CN201510367150.0A CN201510367150A CN106328076B CN 106328076 B CN106328076 B CN 106328076B CN 201510367150 A CN201510367150 A CN 201510367150A CN 106328076 B CN106328076 B CN 106328076B
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- 230000002457 bidirectional effect Effects 0.000 title abstract 2
- 230000002146 bilateral effect Effects 0.000 claims description 34
- 206010010144 Completed suicide Diseases 0.000 claims description 22
- 239000003990 capacitor Substances 0.000 claims description 13
- 230000006641 stabilisation Effects 0.000 claims description 12
- 238000011105 stabilization Methods 0.000 claims description 12
- 230000008878 coupling Effects 0.000 claims description 7
- 238000010168 coupling process Methods 0.000 claims description 7
- 238000005859 coupling reaction Methods 0.000 claims description 7
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- 102100040844 Dual specificity protein kinase CLK2 Human genes 0.000 description 17
- 101000749291 Homo sapiens Dual specificity protein kinase CLK2 Proteins 0.000 description 17
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- 101000749304 Homo sapiens Dual specificity protein kinase CLK3 Proteins 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 4
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- 238000010304 firing Methods 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 102100040858 Dual specificity protein kinase CLK4 Human genes 0.000 description 1
- 101000749298 Homo sapiens Dual specificity protein kinase CLK4 Proteins 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
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Abstract
本发明公开了一种双向扫描闸极驱动模块，其包含一第一扫描电路与一第二扫描电路。第一扫描电路根据一顺向信号与一第一频率信号或者根据一反向信号与第一频率信号产生一第一扫描信号；第二扫描电路根据顺向信号与一第二频率信号或者根据反向信号与第二频率信号产生一第二扫描信号。当闸极驱动模块为一顺向扫描时，顺向信号为一第一电压，反向信号为一第二电压，顺向信号充电第一扫描电路与第二扫描电路以进行顺向扫描，当闸极驱动模块为一反向扫描时，顺向信号为第二电压，反向信号为第一电压，反向信号充电第二扫描电路与第一扫描电路以进行反向扫描。
The present invention discloses a bidirectional scanning gate drive module, which includes a first scanning circuit and a second scanning circuit. The first scanning circuit generates a first scanning signal according to a forward signal and a first frequency signal or according to a reverse signal and a first frequency signal; the second scanning circuit generates a second scanning signal according to the forward signal and a second frequency signal or according to the reverse signal and the second frequency signal. When the gate drive module is a forward scan, the forward signal is a first voltage, the reverse signal is a second voltage, and the forward signal charges the first scanning circuit and the second scanning circuit to perform a forward scan. When the gate drive module is a reverse scan, the forward signal is a second voltage, the reverse signal is a first voltage, and the reverse signal charges the second scanning circuit and the first scanning circuit to perform a reverse scan.
Description
Technical field
The present invention relates to a kind of gate drive modules, especially with respect to a kind of bilateral scanning gate drive module.
Background technique
TFT thin film transistor monitor has become the mainstream of display sci-tech product now, when being applied especially on mobile phone, has
The advantages that lightly and being convenient for carrying.In panel operation, each gate drive circuit can be connected to respective scan line, and scan line
Pulse signal can be sent out according to timing, this pulse can open all transistors of scan line, so as to by liquid crystal voltage data from number
Liquid crystal capacitance is sent into according to driving circuit.In this way, control liquid crystal penetration and reach the display effects of different brightness, this is gate
The function of driving circuit.
However after liquid crystal voltage data are transmitted, scan line must discharge via discharge path, and by the crystalline substance at panel
Body pipe is closed, and in order to reach the scan line velocity of discharge of needs, the size of the transistor of discharge path has to greatly, this can make
Increase at the layout area of gate drive circuit.
In addition, general gate drive circuit can have the transistor for generating firing current at any time, so this transistor
It will increase the consumption of overall power.In addition, in resolution panels, the charging time of each scan line is shorter, so must
The load on the charge path to charge to scan line must be reduced, when reducing rising of the load on charge path to charge and discharge when
Between promotion with fall time.
In view of the above problems, the present invention proposes a kind of bilateral scanning gate drive module.
Summary of the invention
An object of the present invention is to provide a kind of bilateral scanning gate drive module, can promote scan line charge and discharge
Speed reduces layout area and reduces power consumption.
In order to reach the goals above, the present invention provides a kind of bilateral scanning gate drive modules, have multistage gate
Driving circuit, every level-one gate drive circuit have multiple scanning circuits, and multiple scanning circuits include one first scanning circuit, one
Second scanning circuit and a noise suicide circuit, wherein first scanning circuit receives forward signal, a reverse signal and 1 the
One frequency signal, and one first scanning signal is generated according to forward signal and first frequency signal, or according to reverse signal with
First frequency signal generates the first scanning signal；Second scanning circuit receives forward signal, reverse signal and a second frequency
Signal generates one second scanning signal according to forward signal and second frequency signal, or according to reverse signal and second frequency
Signal generates the second scanning signal；Noise suicide circuit couples first scanning circuit and second scanning circuit, receive this first
Frequency signal, reduces the noise of first scanning circuit and the noise of second scanning circuit, which includes a control
Unit processed, the control unit receive the control that the first frequency signal, the second frequency signal, first scanning circuit generate
One control signal of signal and second scanning circuit, control signal and the second scanning electricity which generates
The control signal that road generates controls noise suicide circuit not enabled antinoise work, the first frequency signal and the second frequency
Signal controls the noise suicide circuit and enables antinoise work, when bilateral scanning gate drive module forward scans for one, forward
Signal is a first voltage, and reverse signal is a second voltage, forward signal the first scanning circuit of charging and the second scanning circuit
Forward to be scanned, when bilateral scanning gate drive module is a reverse scan, forward signal is second voltage, reversed to believe
It number is first voltage, reverse signal charges the second scanning circuit and the first scanning circuit to carry out reverse scan.
In one embodiment of this invention, the first order gate drive circuit in the multistage gate drive circuit includes to be somebody's turn to do
First scanning circuit, which includes:
One setup unit, receiving an initial signal, forward signal, the initial signal control the setup unit with this, so that should
Forward signal is charged and generates a control signal；
One driving unit couples the setup unit, receives the control signal and the first frequency signal, the control signal and
The first frequency signal controls the driving unit and generates first scanning signal
In one embodiment of this invention, which drives first scanning signal to mention according to the first frequency signal
A tertiary voltage is risen to, which drives first scanning signal to be reduced to one the 4th electricity according to the first frequency signal
Pressure, the tertiary voltage are higher than the 4th voltage.
In one embodiment of this invention, which includes:
One first setting element, has an input terminal, a control terminal and an output end, which, which receives this, forward believes
Number, which receives the initial signal, which couples the driving unit, and the first setting element is according to the initial signal
And this forward signal generates the control signal；And
One second setting element, has an input terminal, a control terminal and an output end, which receives the reversed letter
Number, which receives the third scanning signal that a second level gate drive circuit generates, which couples the driving list
Member, the second setting element set the control signal according to the third scanning signal and the reverse signal.
In one embodiment of this invention, which includes:
One driving element, has an input terminal, a control terminal and an output end, which receives first frequency letter
Number, which couples the setup unit, which couples one first scanning circuit in a second level gate drive circuit,
The driving element generates first scanning signal according to the first frequency signal and the control signal；And
One capacitor is coupled between control terminal and the output end in the driving element, according to the control signal and
The voltage of the first frequency signal boost first scanning signal.
In one embodiment of this invention, which includes:
One the first transistor, has an input terminal, a control terminal and an output end, which couples the first scanning electricity
Driving unit in road, the control terminal couple the control unit, which couples a reference voltage, which makes this
The voltage stabilization of one control terminal of the driving unit in the first scanning circuit is in the reference voltage；
One second transistor, has an input terminal, a control terminal and an output end, which couples the first scanning electricity
The driving unit in road, the control terminal couple the control unit, which couples the reference voltage, which makes
The voltage stabilization of one output end of the driving unit in first scanning circuit is in the reference voltage；
One third transistor, has an input terminal, a control terminal and an output end, which couples the second scanning electricity
A driving unit in road, the control terminal couple the control unit, which couples the reference voltage, which makes
The voltage stabilization of one control terminal of the driving unit in second scanning circuit is in the reference voltage；And
One the 4th transistor, has an input terminal, a control terminal and an output end, which couples the second scanning electricity
The driving unit in road, the control terminal couple the control unit, which couples the reference voltage, and the 4th transistor makes
The voltage stabilization of one output end of the driving unit in second scanning circuit is in the reference voltage.
In one embodiment of this invention, which also includes:
One protection location, have an input terminal, a control terminal and an output end, the input terminal couple the first transistor,
The second transistor, the third transistor and the 4th transistor, the control terminal receive a third frequency signal, the output end coupling
The reference voltage is connect, the protection location is according to the third frequency signal and periodically by the first transistor, second crystal
The control terminal of pipe, the third transistor and the 4th transistor is maintained at the reference voltage.
In one embodiment of this invention, which receives a third frequency signal, the third
Frequency signal controls first order gate drive circuit electric discharge and a second level in the bilateral scanning gate drive module simultaneously
Gate drive circuit charging, the first frequency signal control the second level gate in the bilateral scanning gate drive module simultaneously
Driving circuit electric discharge is charged with a third level gate drive circuit.
Detailed description of the invention
The schematic diagram of embodiment when Figure 1A is bilateral scanning gate drive module scans provided by the invention；
The schematic diagram of another embodiment when Figure 1B is bilateral scanning gate drive module scans provided by the invention；
Fig. 2 is the circuit diagram of an embodiment of the gate drive circuit in Figure 1A of the present invention；
Fig. 3 is the timing diagram of one embodiment of gate drive circuit when the present invention forward scans；
Fig. 4 is the circuit diagram of an embodiment of the gate drive circuit in Figure 1B of the present invention；
The timing diagram of one embodiment of gate drive circuit when Fig. 5 is reverse scan of the present invention.
Description of symbols: 1- first order gate drive circuit；The second level 2- gate drive circuit；3- third level gate drives
Dynamic circuit；4- fourth stage gate drive circuit；5- level V gate drive circuit；The 6th grade of gate drive circuit of 6-；10- setting
Unit；11- driving unit；12- setup unit；13- driving unit；14- control unit；15- antinoise unit；16- antinoise
Unit；A0- initial signal；A1- controls signal；A2- controls signal；C1- capacitor；C2- capacitor；C3- controls signal；
CLK1- first frequency signal；CLK2- second frequency signal；CLK3- third frequency signal；The 4th frequency signal of CLK4-；M1-
One setting element；M2- second sets element；M3- driving element；M4- second transistor；M5- the first transistor；M6- third is set
Determine element；M7- the 4th sets element；M8- driving element；The 4th transistor of M9-；M10- third transistor；M11- transistor；
M12- transistor；M13- transistor；M14- transistor；M15- protection location；REF- reference voltage；S0- initial signal；S1-
Scan signal；The second scanning signal of S2-；S3- third scanning signal；The 4th scanning signal of S4-；The 5th scanning signal of S5-；
The 6th scanning signal of S6-；The 7th scanning signal of S7-；The 8th scanning signal of S8-；The 9th scanning signal of S9-；S10- the tenth is scanned
Signal；The tenth scan signal of S11-；The 12nd scanning signal of S12-；T1- first interval；T2- second interval；T3- third area
Between；The 4th section T4-；The 5th section T5-；The 6th section T6-；Between T7- District 7；Between T8- Section Eight；The 9th section T9-；
The tenth section T10-；The 11st section T11-；The twelve-section T12-；VDDF- forward signal；VDDR- reverse signal.
Specific embodiment
The schematic diagram of embodiment when being as shown in Figure 1A bilateral scanning gate drive module scans provided by the invention.
As shown, bilateral scanning gate drive module provided by the invention has multistage gate drive circuit 1-3, and every level-one gate
Driving circuit 1-3 has multiple scanning circuits and exports two scanning signal S1~S6 respectively.The first gate in the present invention drives
Dynamic circuit 1 receives an initial signal S0, an a first frequency signal CLK1 and second frequency signal CLK2 and generates one first and sweep
It is more by multi-strip scanning line traffic control to retouch signal S1 and one second scanning signal S2, the first scanning signal S1 and the second scanning signal S2
A pixel, wherein the second scanning signal S2 is also the initial signal of one second gate drive circuit 2, similarly the second gate drive is electric
The scanning signal S4 that road 2 exports also is the initial signal of third gate drive circuit 3.In other words, if not gate drive circuit 1
When level-one, gate drive circuit 1 can equally receive the scanning signal of previous stage gate drive circuit generation as initial signal S0.
The signal of another embodiment when being as shown in Figure 1B bilateral scanning gate drive module scans provided by the invention
Figure.As shown, multistage gate drive circuit 4-6 is concatenated and every level-one gate drive circuit 4-6 exports two scannings letters respectively
Number S7~S12, in addition, gate drive circuit 4-6 can equally receive the scanning signal of previous stage gate drive circuit as starting
Signal scans multiple pixels to generate scanning signal.However, the difference of Figure 1B embodiment and Figure 1A embodiment is gate drive
The sequence of circuit output scanning signal is different, and the output sequence of Figure 1A embodiment is from first order gate drive circuit 1 to third
Grade gate drive circuit 3, the output sequence of Figure 1B embodiment are from the 6th grade of gate drive circuit 6 to fourth stage gate drive electricity
The sequence on road 4, two embodiment output scanning signals is opposite.In other words, bilateral scanning gate drive module provided by the invention
Can be to panel bilateral scanning, wherein Figure 1A embodiment is properly termed as forward scanning, and Figure 1B embodiment is known as reverse scan.
It is illustrated in figure 2 the circuit diagram of an embodiment of the gate drive circuit in Figure 1A of the present invention.As shown, first
There are two scanning circuit, one first scanning circuits to include a setup unit 10 and a driving unit 11 for grade gate drive circuit 1 tool,
One second scanning circuit includes a setup unit 12 and a driving unit 13.Setup unit 10 receives a forward signal VDDF and one
Initial signal S0, initial signal S0 control setup unit 10 so that forward signal VDDF is charged and generates a control signal
a1.Driving unit 11 couples setup unit 10 and simultaneously receives control signal a1 and first frequency signal CLK1, controls signal a1 and the
One frequency signal CLK1 controls driving unit 11 and generates one first scanning signal S1.In other words, the first scanning circuit receives forward
Signal VDDF and first frequency signal CLK1, and the first scanning is generated according to forward signal VDDF and first frequency signal CLK1 and is believed
Number S1.
Setup unit 12 in second scanning circuit can equally receive other initial signals A0 and forward signal VDDF and produce
Raw control signal a2.Driving unit 13 couples setup unit 12, and receives control signal a2 and second frequency signal CLK2, control
Signal a2 control driving unit 13 processed generates one second scanning signal S2 according to second frequency signal CLK2.In other words, it second sweeps
Scanning circuit receives forward signal VDDF and second frequency signal CLK2, and according to forward signal VDDF and second frequency signal CLK2
Generate the second scanning signal S2.First order gate drive circuit 1 so in the present invention exports the first scanning signal S1 and second
Scanning signal S2.
Based on above-mentioned, forward signal VDDF first charges to generate the first scanning signal S1, Zhi Houshun to the first scanning circuit
It again charges the second scanning circuit to generate the second scanning signal S2 to signal VDDF, so the forward charge path of signal VDDF
In need not charge simultaneously to the first scanning circuit and the second scanning circuit, so as to so that charging rate promotion.In other words, this hair
It is bright that the charge point of the first scanning circuit (generating control signal a1 place) and the charge point of the second scanning circuit (are not generated into control
In place of signal a2) it links together, to reduce the load in the forward charge path of signal VDDF.Second level gate drive electricity
Road 2 is identical as first order gate drive circuit 1 as the working method of third level gate drive circuit 3, no longer repeats in this.
As shown in Fig. 2, the setup unit 10 in the first scanning circuit includes one first setting element M1 and one second setting
Element M2, the first setting element M1 have an input terminal, a control terminal and an output end, and input terminal receives forward signal VDDF,
Control terminal receives initial signal S0, and output end couples driving unit 11, and the first setting element M1 is according to initial signal S0 and forward
Signal VDDF generates control signal a1.Second setting element M2 has an input terminal, a control terminal and an output end, input termination
Reverse signal VDDR is received, control terminal receives a third scanning signal S3 of a second level gate drive circuit 2 output, output end coupling
Driving unit 11 is connect, the second setting element M2 is according to third scanning signal S3 and reverse signal VDDR setting control signal a1.This
Outside, forward signal is a first voltage, and reverse signal is a second voltage, and first voltage is higher than second voltage.
In addition, the driving unit 11 in the first scanning circuit includes an a driving element M3 and capacitor C1, driving element
M3 can be a transistor, have an input terminal, a control terminal and an output end, and input terminal receives first frequency signal
CLK1, control terminal couple setup unit 10, and output end couples the first scanning circuit in second level gate drive circuit 2, driving
Element M3 generates the first scanning signal S1 according to first frequency signal CLK1 and control signal a1.Capacitor C1 is coupled to driving
Between the control terminal and output end of element M3, capacitor C1 promotes first according to control signal a1 and first frequency signal CLK1 and sweeps
Retouch the voltage of signal S1.
Accept it is above-mentioned, when control signal a1 do not control driving element M3 conducting when, the voltage of a first end of capacitor C1
For the voltage for controlling signal a1；When controlling signal a1 control driving element M3 conducting, the voltage of a second end of capacitor C1
The voltage of control signal a1 is changed to plus for the voltage of the voltage of first frequency signal CLK1, and the first end of capacitor C1
The voltage of one frequency signal CLK1.In this way, the first end of capacitor C1 is control when first frequency signal CLK1 is a high voltage
The voltage of signal a1 processed adds the voltage of first frequency signal CLK1, i.e. capacitor C1 believes according to control signal a1 and first frequency
Number CLK1 promotes the voltage of the first scanning signal S1.
In other words, the driving element M3 in the present invention drives the first scanning signal S1 to be promoted according to first frequency signal CLK1
To a tertiary voltage, driving element M3 drives the first scanning signal S1 to be reduced to one the 4th electricity according to first frequency signal CLK1
Pressure, wherein tertiary voltage is higher than the 4th voltage.Such present invention is all to promote and reduce scanning signal using driving element M3
The voltage of S1 reduces the transistor of the voltage (electric discharge) of scanning signal without additional setting, so as to reduce gate drive electricity
The area of road layout.
As shown in Fig. 2, the first gate drive circuit 1 in the present invention has a noise suicide circuit, it includes a control is single
First 14, multiple antinoise units 15,16.Noise suicide circuit couples the first scanning circuit and the second scanning circuit, and receives first
Frequency signal CLK1 or second frequency signal CLK2, to reduce the noise of the first scanning circuit and the noise of the second scanning circuit.
Control unit 14 receives the control signal a1 that first frequency signal CLK1, second frequency signal CLK2, the first scanning circuit generate
And second scanning circuit generate control signal a2, and the first scanning circuit generate control signal a1 and the second scanning circuit produce
Raw control signal a2 control noise suicide circuit not enabled antinoise work, first frequency signal CLK1 and first frequency signal
CLK2 controls noise suicide circuit and enables antinoise work.
In addition, the antinoise unit 15 in the first scanning circuit includes an a first transistor M5 and second transistor M4.
The first transistor M5 has an input terminal, a control terminal and an output end, and input terminal couples the driving list in the first scanning circuit
Member 11, control terminal coupling control unit 14, one reference voltage REF of output end coupling (such as: ground potential), the first transistor M5 makes
The voltage stabilization of one control terminal of the driving unit 11 in the first scanning circuit is in reference voltage REF.Second transistor M4 has
One input terminal, a control terminal and an output end, input terminal couple the driving unit 11 in the first scanning circuit, control terminal coupling control
Unit 14 processed, output end couple reference voltage REF, and second transistor M4 makes the one defeated of the driving unit 11 in the first scanning circuit
The voltage stabilization of outlet is in reference voltage REF.
The antinoise unit 16 of second scanning circuit includes a third transistor M10 and one the 4th transistor M9.Third is brilliant
Body pipe M10 has an input terminal, a control terminal and an output end, and input terminal couples the driving unit 13 in the second scanning circuit,
Control terminal couples control unit 14, and output end couples reference voltage REF, and third transistor M10 makes the drive in the second scanning circuit
The voltage stabilization of one control terminal of moving cell 13 is in reference voltage REF.4th transistor M9 have an input terminal, a control terminal and
One output end, input terminal couple the driving unit 13 of the second scanning circuit, and control terminal couples control unit 14, output end coupling ginseng
Voltage REF is examined, the 4th transistor M9 makes the voltage stabilization of an output end of the driving unit 13 in the second scanning circuit in reference
Voltage REF.
In addition, control unit 14 also includes a protection location M15, there is an input terminal, a control terminal and an output end,
Input terminal couples the first transistor M5, second transistor M4, third transistor M10 and the 4th transistor M9, and control terminal receives one
Third frequency signal CLK3, output end couple reference voltage REF, and protection location M15 is periodical according to third frequency signal CLK3
The control terminal by the first transistor M5, second transistor M4, third transistor M10 and the 4th transistor M9 be maintained at reference to electricity
Press REF.Based on above-mentioned, the design of the first gate drive circuit 1 in the present invention does not generate firing current comprising one at any time
Transistor, so as to reduce power consumption.
Accept it is above-mentioned, control unit 14 include multiple transistor M11~M14, control signal a1 control transistor M13 conducting
When, control signal C3 is reference voltage REF, therefore noise suicide circuit not enabled antinoise works, in other words, control signal a1 control
Noise suicide circuit not enabled antinoise work processed.When controlling signal a1 control transistor M13 cut-off, if first frequency signal
CLK1 controls transistor M11 conducting, then controls the voltage that signal C3 is first frequency signal CLK1, and such noise suicide circuit enables
In other words antinoise work controls signal a1 and first frequency signal CLK1 control noise suicide circuit and enables antinoise work.This
Outside, the working method for controlling signal a2 and second frequency signal CLK2 is identical as control signal a1 and first frequency signal CLK1,
It is no longer repeated in this.
Based on above-mentioned, in the present invention the shared noise suicide circuit of the first scanning circuit and the second scanning circuit, thus
Reduce the layout area of noise suicide circuit.In addition, noise suicide circuit in the present invention can by the control terminal of driving unit 11,13 with
Output end is reset and is maintained at reference voltage REF, and such two-way gate drive circuit 1 can reduce setting for resetting element
It sets, so that layout area can also be reduced.In other words, the noise suicide circuit in the present invention accomplishes the function of antinoise and resetting simultaneously
Energy.So the present invention can reduce the layout area of many places resetting element of gate drive circuit, i.e., the present invention is simultaneously by dual output
Noise suicide circuit needed for gate drive circuit is incorporated into level-one gate drive circuit, to effectively reduce noise suicide circuit institute
The element needed.
It is illustrated in figure 3 the timing diagram of one embodiment of gate drive circuit when the present invention forward scans.Timing diagram is
The timing diagram of third level gate drive circuit 3 of the present invention, remaining first order gate drive circuit 1 and second level gate drive circuit
2 operation timing corresponds to the timing diagram of third level gate drive circuit 3.
In first interval T1, third scanning signal S3 is high voltage, and third scanning signal S3 is third level gate drive
The initial signal of circuit 3, such first sets element M1 and transistor M13 as on state；In this way, the voltage of control signal a1
It is gradually increasing due to the forward charging of signal VDDF, and because first frequency signal CLK1 and second frequency signal CLK2 is reference
Voltage REF, does not have coupled noise, so control signal C3 discharges via transistor M13 and is reference voltage REF；Resist at this time
Noise Circuits not enabled, and the 5th scanning signal S5 and first frequency signal CLK1 are similarly reference voltage REF.In second interval
The voltage of T2, control signal a1 are charged to the voltage of forward signal VDDF, furthermore, the second of third level gate drive circuit 3
Scanning circuit receives the 4th scanning signal S4 of second level gate drive circuit 2, and the voltage for so controlling signal a2 can be mentioned gradually
It rises.
High voltage is changed into 3rd interval T3, first frequency signal CLK1, and will control via the charging of capacitor C1
The voltage increase of signal a1 processed is that the voltage of forward signal VDDF adds the voltage of first frequency signal CLK1, the 5th scanning at this time
Signal S5 can also be promoted to high voltage, and scan line is simultaneously charged to high voltage by the 5th scanning signal S5；In addition, the 5th scanning letter
Number S5 can control the first scanning circuit of fourth stage gate drive circuit, then forward signal VDDF can be to fourth stage gate drive electricity
The charging of 4 first scanning circuit of road, remaining working method is identical as the first scanning circuit in third level gate drive circuit 3, no
It repeats again；In addition, voltage of the voltage increase of control signal a2 to forward signal VDDF.
It is reduced to reference voltage REF in the 4th section T4, first frequency signal CLK1, then the voltage for controlling signal a1 also drops
Down to the voltage of forward signal VDDF, and the 5th scanning signal S5 is equally reduced to reference voltage REF；Second frequency signal CLK2
The voltage that the voltage changed into high voltage by reference voltage REF, therefore controlled signal a2 is forward signal VDDF is plus the second frequency
The voltage of rate signal CLK2；The 6th scanning signal S6 can also be promoted to high voltage and the scan line that charges at this time；Similarly, it the 6th sweeps
The second scanning circuit in next stage gate drive circuit can be controlled by retouching signal S6.In the 5th section T5, second frequency signal
CLK2 is reduced to reference voltage REF, and the voltage of control signal a2 is also reduced to the voltage of forward signal VDDF, and the 6th scanning letter
Number S6 is also reduced to reference voltage REF；In addition, because third frequency signal CLK3 is high voltage, so fourth stage gate drive electricity
The 7th scanning signal S7 on road 4 is promoted to high voltage；In addition, the 7th scanning signal S7 also controls third level gate drive circuit 3
In the first scanning circuit the second setting element M2, so that the voltage of signal a1 will be controlled from the voltage drop of forward signal VDDF
Down to the voltage of reference voltage REF.
In the 6th section T6, in third level gate drive circuit 3 voltage drop of control signal a2 down to reference voltage REF,
And the 7th scanning signal S7 of fourth stage gate drive circuit 4 is dropped because third frequency signal CLK3 is reduced to reference voltage REF
Down to reference voltage REF；And the 4th frequency signal CLK4 is high voltage, and controls fourth stage gate drive circuit 4 and generate the 8th
Scanning signal S8.The T7 between District 7, first frequency signal CLK1 is periodically high voltage again at this time, and it is single to control control
The transistor M11 conducting of member 14, the voltage for so controlling signal C3 is the voltage of first frequency signal CLK1；Moreover, because the
Three-level gate drive circuit 3 does not work at present, so to avoid first frequency signal CLK1 from having coupled noise to scan line, this area
Between do not utilize the voltage of discharge mechanism drop low control signal C3, and make to control signal C3 control antinoise unit 15,16 enable it is anti-
Noise operation can so make the control terminal and output end reference voltage REF of driving unit 11,13, to reduce the first frequency
The coupled noise of rate signal CLK1.
The T8 between Section Eight, first frequency signal CLK1 be low-voltage (such as: reference voltage REF), then transistor M11 is
Off state, but second frequency signal CLK2 is periodically high voltage again, and controls the voltage of signal C3 not via putting
Electricity and reduces, so antinoise unit 15,16 still executes during antinoise works, such second frequency signal CLK2 will not be to sweeping
Retouching line has coupled noise.Transistor M15 conducting is controlled in the 9th section T9, third frequency signal CLK3, so that signal will be controlled
The voltage drop of C3 is down to reference voltage REF, then antinoise unit 15,16 stops executing antinoise work；In addition, therefore in section
First frequency signal CLK1 and second frequency signal CLK2 is low-voltage, so coupled noise is not had, without enabling antinoise
Work.The explanation of subsequent tenth section T10 to twelve-section T12 such as aforementioned 6th section T6 to T8 between Section Eight, not in this
It repeats again.
By above description it is known that the multistage gate drive circuit of high parsing display, when work, third frequency is believed
Number CLK3 controls the electric discharge of third level gate drive circuit 3 simultaneously and charges with 4 tunnel of fourth stage gate drive circuit, first frequency signal
CLK1 controls the electric discharge of fourth stage gate drive circuit 4 simultaneously and charges with level V gate drive circuit 5.
It is illustrated in figure 4 the circuit diagram of an embodiment of the gate drive circuit in Figure 1B of the present invention.As shown, it is
Level V gate drive circuit 5 when reverse scan, unlike the third level gate drive circuit 3 when forward scanning,
When forward scanning third level gate drive circuit 3 by second level gate drive circuit 2 control charging and generate scanning signal S5,
S6, level V gate drive circuit 5 generates the 9th scanning signal by the 6th grade of control charging of gate drive circuit 6 when reverse scan
S9 and the tenth scanning signal S10；Third level gate drive circuit 3 is made by the control of fourth stage gate drive circuit 4 when forward scanning
Signal a1, a2 electric discharge are controlled, level V gate drive circuit 5 is made to control by the control of the fourth stage gate drive circuit when reverse scan
Signal a1, a2 electric discharge.
Accept above-mentioned, forward signal VDDF is first voltage reverse signal VDDR is second voltage when forward scanning, reversely
It is first voltage that forward signal VDDF, which is second voltage reverse signal VDDR, when scanning, so forward signal VDDF when forward scanning
Make that gate drive circuit charges and reverse signal VDDR makes gate drive circuit discharge, reverse signal VDDR makes lock when reverse scan
Pole driving circuit charges and forward signal VDDF makes gate drive circuit discharge.And timing when reverse scan as shown in figure 5,
The timing diagram of one embodiment of gate drive circuit when it is reverse scan of the present invention.As shown, the 5th figure timing and third
Figure timing using opposite timing on the contrary, and make gate drive circuit carry out reverse scan.In other words, first order gate drive electricity
The first scanning circuit in road 1 generates the first scanning signal S1 according to reverse signal VDDR and first frequency signal CLK1, and the
The second scanning circuit in level-one gate drive circuit 1 generates first according to reverse signal VDDR and second frequency signal CLK2 and sweeps
Retouch signal S2.Therefore bilateral scanning gate drive module provided by the invention can be to display bilateral scanning.
In conclusion the present invention provides a kind of bilateral scanning gate drive module, there is multistage gate drive circuit, often
Level-one gate drive circuit has multiple scanning circuits, wherein one first scanning circuit receives forward a signal, a reverse signal
With a first frequency signal, and one first scanning signal is generated according to forward signal and first frequency signal, or according to reversed
Signal and first frequency signal generate the first scanning signal；And one second scanning circuit, receive forward signal, reverse signal and one
Second frequency signal generates one second scanning signal according to forward signal and second frequency signal, or according to reverse signal with
Second frequency signal generates the second scanning signal；When bilateral scanning gate drive module forward scans for one, forward signal is
One first voltage, reverse signal are a second voltage, and forward the first scanning circuit of signal charging is with the second scanning circuit to carry out
It forward scans, when bilateral scanning gate drive module is a reverse scan, forward signal is second voltage, reverse signal the
One voltage, reverse signal the second scanning circuit of charging and the first scanning circuit are to carry out reverse scan.
Claims (8)
1. a kind of bilateral scanning gate drive module, has multistage gate drive circuit, every level-one gate drive circuit has
Multiple scanning circuits, which is characterized in that multiple scanning circuits include:
One first scanning circuit receives forward signal, a reverse signal and a first frequency signal, according to this forward signal and
The first frequency signal generates one first scanning signal, or according to the reverse signal and the first frequency signal generate this first
Scanning signal；And
One second scanning circuit receives forward signal, the reverse signal and a second frequency signal, according to this forward signal with
The second frequency signal generates one second scanning signal, or according to the reverse signal and the second frequency signal generate this second
Scanning signal；
One noise suicide circuit couples first scanning circuit and second scanning circuit, receives the first frequency signal, and reducing should
The noise of the noise of first scanning circuit and second scanning circuit, the noise suicide circuit include a control unit, the control list
Member receives the control signal that the first frequency signal, the second frequency signal, first scanning circuit generate and this second is swept
One control signal of scanning circuit, the control that control signal and second scanning circuit which generates generate
Signal controls noise suicide circuit not enabled antinoise work, and the first frequency signal and the second frequency signal control the anti-noise
Acoustic-electric road enables antinoise work；
Wherein, when the bilateral scanning gate drive module forward scans for one, forward signal is a first voltage for this, this is reversed
Signal is a second voltage, and forward signal first scanning circuit that charges forward is swept with second scanning circuit with carrying out this for this
It retouches, when the bilateral scanning gate drive module is a reverse scan, forward signal is the second voltage for this, which is
The first voltage, the reverse signal charge second scanning circuit and first scanning circuit to carry out the reverse scan.
2. bilateral scanning gate drive module according to claim 1, which is characterized in that in the multistage gate drive circuit
A first order gate drive circuit include first scanning circuit, which includes:
One setup unit, receiving an initial signal, forward signal, the initial signal control the setup unit with this, so that this is forward
Signal is charged and generates a control signal；
One driving unit couples the setup unit, receives the control signal and the first frequency signal, the control signal and this
One frequency signal controls the driving unit and generates first scanning signal.
3. bilateral scanning gate drive module according to claim 2, which is characterized in that the driving unit according to this first
Frequency signal drives first scanning signal to be promoted to a tertiary voltage, which should according to first frequency signal driving
First scanning signal is reduced to one the 4th voltage, which is higher than the 4th voltage.
4. bilateral scanning gate drive module according to claim 2, which is characterized in that the setup unit includes:
One first setting element, has an input terminal, a control terminal and an output end, which receives the forward signal, should
Control terminal receives the initial signal, which couples the driving unit, and the first setting element is according to the initial signal and is somebody's turn to do
Forward signal generates the control signal；And
One second setting element, has an input terminal, a control terminal and an output end, which receives the reverse signal, should
Control terminal receives the third scanning signal that a second level gate drive circuit generates, which couples the driving unit, should
Second setting element sets the control signal according to the third scanning signal and the reverse signal.
5. bilateral scanning gate drive module according to claim 2, which is characterized in that the driving unit includes:
One driving element has an input terminal, a control terminal and an output end, which receives the first frequency signal, should
Control terminal couples the setup unit, which couples one first scanning circuit in a second level gate drive circuit, the drive
Dynamic element generates first scanning signal according to the first frequency signal and the control signal；And
One capacitor is coupled between control terminal and the output end in the driving element, according to the control signal and this
One frequency signal promotes the voltage of first scanning signal.
6. bilateral scanning gate drive module according to claim 1, which is characterized in that the noise suicide circuit includes:
One the first transistor, has an input terminal, a control terminal and an output end, which couples in first scanning circuit
Driving unit, which couples the control unit, which couples a reference voltage, the first transistor make this first
The voltage stabilization of one control terminal of the driving unit in scanning circuit is in the reference voltage；
One second transistor, has an input terminal, a control terminal and an output end, which couples in first scanning circuit
The driving unit, which couples the control unit, which couples the reference voltage, the second transistor make this
The voltage stabilization of one output end of the driving unit in one scanning circuit is in the reference voltage；
One third transistor, has an input terminal, a control terminal and an output end, which couples in second scanning circuit
A driving unit, which couples the control unit, which couples the reference voltage, the third transistor make this
The voltage stabilization of one control terminal of the driving unit in two scanning circuits is in the reference voltage；And
One the 4th transistor, has an input terminal, a control terminal and an output end, which couples in second scanning circuit
The driving unit, which couples the control unit, which couples the reference voltage, the 4th transistor make this
The voltage stabilization of one output end of the driving unit in two scanning circuits is in the reference voltage.
7. bilateral scanning gate drive module according to claim 6, which is characterized in that the control unit also includes:
One protection location, has an input terminal, a control terminal and an output end, the input terminal couple the first transistor, this
Two-transistor, the third transistor and the 4th transistor, the control terminal receive a third frequency signal, and output end coupling should
Reference voltage, the protection location according to the third frequency signal periodically by the first transistor, the second transistor, this
The control terminal of three transistors and the 4th transistor is maintained at the reference voltage.
8. bilateral scanning gate drive module according to claim 1, which is characterized in that the bilateral scanning gate drive mould
Block receives a third frequency signal, which controls the first order in the bilateral scanning gate drive module simultaneously
Gate drive circuit electric discharge is charged with a second level gate drive circuit, which controls the bilateral scanning lock simultaneously
Second level gate drive circuit electric discharge in the drive module of pole is charged with a third level gate drive circuit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510367150.0A CN106328076B (en) | 2015-06-29 | 2015-06-29 | Bidirectional scanning gate driving module |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510367150.0A CN106328076B (en) | 2015-06-29 | 2015-06-29 | Bidirectional scanning gate driving module |
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| CN106328076B true CN106328076B (en) | 2019-05-21 |
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| KR20070118443A (en) * | 2006-06-12 | 2007-12-17 | 엘지.필립스 엘시디 주식회사 | Shift register and liquid crystal display device using the same |
| KR20130046196A (en) * | 2011-10-27 | 2013-05-07 | 삼성전자주식회사 | Apparatus for supplying multi-ouput power and display apparatus using the apparatus for supplying multi-ouput power |
| TWI490844B (en) * | 2013-01-15 | 2015-07-01 | Giantplus Technology Co Ltd | A driving module with a common control node |
| CN103928008B (en) * | 2014-04-24 | 2016-10-05 | 深圳市华星光电技术有限公司 | A kind of GOA circuit for liquid crystal display and liquid crystal indicator |
| CN104299583B (en) * | 2014-09-26 | 2016-08-17 | 京东方科技集团股份有限公司 | A kind of shift register and driving method, drive circuit and display device |
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