CN106206744A - A kind of metal oxide thin-film transistor and preparation method thereof - Google Patents

Abstract

The present invention relates to a kind of metal oxide thin-film transistor and preparation method thereof.The metal oxide thin-film transistor of the present invention includes gate electrode layer, gate insulation layer, active layer, source-drain electrode layer, protective layer, TiO₂Thin layer, planarization layer, anode layer and pixel definition district organic layer.The present invention adds one layer of nano-TiO above IGZO active layer₂Thin film, plays the effect of shielding UV light and environmental contaminants such as metal ion etc., prevents it from the stability of IGZO active layer is produced impact, improves the stability of device on the basis of not increasing light shield.

Description

A kind of metal oxide thin film transistor and its preparation method

technical field

The invention belongs to the technical field of thin film transistors and preparation thereof, and in particular relates to a metal oxide thin film transistor and a preparation method thereof.

Background technique

In recent years, we've seen flat-panel TVs grow larger and more powerful. Full high-definition (HD) screen resolution (1920x1080 pixels) has become the norm, and many panel makers have begun to demonstrate or introduce larger ultra-high-definition resolution screens. At the same time, refresh rates are also increasing, resulting in better picture quality for moving images and 3D TV.

Today, there are a large number of large screens for consumers to choose from. These screens have very clear picture quality, detail at a glance, and extremely high refresh rates. Recently, large-screen OLED TVs have begun to hit the market. However, the manufacture of these high-performance displays presents a major challenge for panel manufacturers, as they need to find feasible ways to drive all these displays fast enough and low enough power, integrated in a very large area. pixels. Driving these pixels is an array of millions of thin-film transistors (TFTs), known as the backplane. Amorphous silicon thin film transistor (a-Si TFT) backplanes have been the mainstay of the display industry for many years. However, amorphous silicon has inherent limitations, making it difficult to provide the switching characteristics required to drive high-resolution, high-performance displays. Amorphous silicon transistors are too slow for the job: electrons and holes move too slowly in this material, a property we call mobility.

Various technologies have emerged that can overcome the mobility barrier of amorphous silicon thin film transistors. Of these, metal oxide thin film transistor technology seems to be the most favored, and it is not difficult for existing thin film transistor manufacturing plants to adopt this technology, because metal oxides are usually deposited using the well-known physical vapor deposition (PVD) process. The materials considered are not dimensionally constrained to be deposited and have sufficiently high mobility to enable the fabrication of backplanes suitable for high-resolution, high-refresh-rate flat-panel displays. Metal oxide thin film transistors have come a long way. The best material for the active layer is indium gallium zinc oxide (IGZO), which has 10 to 20 times higher mobility than amorphous silicon.

IGZO is typically deposited using a PVD technique known as magnetron sputtering, which uses both magnetic and electric fields to remove material from the cathode and deposit it onto the backplane. Before metal oxide thin film transistors are mature and mass-produced, there are still many difficulties to be overcome, especially in the manufacture of OLED TV backplanes. The main area of improvement is device instability. If any effect is strong enough to be visible to the naked eye, it will affect the visual experience of consumers.

IGZO has the advantages of high mobility, suitable for large-area production, and similar to a-Si process, and has gradually become a research hotspot in the field of display technology. However, the IGZO layer of IGZO-TFT is very sensitive to the process and environment, so it is often necessary to use an ESL structure to protect the IGZO layer, adding a Mask, which is not conducive to the reduction of process costs. And because the bandgap width of IGZO (about 3.4eV) is similar to that of UV light (higher than 3.1eV), IGZO has a good absorption effect on UV light, and the IGZO layer has a valence band under the irradiation of UV light. Electrons and the like easily absorb energy and jump to the conduction band, which will shift the threshold voltage of TFT and make the display effect unstable.

Contents of the invention

The technical problem to be solved by the invention is that the cost of the existing IGZO-TFT device is high, and the stability of the IGZO active layer is easily affected by UV light and external pollutants.

In order to solve the above technical problems, the present invention provides a metal oxide thin film transistor and a preparation method thereof.

According to a first aspect of the present invention, a metal oxide thin film transistor is provided, comprising:

a gate electrode layer, which is located on the upper surface of the side close to the glass substrate;

a gate insulating layer, which is located on the upper surface of the gate electrode layer and the upper surface of the glass substrate not covered by the gate electrode layer;

The active layer is located on the upper surface of the gate insulating layer on the side close to the glass substrate;

A source-drain layer, which is located on the upper surface of the active layer and the upper surface of the gate insulating layer not covered by the active layer near the glass substrate;

a protective layer, which is located on the upper surface of the source-drain layer and the upper surface of the gate insulating layer not covered by the source-drain layer;

_TiO2 thin film layer, which is located on the upper surface of the protective layer;

A planarization layer, which is positioned at the upper surface of the _TiO2 thin film layer; the planarization layer is provided with a contact hole, the position of the contact hole is close to the other side of the glass substrate, and the contact hole is connected from the second side of the planarization layer the upper surface extends to the upper surface of the source-drain layer;

an anode layer formed in the contact hole of the planarization layer and on the upper surface of the planarization layer covering the contact hole;

The pixel definition area organic layer is located on the upper surface of the anode layer close to both sides of the glass substrate and the upper surface of the planarization layer not covered by the anode layer.

According to the present invention, the material used for the gate electrode layer is titanium (Ti), chromium (Cr), aluminum (Al), molybdenum (Mo) or copper (Cu).

According to the present invention, the gate insulating layer is a silicon nitride layer, a silicon oxide layer or a silicon oxynitride layer.

According to the present invention, the material used for the active layer is indium gallium zinc oxide.

According to the present invention, the material used for the protective layer is silicon oxide.

According to the present invention, the thickness of the TiO ₂ thin film layer is 5nm-60nm.

According to a second aspect of the present invention, a method for preparing a metal oxide thin film transistor is provided, which includes the following steps:

a) Depositing a gate electrode layer on the upper surface close to the glass substrate by physical vapor deposition, and then forming a required gate electrode pattern through a standard photolithography process;

b) depositing a gate insulating layer on the upper surface of the gate electrode layer and the upper surface of the glass substrate not covered by the gate electrode layer by chemical vapor deposition;

c) Depositing an active layer on the upper surface of the gate insulating layer close to the glass substrate by physical vapor deposition, and forming the required active layer pattern by coating photoresist, exposing, developing, and etching processes;

d) using physical vapor deposition to deposit source and drain layers on the upper surface of the active layer and the upper surface of the gate insulating layer not covered by the active layer on the side close to the glass substrate, and then using a standard photolithography process to form the The required source and drain pattern;

e) Depositing a protective layer on the upper surface of the source-drain layer and the upper surface of the gate insulating layer not covered by the source-drain layer by chemical vapor deposition;

f) adopting chemical vapor deposition or sol-gel method to deposit dense nano- _TiO on the upper surface of the protective layer Thin film layer;

g) Coating a planarization layer on the upper surface of the _TiO2 thin film layer and forming a contact hole connecting the planarization layer, the _TiO2 thin film layer and the protective layer on the upper surface of the source-drain layer, and then exposing, developing, and etching process to form a contact hole pattern;

h) depositing an anode layer in the contact hole on the planarization layer and on the upper surface of the planarization layer covering the contact hole by physical vapor deposition;

i) Coating a pixel definition area organic layer on the upper surface of the anode layer close to both sides of the glass substrate and the upper surface of the planarization layer not covered by the anode layer to define a pixel area to obtain the metal oxide thin film transistor .

According to the method of the present invention, the material used for the gate electrode layer is titanium, chromium, aluminum, molybdenum or copper.

According to the method of the present invention, the gate insulating layer is a silicon nitride layer, a silicon oxide layer or a silicon oxynitride layer.

According to the method of the present invention, the material used for the active layer is indium gallium zinc oxide.

According to the method of the present invention, the material used for the protective layer is silicon oxide.

According to the method of the present invention, the thickness of the TiO ₂ thin film layer is 5nm-60nm.

The term "one side" in the present invention refers to the same side of the glass substrate; "the other side" is the side opposite to "one side".

Compared with the prior art, one or more embodiments in the above solutions may have the following advantages or beneficial effects:

The present invention designs an IGZO-TFT device with a BCE structure, adding a layer of nano- _TiO2 film on the top of the IGZO active layer to play the role of shielding UV light and external pollutants such as metal ions, and preventing it from affecting the IGZO. The stability of the source layer is affected, and the stability of the device is improved on the basis of not adding a photomask, and the thin film transistor is suitable for both liquid crystal displays and OLED displays.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Description of drawings

The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, and are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention. In the attached picture:

1 is a schematic structural diagram of a metal oxide thin film transistor according to an embodiment of the present invention;

2 is a schematic flow diagram of a method for preparing a metal oxide thin film transistor according to an embodiment of the present invention;

3 is a schematic diagram after forming a gate electrode layer on a glass substrate in an embodiment of the present invention;

4 is a schematic diagram after forming a gate insulating layer and an active layer on the gate electrode layer in an embodiment of the present invention;

5 is a schematic diagram after forming a source and drain layer on an active layer in an embodiment of the present invention;

Fig. 6 is a schematic diagram after forming a protective layer on the source and drain electrodes and depositing a _TiO2 thin film layer on the protective layer in an embodiment of the present invention;

7 is a schematic diagram after coating a planarization layer on the upper surface of the _TiO2 thin film layer and forming a contact hole connecting the planarization layer, _TiO2 thin film layer and the protective layer on the upper surface of the source and drain electrode layer in the embodiment of the present invention;

FIG. 8 is a schematic diagram after depositing and forming an anode layer in the contact hole on the planarization layer and on the upper surface of the planarization layer covering the contact hole.

detailed description

The implementation of the present invention will be described in detail below in conjunction with the accompanying drawings and examples, so as to fully understand and implement the process of how to apply technical means to solve technical problems and achieve technical effects in the present invention. It should be noted that, as long as there is no conflict, each embodiment and each feature in each embodiment of the present invention can be combined with each other, and the formed technical solutions are all within the protection scope of the present invention.

Example 1

In order to solve the problem that the cost of the existing IGZO-TFT device is high and the stability of the IGZO active layer is easily affected by UV light and external pollutants, an embodiment of the present invention provides a metal oxide thin film transistor.

A metal oxide thin film transistor provided by an embodiment of the present invention.

FIG. 1 is a schematic structural diagram of a metal oxide thin film transistor according to an embodiment of the present invention. As shown in FIG. 1, the metal oxide thin film transistor of this embodiment includes:

A gate electrode layer 11, which is located on the upper surface of the side a close to the glass substrate 10;

a gate insulating layer 12, which is located on the upper surface of the gate electrode layer 11 and the upper surface of the glass substrate 10 not covered by the gate electrode layer 11;

The active layer 13 is located on the upper surface of the gate insulating layer 12 close to the side a of the glass substrate 10;

A source-drain layer 14, which is located on the upper surface of the active layer 13 and the upper surface of the gate insulating layer 12 not covered by the active layer 13 near the side a of the glass substrate 10;

A protective layer 15, which is located on the upper surface of the source-drain layer 14 and the upper surface of the gate insulating layer 12 not covered by the source-drain layer 14;

TiO ₂ film layer 16, which is located on the upper surface of the protective layer 15;

Planarization layer 17, it is positioned at described _TiO2 thin film layer 16 upper surface; Described planarization layer 17 is provided with contact hole 20, and the position of described contact hole 20 is close to the b side of glass substrate 10, and described contact hole 20 is from The upper surface of the planarization layer 17 extends to the upper surface of the source-drain layer 14;

Anode layer 19, which is formed in the contact hole 20 of the planarization layer 17 and covers the upper surface of the planarization layer 17 of the contact hole 20;

The pixel definition region organic layer 18 is located on the upper surface of the anode layer 19 close to both sides of the glass substrate 10 and the upper surface of the planarization layer 17 not covered by the anode layer 19 .

The material used for the gate electrode layer 11 is Mo.

The gate insulating layer 12 is a silicon oxide layer.

The material used for the active layer 13 is InGaZnO.

The material used for the source and drain layers 14 is Mo.

The material used for the protection layer 15 is silicon oxide.

The thickness of the TiO ₂ thin film layer 16 is 40nm.

Example 2

FIG. 2 is a schematic flowchart of a method for preparing a metal oxide thin film transistor in an embodiment of the present invention. The preparation method of this embodiment mainly includes step 101 to step 107.

In step 101, the gate electrode layer 11 is deposited on the upper surface near the side a of the glass substrate 10 by physical vapor deposition, and then the required gate electrode pattern is formed by standard photolithography process to obtain the structure shown in FIG. 3 . The material used for the gate electrode layer 11 is Mo.

In step 102, the gate insulating layer 12 is deposited on the upper surface of the gate electrode layer 11 and the upper surface of the glass substrate 10 not covered by the gate electrode layer 11 by chemical vapor deposition; The active layer 13 is deposited on the upper surface of the gate insulating layer 11 on side a, and the required active layer pattern is formed by coating photoresist, exposure, development, and etching processes, and the structure shown in FIG. 4 is obtained. The gate insulating layer 12 is a silicon oxide layer.

In step 103, the source and drain layers 14 are deposited on the upper surface of the active layer 13 and the upper surface of the gate insulating layer 12 not covered by the active layer 13 near the side a of the glass substrate 10 by physical vapor deposition, Then, a required source and drain pattern is formed through a standard photolithography process to obtain a structure as shown in FIG. 5 . The material of the source-drain layer 14 is Mo.

In step 104, chemical vapor deposition is used to deposit the protective layer 15 on the upper surface of the source and drain layer 14 and the upper surface of the gate insulating layer 12 not covered by the source and drain layer 14; A dense nano TiO ₂ thin film layer 16 is deposited on the protective layer 15 by glue method to obtain the structure shown in FIG. 6 . The material used for the protection layer 15 is silicon oxide. The thickness of the _TiO2 thin film layer is 40 nm.

In step 105, a planarization layer 17 is coated on the upper surface of the _TiO2 thin film layer 16 and a contact hole connecting the planarization layer 17, the _TiO2 thin film layer 16 and the protective layer 15 on the upper surface of the source-drain layer 14 is formed 20. Then, through exposure, development, and etching processes, a contact hole pattern is formed to obtain the structure shown in FIG. 7 .

In step 106 , the anode layer 19 is deposited in the contact hole 20 on the planarization layer 17 and on the upper surface of the planarization layer 17 covering the contact hole 20 by physical vapor deposition to obtain the structure shown in FIG. 8 .

In step 107, the pixel definition area organic layer 18 is coated on the upper surface of the anode layer 19 close to both sides of the glass substrate 10 and the upper surface of the planarization layer 17 not covered by the anode layer 19 to define a pixel area, A metal oxide thin film transistor as shown in FIG. 1 is obtained. Complete the subsequent manufacturing process of liquid crystal display and OLED display, and obtain a display device with good stability.

In this embodiment, a layer of nano- _TiO2 film is added above the IGZO active layer to play the role of shielding UV light and external pollutants such as metal ions, preventing it from affecting the stability of the IGZO active layer, without increasing The basis of the photomask improves the stability of the device.

Although the embodiments disclosed in the present invention are as above, the described content is only an embodiment adopted for the convenience of understanding the present invention, and is not intended to limit the present invention. Anyone skilled in the technical field to which the present invention belongs can make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed by the present invention, but the protection scope of the present invention remains the same. The scope defined by the appended claims shall prevail.

Claims (10)

1. A metal oxide thin film transistor, comprising: a gate electrode layer, which is located on the upper surface of the side close to the glass substrate; a gate insulating layer, which is located on the upper surface of the gate electrode layer and the upper surface of the glass substrate not covered by the gate electrode layer; The active layer is located on the upper surface of the gate insulating layer on the side close to the glass substrate; A source-drain layer, which is located on the upper surface of the active layer and the upper surface of the gate insulating layer not covered by the active layer near the glass substrate; a protective layer, which is located on the upper surface of the source-drain layer and the upper surface of the gate insulating layer not covered by the source-drain layer; _TiO2 thin film layer, which is located on the upper surface of the protective layer; A planarization layer, which is positioned at the upper surface of the _TiO2 thin film layer; the planarization layer is provided with a contact hole, the position of the contact hole is close to the other side of the glass substrate, and the contact hole is connected from the second side of the planarization layer the upper surface extends to the upper surface of the source-drain layer; an anode layer formed in the contact hole of the planarization layer and on the upper surface of the planarization layer covering the contact hole; The pixel definition area organic layer is located on the upper surface of the anode layer close to both sides of the glass substrate and the upper surface of the planarization layer not covered by the anode layer. 2. The transistor according to claim 1, wherein the gate electrode layer is made of titanium, chromium, aluminum, molybdenum or copper. 3. The transistor according to claim 1, wherein the gate insulating layer is a silicon nitride layer, a silicon oxide layer or a silicon oxynitride layer. 4. The transistor according to claim 1, wherein the material used for the active layer is indium gallium zinc oxide. 5. The transistor according to claim 1, characterized in that, the thickness of the TiO ₂ thin film layer is 5nm˜60nm. 6. A method for preparing a metal oxide thin film transistor, comprising the following steps: a) Depositing a gate electrode layer on the upper surface close to the glass substrate by physical vapor deposition, and then forming a required gate electrode pattern through a standard photolithography process; b) depositing a gate insulating layer on the upper surface of the gate electrode layer and the upper surface of the glass substrate not covered by the gate electrode layer by chemical vapor deposition; c) Depositing an active layer on the upper surface of the gate insulating layer close to the glass substrate by physical vapor deposition, and forming the required active layer pattern by coating photoresist, exposing, developing, and etching processes; d) using physical vapor deposition to deposit source and drain layers on the upper surface of the active layer and the upper surface of the gate insulating layer not covered by the active layer on the side close to the glass substrate, and then using a standard photolithography process to form the The required source and drain pattern; e) Depositing a protective layer on the upper surface of the source-drain layer and the upper surface of the gate insulating layer not covered by the source-drain layer by chemical vapor deposition; f) adopting chemical vapor deposition or sol-gel method to deposit dense nano- _TiO on the upper surface of the protective layer Thin film layer; g) Coating a planarization layer on the upper surface of the _TiO2 thin film layer and forming a contact hole connecting the planarization layer, the _TiO2 thin film layer and the protective layer on the upper surface of the source-drain layer, and then exposing, developing, and etching process to form a contact hole pattern; h) depositing an anode layer in the contact hole on the planarization layer and on the upper surface of the planarization layer covering the contact hole by physical vapor deposition; i) Coating a pixel definition area organic layer on the upper surface of the anode layer close to both sides of the glass substrate and the upper surface of the planarization layer not covered by the anode layer to define a pixel area to obtain the metal oxide thin film transistor . 7. The method according to claim 6, wherein the material used for the gate electrode layer is titanium, chromium, aluminum, molybdenum or copper. 8. The method according to claim 6, wherein the gate insulating layer is a silicon nitride layer, a silicon oxide layer or a silicon oxynitride layer. 9. The method according to claim 6, wherein the material used for the active layer is InGaZnO. 10. The method according to claim 6, characterized in that the thickness of the TiO ₂ thin film layer is 5nm˜60nm.