CN106161306B - A kind of Fast Frequency Offset method of adjustment and device - Google Patents
A kind of Fast Frequency Offset method of adjustment and device Download PDFInfo
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- CN106161306B CN106161306B CN201610523712.0A CN201610523712A CN106161306B CN 106161306 B CN106161306 B CN 106161306B CN 201610523712 A CN201610523712 A CN 201610523712A CN 106161306 B CN106161306 B CN 106161306B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0024—Carrier regulation at the receiver end
- H04L2027/0026—Correction of carrier offset
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Abstract
The present invention discloses a kind of Fast Frequency Offset method of adjustment and device, the described method comprises the following steps: traversing all diameters first, obtains the corresponding road the I parameter of every root diameter and the road Q parameter；Then in each chip set, the corresponding energy value of every root diameter and drift value are calculated separately according to the corresponding road the I parameter of every root diameter and the road Q parameter；Then at the end of the chip set of preset numbers, adds up respectively to the energy value and drift value of current all diameters, obtain energy accumulation value and drift accumulated value；Energy accumulated value and drift accumulated value are divided by, arcsine coefficient is obtained, according to the corresponding relationship of arcsine coefficient and angle, obtains deviation angle；According to the corresponding relationship of deviation angle and frequency deviation adjusted value, frequency deviation adjusted value is obtained, and crystal oscillator frequency deviation is adjusted with frequency deviation adjusted value.This method is guaranteed quickly adjust frequency deviation in frequency deviation adjusts the period by repeatedly adjustment, saves the wakeup time of terminal sleeping state, achieve the purpose that province's power consumption.
Description
Technical field
The present invention relates to broadband CDMA system field more particularly to a kind of Fast Frequency Offset method of adjustment and devices.
Background technique
Wideband code division multiple access (WCDMA, Wideband Code Division Multiple Access) technology is current
The maximum a kind of width wireless access technology of influence power in 3G communication.Terminal is under CELL_PCH state, can periodically starting be received
PICH, to be confirmed whether to have the paging information for issuing the terminal.In order to save power consumption, agreement prescribed terminal is carrying out DRX reception
When (i.e. discontinuous reception), in the place of non-reception PICH (Page Indication Channel), dormant state can be entered, until needing to connect
Terminal is waken up again when receiving PICH.When waking up terminal, wakeup time is longer, then power consumption is higher；Wakeup time is got over
Short, power consumption is lower.WCDMA system uses DCXO crystal oscillator, and the crystal oscillator is very sensitive for temperature, and in DRX dormant period, frequency deviation is swung
It is very big, need fast quick-recovery.
Existing frequency offset regulation method calculates frequency deviation generally according to adjacent phase rotation twice, and this method calculates multiple
Miscellaneous, frequency deviation is regulated the speed slowly, and power consumption is caused to increase.
Summary of the invention
For this reason, it may be necessary to a kind of technical solution of Fast Frequency Offset adjustment be provided, to solve existing frequency offset regulation method adjustment
Speed is slow, terminal wakeup time is long, power consumption of terminal is led to problems such as to increase.
To achieve the above object, a kind of Fast Frequency Offset method of adjustment is inventor provided, the method adjusts week in frequency deviation
It is completed in phase, the frequency deviation adjustment period includes several chip sets, and each chip set is numbered, the chip set packet
Include several chips；It the described method comprises the following steps:
All diameters are traversed, the corresponding road the I parameter of every root diameter and the road Q parameter are obtained；
In each chip set, the corresponding energy of every root diameter is calculated separately according to the corresponding road the I parameter of every root diameter and the road Q parameter
Magnitude and drift value；
At the end of the chip set of preset numbers, adds up, obtain to the energy value and drift value of current all diameters respectively
To energy accumulation value and drift accumulated value；Energy accumulated value and drift accumulated value are divided by, arcsine coefficient is obtained, according to anyway
The corresponding relationship of string coefficient and angle, obtains deviation angle；According to the corresponding relationship of deviation angle and frequency deviation adjusted value, frequency deviation tune is obtained
Whole value, and crystal oscillator frequency deviation is adjusted with frequency deviation adjusted value.
Further, the drift value includes the first drift value and the second drift value, and the second drift value passes through first
Drift value carries out IIR and filters to obtain, and the drift accumulated value is the accumulated value of the second drift value.
Further, first drift value of certain root diameter in current chip group are as follows: the diameter is on the corresponding road Q of current chip group
Parameter and the diameter subtract the diameter in the corresponding road the I parameter of current chip group and are somebody's turn to do in the product of the road the I parameter of a upper chip set
Product of the diameter in the road the Q parameter of a upper chip set.
Further, the energy value includes the first energy value and the second energy value, and second energy value passes through first
Energy value carries out IIR and filters to obtain, and the energy accumulation value is the accumulated value of the second energy value.
Further, first energy value of certain root diameter in current chip group are as follows: the diameter is flat in the road the I parameter of current chip group
Side, in addition square of the diameter in the road current chip group Q parameter.
Further, at the end of the chip set of different preset numbers, the filter factor for carrying out IIR filtering is different.
Further, the chip set quantity for being included in the frequency deviation adjustment period is 35, and each chip set includes 256
A chip.
Further, the chip set of the preset numbers is followed successively by the chip set that number is 5,10,15,25,35.
Inventor additionally provides a kind of Fast Frequency Offset adjustment device, and described device is within the frequency deviation adjustment period to crystal oscillator frequency deviation
It is adjusted, the frequency deviation adjustment period includes several chip sets, and each chip set is numbered, the chip set packet
Include 256 several chips；Described device includes parameter acquiring unit, computing unit, frequency deviation adjusted value acquiring unit, frequency deviation adjustment list
Member；The computing unit includes the first computing unit, the second computing unit and third computing unit；
The parameter acquiring unit obtains the corresponding road the I parameter of every root diameter and the road Q parameter for traversing all diameters；
First computing unit is used in each chip set, according to the corresponding road the I parameter of every root diameter and the road Q parameter meter
The corresponding energy value of every root diameter is calculated, second computing unit is used in each chip set, is joined according to the corresponding road I of every root diameter
Several drift values corresponding with the road the Q parameter every root diameter of calculating；
The third computing unit is used at the end of the chip set of preset numbers, respectively to the energy value of current all diameters
It adds up with drift value, obtains energy accumulation value and drift accumulated value, and energy accumulated value and drift accumulated value are divided by, obtain
To arcsine coefficient；
The frequency deviation adjusted value acquiring unit is used for the corresponding relationship according to arcsine coefficient and angle, obtains deviation angle,
Then according to the corresponding relationship of deviation angle and frequency deviation adjusted value, frequency deviation adjusted value is obtained；
The frequency deviation adjustment unit is used to be adjusted crystal oscillator frequency deviation using the frequency deviation adjusted value.
Further, the drift value includes the first drift value and the second drift value, and the second drift value passes through first
Drift value carries out IIR and filters to obtain, and the drift accumulated value is the accumulated value of the second drift value.
Further, first drift value of certain root diameter in current chip group are as follows: the diameter is on the corresponding road Q of current chip group
Parameter and the diameter subtract the diameter in the corresponding road the I parameter of current chip group and are somebody's turn to do in the product of the road the I parameter of a upper chip set
Product of the diameter in the road the Q parameter of a upper chip set.
Further, the energy value includes the first energy value and the second energy value, and second energy value passes through first
Energy value carries out IIR and filters to obtain, and the energy accumulation value is the accumulated value of the second energy value.
Further, first energy value of certain root diameter in current chip group are as follows: the diameter is flat in the road the I parameter of current chip group
Side, in addition square of the diameter in the road current chip group Q parameter.
Further, at the end of the chip set of different preset numbers, the filter factor for carrying out IIR filtering is different.
Further, the chip set quantity for being included in the frequency deviation adjustment period is 35, and each chip set includes 256
A chip.
Further, the chip set of the preset numbers is followed successively by the chip set that number is 5,10,15,25,35.
Fast Frequency Offset method of adjustment and device described in above-mentioned technical proposal, the method are complete within the frequency deviation adjustment period
At the frequency deviation adjustment period includes several chip sets, and each chip set is numbered, and the chip set includes several
Chip；It the described method comprises the following steps: traversing all diameters first, obtain the corresponding road the I parameter of every root diameter and the road Q parameter；
Then in each chip set, the corresponding energy value of every root diameter is calculated separately according to the corresponding road the I parameter of every root diameter and the road Q parameter
With drift value；Then at the end of the chip set of preset numbers, the energy value to current all diameters and drift value are carried out tired respectively
Add, obtains energy accumulation value and drift accumulated value；Energy accumulated value and drift accumulated value are divided by, arcsine coefficient, root are obtained
According to the corresponding relationship of arcsine coefficient and angle, deviation angle is obtained；According to the corresponding relationship of deviation angle and frequency deviation adjusted value, obtain
Frequency deviation adjusted value, and crystal oscillator frequency deviation is adjusted with frequency deviation adjusted value.In this way, after the chip set of each pre-arranged code
Frequency deviation is once adjusted, guarantees quickly adjust frequency deviation in frequency deviation adjusts the period by repeatedly adjusting, saves terminal
The wakeup time of dormant state achievees the purpose that province's power consumption.
Detailed description of the invention
Fig. 1 is the flow chart for the Fast Frequency Offset method of adjustment that one embodiment of the invention is related to；
Fig. 2 is the schematic diagram that the Fast Frequency Offset that one embodiment of the invention is related to adjusts device；
Description of symbols:
101, parameter acquiring unit；
102, computing unit；121, the first computing unit；122, the second computing unit；123, third computing unit；
103, frequency deviation adjusted value acquiring unit；
104, frequency deviation adjustment unit.
Specific embodiment
Technology contents, construction feature, the objects and the effects for detailed description technical solution, below in conjunction with specific reality
It applies example and attached drawing is cooperated to be explained in detail.
Referring to Fig. 1, the flow chart for the Fast Frequency Offset method of adjustment being related to for one embodiment of the invention.The method is in frequency
It is completed in the adjustment period partially, the frequency deviation adjustment period includes several chip sets, and each chip set is numbered, described
Chip set includes several chips.Chip and chip set are to characterize the unit of time cycle, it is preferred that in the present embodiment,
The chip set is symbol (symbol), 1symbol=256chip (chip).In other embodiments, the chip set packet
Quantity containing chip can also take other values according to actual needs.It the described method comprises the following steps:
It initially enters step S101 and traverses all diameters, obtain the corresponding road the I parameter of every root diameter and the road Q parameter.Same letter
Number diffraction can occur after encountering barrier, form more root diameters, traverse the peak that all diameters refer to RAKE receiver search signal
It is worth the process of point (finger), including search peak point, adjustment peak point position, locking peak point etc..Meanwhile receiver can incite somebody to action
Analog signal is converted to digital signal, and obtains the I of each diameter in each chip (chronomere, 10ms=38400chip)
Road parameter and the road Q parameter.The road I parameter and the road Q parameter are two parameters needed for adjustment frequency deviation.In the present embodiment, described
The corresponding road the I parameter of every root diameter and the road Q parameter are every root diameter in the corresponding road the I parameter of CPICH Common Pilot Channel symbol and the road Q parameter.
S102 is then entered step in each chip set, is counted respectively according to the corresponding road the I parameter of every root diameter and the road Q parameter
Calculate the corresponding energy value of every root diameter and drift value.In the present embodiment, the drift value includes that the first drift value and second is floatd
Shifting value, the second drift value filter drift value progress IIR by the first IIR and filter to obtain.Certain root diameter is in current chip group
The first drift value are as follows: the diameter multiplies in the corresponding road the Q parameter of current chip group and the diameter in the road the I parameter of a upper chip set
Product, subtract the diameter the corresponding road the I parameter of current chip group and the diameter the road the Q parameter of a upper chip set product.Such as
Now with two adjacent chip sets: the first chip set and the second chip set, I road parameter and Q of certain root diameter in the first chip set
Road parameter uses I1 and Q1 respectively, which is respectively I2 and Q2 in the road the I parameter and the road Q parameter of the second chip set, then the second chip
First drift value fre2=I1Q2-I2Q1 of the diameter in group.Second drift value carries out IIR by the first drift value and filters to obtain,
Specifically, if the second drift value in the first chip set is IIRfre1, the first drift value in the second chip set is fre2, then
The second drift value IIRfre2=IIRfre1+ (fre2-IIRfre1) * cof in second chip set, wherein cof is filtering ginseng
Number, * indicate multiplication sign.
In the present embodiment, the energy value includes the first energy value and the second energy value, and second energy value is logical
The first energy value IIR filter value is crossed to filter to obtain with current energy value progress IIR.First energy of certain root diameter in current chip group
Value are as follows: the diameter current chip group the road I parameter square, in addition square of the diameter in the road current chip group Q parameter.Such as certain root
Diameter uses I and Q in the road the I parameter and the road Q parameter of certain chip set respectively, then first energy value of the diameter in the chip set is En=
I2+Q2, the second energy value (IIREn) calculation formula is as follows: IIREn=IIREn-1+(En-IIREn-1) * cof wherein, IIREn-1For
Second energy value of a upper chip set for current chip group, cof is filter factor.
S103 is then entered step at the end of the chip set of preset numbers, the energy value to current all diameters and is floatd respectively
Shifting value adds up, and obtains energy accumulation value and drift accumulated value, and energy accumulated value and drift accumulated value are divided by, obtained anyway
String system.In the present embodiment, the drift accumulated value is the accumulated value of the second drift value, the energy accumulation value is second
The accumulated value of energy value.In the present embodiment, the chip set quantity for being included in the frequency deviation adjustment period is 35, each
Chip set includes 256 chips.The chip set of the preset numbers is followed successively by the chip set that number is 5,10,15,25,35.I.e.
It is that an entire frequency deviation adjusts the period with 35 symbols (256 chip), 5 tune is carried out to frequency deviation within each frequency deviation adjustment period
Whole, the time adjusted every time is after the sign-off that number is 5,10,15,25,35 respectively.In the present embodiment, not
At the end of chip set with preset numbers, the filter factor for carrying out IIR filtering is different.Specifically, in the code of preset numbers 5 to 15
IIR filtering is carried out using biggish filter factor in piece group, and uses biggish filter in the chip set of preset numbers 25 to 35
Wave system number carries out IIR filtering.In this way, can greatly be adjusted to frequency deviation, in the adjustment of 3 times frequency deviation last
When adjusting twice, then the amplitude adjusted is smaller, so that frequency deviation adjustment more prepares.In other embodiments, the frequency deviation adjustment
The chip set quantity for being included in period can select any other quantity according to actual needs, and the preset numbers of chip set can also
With customized decision.Such as each frequency deviation adjustment period includes 100 symbols, then it can be with every 10 codes in preceding 60 chip sets
Piece group carries out the adjustment of frequency deviation, every 20 chip sets carry out a frequency deviation adjustment in rear 40 chip sets, i.e. preset numbers
The number of chip set is followed successively by 10,20,30,40,50,60,80,100, it is preferred that in the chip set that number is 1 to 60
IIR filtering can use relatively large numerical value, to guarantee the speed of frequency deviation adjustment, shorten adjustment time, in 60 to 100 code
IIR filtering in piece group can use relatively small numerical value, to guarantee the precision of frequency deviation adjustment, guarantee the accurate of frequency deviation adjustment
Property.
S104 is then entered step according to the corresponding relationship of arcsine coefficient and angle, deviation angle is obtained, according to deviation angle
With the corresponding relationship of frequency deviation adjusted value, frequency deviation adjusted value is obtained.The relationship of arcsine coefficient (arcsin value) and angle can be with thing
It is first stored in a table, when learning calculated arcsine coefficient in a certain chip set, it is anti-that this can be obtained by meter reading
The corresponding deviation angle of sinusoidal coefficients.Similarly, after learning deviation angle, the corresponding frequency deviation tune of the deviation angle can be obtained by meter reading
Whole value.
It then enters step S105 and crystal oscillator frequency deviation is adjusted with frequency deviation adjusted value.Preferably, terminate in frequency deviation adjustment
Afterwards, the method also includes emptying the data cached of this calculating, such as calculated energy accumulation value, drift accumulated value etc.
Deng.Through the above scheme, so that can quickly be adjusted in place crystal oscillator frequency deviation within a frequency deviation adjustment period, function is saved
Consumption.
Referring to Fig. 2, adjusting the schematic diagram of device for the Fast Frequency Offset that one embodiment of the invention is related to.Described device is in frequency
Crystal oscillator frequency deviation is adjusted in the adjustment period partially, the frequency deviation adjustment period includes several chip sets, and to each chip
Group is numbered, and the chip set includes several chips；Described device includes parameter acquiring unit 101, computing unit 102, frequency
Inclined adjusted value acquiring unit 103, frequency deviation adjustment unit 104；The computing unit is calculated including the first computing unit 101, second
Unit 102 and third computing unit 103；
The parameter acquiring unit 101 obtains the corresponding road the I parameter of every root diameter and the road Q parameter for traversing all diameters；
First computing unit 121 is used in each chip set, is joined according to the corresponding road the I parameter of every root diameter and the road Q
Number calculates the corresponding energy value of every root diameter, and second computing unit 122 is used in each chip set, corresponding according to every root diameter
The road I parameter and the road Q parameter calculate the corresponding drift value of every root diameter；
The third computing unit 123 is used at the end of the chip set of preset numbers, respectively to the energy of current all diameters
Magnitude and drift value add up, and obtain energy accumulation value and drift accumulated value, and by energy accumulated value and drift accumulated value phase
It removes, obtains arcsine coefficient；
The frequency deviation adjusted value acquiring unit 103 is used for the corresponding relationship according to arcsine coefficient and angle, is deviated
Angle obtains frequency deviation adjusted value then according to the corresponding relationship of deviation angle and frequency deviation adjusted value；
The frequency deviation adjustment unit 104 is used to be adjusted crystal oscillator frequency deviation using the frequency deviation adjusted value.
When using Fast Frequency Offset adjustment device, parameter acquiring unit 101 traverses all diameters first, obtains every root diameter pair
The road the I parameter and the road Q parameter answered.Diffraction can occur after encountering barrier for same signal, form more root diameters, traverse all diameters
Refer to the process of the peak point (finger) of RAKE receiver search signal, including search peak point, adjustment peak point position, lock
Determine peak point etc..Meanwhile receiver can convert analog signals into digital signal, and obtain each chip (chronomere,
The road the I parameter of each diameter and the road Q parameter in 10ms=38400chip).The road I parameter and the road Q parameter are two needed for adjustment frequency deviation
A parameter.
Then the first computing unit 121 is in each chip set, according to the corresponding road the I parameter of every root diameter and the road Q parameter meter
The corresponding energy value of every root diameter is calculated, then the second computing unit 122 is joined in each chip set according to the corresponding road I of every root diameter
Several drift values corresponding with the road the Q parameter every root diameter of calculating.In the present embodiment, the drift value includes the first drift value and the
Two drift values, the second drift value filter drift value progress IIR by the first IIR and filter to obtain.Certain root diameter is in current chip
The first drift value in group are as follows: the diameter the corresponding road the Q parameter of current chip group and the diameter a upper chip set the road I parameter
Product, subtract the diameter the corresponding road the I parameter of current chip group and the diameter the road the Q parameter of a upper chip set product.
Such as now with two adjacent chip sets: the first chip set and the second chip set, I road parameter of certain root diameter in the first chip set
I1 and Q1 are used respectively with the road Q parameter, which is respectively I2 and Q2 in the road the I parameter and the road Q parameter of the second chip set, then second code
First drift value fre2=I1Q2-I2Q1 of the diameter in piece group.Second drift value carries out IIR by the first drift value and filters
It arrives, specifically, if the second drift value in the first chip set is IIRfre1, the first drift value in the second chip set is fre2,
Then the second drift value IIRfre2=IIRfre1+ (fre2-IIRfre1) * cof in the second chip set, wherein cof is filtering
Parameter, * indicate multiplication sign.
In the present embodiment, the energy value includes the first energy value and the second energy value, and second energy value is logical
The first energy value IIR filter value is crossed to filter to obtain with current energy value progress IIR.First energy of certain root diameter in current chip group
Value are as follows: the diameter current chip group the road I parameter square, in addition square of the diameter in the road current chip group Q parameter.Such as certain root
Diameter uses I and Q in the road the I parameter and the road Q parameter of certain chip set respectively, then first energy value of the diameter in the chip set is En=
I2+Q2, the second energy value (IIREn) calculation formula is as follows: IIREn=IIREn-1+(En-IIREn-1) * cof wherein, IIREn-1For
Second energy value of a upper chip set for current chip group, cof is filter factor.
Then third computing unit 123 is at the end of the chip set of preset numbers, respectively to the energy value of current all diameters
It adds up with drift value, obtains energy accumulation value and drift accumulated value, energy accumulated value and drift accumulated value are divided by, obtained
Arcsine system.In the present embodiment, the drift accumulated value is the accumulated value of the second drift value, the energy accumulation value is
The accumulated value of second energy value.In the present embodiment, the chip set quantity for being included in the frequency deviation adjustment period is 35,
Each chip set includes 256 chips.The chip set of the preset numbers is followed successively by the chip that number is 5,10,15,25,35
Group.It is that an entire frequency deviation adjusts the period with 35 symbols (256 chip), frequency deviation is carried out within each frequency deviation adjustment period
5 adjustment, the time adjusted every time are after the sign-off that number is 5,10,15,25,35 respectively.In the present embodiment,
At the end of the chip set of different preset numbers, the filter factor for carrying out IIR filtering is different.Specifically, in preset numbers 5 to 15
Chip set in IIR filtering carried out using biggish filter factor, and using larger in the chip set of preset numbers 25 to 35
Filter factor carry out IIR filtering.In this way, frequency deviation can greatly be adjusted in the adjustment of 3 times frequency deviation,
When finally adjusting twice, then the amplitude adjusted is smaller, so that frequency deviation adjustment more prepares.In other embodiments, the frequency deviation
The chip set quantity for being included in the adjustment period can select any other quantity, the preset numbers of chip set according to actual needs
It customized can also determine.Such as each frequency deviation adjustment period includes 100 symbols, then it can be with every 10 in preceding 60 chip sets
A chip set carries out a frequency deviation adjustment, and every 20 chip sets carry out a frequency deviation adjustment in rear 40 chip sets, i.e., default to compile
Number the number of chip set be followed successively by 10,20,30,40,50,60,80,100, it is preferred that in the chip set that number is 1 to 60
IIR filtering can use relatively large numerical value, with guarantee frequency deviation adjustment speed, shorten adjustment time, 60 to 100
IIR filtering in chip set can use relatively small numerical value, to guarantee the precision of frequency deviation adjustment, guarantee the standard of frequency deviation adjustment
True property.
Then frequency deviation adjusted value acquiring unit 103 obtains deviation angle, root according to the corresponding relationship of arcsine coefficient and angle
According to the corresponding relationship of deviation angle and frequency deviation adjusted value, frequency deviation adjusted value is obtained.The pass of arcsine coefficient (arcsin value) and angle
System can be stored in advance in a table, when learning calculated arcsine coefficient in a certain chip set, pass through meter reading
Obtain the corresponding deviation angle of arcsine coefficient.Similarly, after learning deviation angle, it is corresponding which can be obtained by meter reading
Frequency deviation adjusted value.
Then frequency deviation adjustment unit 104 is adjusted crystal oscillator frequency deviation with frequency deviation adjusted value.Preferably, it adjusts and ties in frequency deviation
Shu Hou, the method also includes emptying the data cached of this calculating, such as calculated energy accumulation value, drift accumulated value etc.
Deng.Through the above scheme, so that can quickly be adjusted in place crystal oscillator frequency deviation within a frequency deviation adjustment period, function is saved
Consumption.
Fast Frequency Offset method of adjustment and device described in above-mentioned technical proposal, the method are complete within the frequency deviation adjustment period
At the frequency deviation adjustment period includes several chip sets, and each chip set is numbered, and the chip set includes several
Chip；It the described method comprises the following steps: traversing all diameters first, obtain the corresponding road the I parameter of every root diameter and the road Q parameter；
Then in each chip set, the corresponding energy value of every root diameter is calculated separately according to the corresponding road the I parameter of every root diameter and the road Q parameter
With drift value；Then at the end of the chip set of preset numbers, the energy value to current all diameters and drift value are carried out tired respectively
Add, obtains energy accumulation value and drift accumulated value；Energy accumulated value and drift accumulated value are divided by, arcsine coefficient, root are obtained
According to the corresponding relationship of arcsine coefficient and angle, deviation angle is obtained；According to the corresponding relationship of deviation angle and frequency deviation adjusted value, obtain
Frequency deviation adjusted value, and crystal oscillator frequency deviation is adjusted with frequency deviation adjusted value.In this way, after the chip set of each pre-arranged code
Frequency deviation is once adjusted, guarantees quickly adjust frequency deviation in frequency deviation adjusts the period by repeatedly adjusting, saves terminal
The wakeup time of dormant state achievees the purpose that province's power consumption.
It should be noted that, in this document, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or the terminal device that include a series of elements not only include those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or end
The intrinsic element of end equipment.In the absence of more restrictions, being limited by sentence " including ... " or " including ... "
Element, it is not excluded that there is also other elements in process, method, article or the terminal device for including the element.This
Outside, herein, " being greater than ", " being less than ", " being more than " etc. are interpreted as not including this number；" more than ", " following ", " within " etc. understand
Being includes this number.
It should be understood by those skilled in the art that, the various embodiments described above can provide as method, apparatus or computer program production
Product.Complete hardware embodiment, complete software embodiment or embodiment combining software and hardware aspects can be used in these embodiments
Form.The all or part of the steps in method that the various embodiments described above are related to can be instructed by program relevant hardware come
It completes, the program can store in the storage medium that computer equipment can be read, for executing the various embodiments described above side
All or part of the steps described in method.The computer equipment, including but not limited to: personal computer, server, general-purpose computations
It is machine, special purpose computer, the network equipment, embedded device, programmable device, intelligent mobile terminal, smart home device, wearable
Smart machine, vehicle intelligent equipment etc.；The storage medium, including but not limited to: RAM, ROM, magnetic disk, tape, CD, sudden strain of a muscle
It deposits, USB flash disk, mobile hard disk, storage card, memory stick, webserver storage, network cloud storage etc..
The various embodiments described above are referring to the method according to embodiment, equipment (system) and computer program product
Flowchart and/or the block diagram describes.It should be understood that can be realized by computer program instructions every in flowchart and/or the block diagram
The combination of process and/or box in one process and/or box and flowchart and/or the block diagram.It can provide these computers
Program instruction generates a machine to the processor of computer equipment, so that the finger executed by the processor of computer equipment
It enables and generates to specify in one or more flows of the flowchart and/or one or more blocks of the block diagram
The device of function.
These computer program instructions, which may also be stored in, to be able to guide computer equipment computer operate in a specific manner and sets
In standby readable memory, so that the instruction being stored in the computer equipment readable memory generates the manufacture including command device
Product, command device realization refer in one or more flows of the flowchart and/or one or more blocks of the block diagram
Fixed function.
These computer program instructions can also be loaded into computer equipment, so that executing on a computing device a series of
Operating procedure is to generate computer implemented processing, so that the instruction executed on a computing device is provided for realizing in process
The step of function of being specified in figure one process or multiple processes and/or block diagrams one box or multiple boxes.
Although the various embodiments described above are described, once a person skilled in the art knows basic wounds
The property made concept, then additional changes and modifications can be made to these embodiments, so the above description is only an embodiment of the present invention,
It is not intended to limit scope of patent protection of the invention, it is all to utilize equivalent structure made by description of the invention and accompanying drawing content
Or equivalent process transformation, being applied directly or indirectly in other relevant technical fields, similarly includes in patent of the invention
Within protection scope.
Claims (12)
1. a kind of Fast Frequency Offset method of adjustment, the method is completed within the frequency deviation adjustment period, and the frequency deviation adjustment period includes
Several chip sets, and each chip set is numbered, the chip set includes several chips；It is characterized in that, the side
Method the following steps are included:
All diameters are traversed, obtain the corresponding road the I parameter of every root diameter and the road Q parameter, the corresponding road the I parameter of the every root diameter and Q
Road parameter is every root diameter in the corresponding road the I parameter of CPICH Common Pilot Channel symbol and the road Q parameter；
In each chip set, the corresponding energy value of every root diameter is calculated separately according to the corresponding road the I parameter of every root diameter and the road Q parameter
With drift value；
At the end of the chip set of preset numbers, adds up respectively to the energy value and drift value of current all diameters, obtain energy
Measure accumulated value and drift accumulated value；Energy accumulated value and drift accumulated value are divided by, arcsine coefficient is obtained, according to arcsine system
Several corresponding relationships with angle, obtain deviation angle；According to the corresponding relationship of deviation angle and frequency deviation adjusted value, frequency deviation adjustment is obtained
Value, and crystal oscillator frequency deviation is adjusted with frequency deviation adjusted value；
The drift value includes the first drift value and the second drift value, and the second drift value carries out IIR by the first drift value
Filtering obtains, and the drift accumulated value is the accumulated value of the second drift value；First drift value of certain root diameter in current chip group
Are as follows: the diameter, in the product of the road the I parameter of a upper chip set, subtracts the diameter in the corresponding road the Q parameter of current chip group and the diameter
The corresponding road the I parameter of current chip group and the diameter the road the Q parameter of a upper chip set product.
2. Fast Frequency Offset method of adjustment according to claim 1, which is characterized in that the energy value includes the first energy value
With the second energy value, second energy value carries out IIR by the first energy value and filters to obtain, and the energy accumulation value is second
The accumulated value of energy value.
3. Fast Frequency Offset method of adjustment according to claim 2, which is characterized in that certain root diameter in current chip group first
Energy value are as follows: the diameter current chip group the road I parameter square, in addition square of the diameter in the road current chip group Q parameter.
4. Fast Frequency Offset method of adjustment according to claim 1 or 2, which is characterized in that in the chip of different preset numbers
At the end of group, the filter factor for carrying out IIR filtering is different.
5. Fast Frequency Offset method of adjustment according to claim 1, which is characterized in that included in the frequency deviation adjustment period
Chip set quantity be 35, each chip set include 256 chips.
6. Fast Frequency Offset method of adjustment according to claim 5, which is characterized in that the chip set of the preset numbers is successively
The chip set for being 5,10,15,25,35 for number.
7. a kind of Fast Frequency Offset adjusts device, described device is adjusted crystal oscillator frequency deviation within the frequency deviation adjustment period, the frequency
The adjustment period includes several chip sets partially, and each chip set is numbered, and the chip set includes several chips；It is special
Sign is that described device includes parameter acquiring unit, computing unit, frequency deviation adjusted value acquiring unit, frequency deviation adjustment unit；It is described
Computing unit includes the first computing unit, the second computing unit and third computing unit；
The parameter acquiring unit is used to traverse all diameters, obtains the corresponding road the I parameter of every root diameter and the road Q parameter, described every
The corresponding road the I parameter of root diameter and the road Q parameter are every root diameter in the corresponding road the I parameter of CPICH Common Pilot Channel symbol and the road Q parameter；
First computing unit is used in each chip set, is calculated according to the corresponding road the I parameter of every root diameter and the road Q parameter every
The corresponding energy value of root diameter, second computing unit are used in each chip set, according to the corresponding road the I parameter of every root diameter and
The road Q parameter calculates the corresponding drift value of every root diameter；
The third computing unit is used at the end of the chip set of preset numbers, the energy value to current all diameters and is floatd respectively
Shifting value adds up, and obtains energy accumulation value and drift accumulated value, and energy accumulated value and drift accumulated value are divided by, and obtains anti-
Sinusoidal coefficients；
The frequency deviation adjusted value acquiring unit is used for the corresponding relationship according to arcsine coefficient and angle, obtains deviation angle, then
According to the corresponding relationship of deviation angle and frequency deviation adjusted value, frequency deviation adjusted value is obtained；
The frequency deviation adjustment unit is used to be adjusted crystal oscillator frequency deviation using the frequency deviation adjusted value；The drift value includes the
One drift value and the second drift value, the second drift value carry out IIR by the first drift value and filter to obtain, and the drift is cumulative
Value is the accumulated value of the second drift value；First drift value of certain root diameter in current chip group are as follows: the diameter is in current chip group pair
The road the Q parameter answered and the diameter subtract the diameter on the corresponding road I of current chip group in the product of the road the I parameter of a upper chip set
The product of parameter and the diameter in the road the Q parameter of a upper chip set.
8. Fast Frequency Offset according to claim 7 adjusts device, which is characterized in that the energy value includes the first energy value
With the second energy value, second energy value carries out IIR by the first energy value and filters to obtain, and the energy accumulation value is second
The accumulated value of energy value.
9. Fast Frequency Offset according to claim 8 adjusts device, which is characterized in that certain root diameter in current chip group first
Energy value are as follows: the diameter current chip group the road I parameter square, in addition square of the diameter in the road current chip group Q parameter.
10. Fast Frequency Offset according to claim 7 or 8 adjusts device, which is characterized in that in the chip of different preset numbers
At the end of group, the filter factor for carrying out IIR filtering is different.
11. Fast Frequency Offset according to claim 7 adjusts device, which is characterized in that wrapped in the frequency deviation adjustment period
The chip set quantity contained is 35, and each chip set includes 256 chips.
12. Fast Frequency Offset according to claim 11 adjusts device, which is characterized in that the chip set of the preset numbers according to
Secondary is the chip set that number is 5,10,15,25,35.
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| CN1264228A (en) * | 2000-02-01 | 2000-08-23 | 深圳市中兴通讯股份有限公司 | Automatic frequency control method and device in broadband CDMA system |
| CN101188430A (en) * | 2006-11-15 | 2008-05-28 | 中兴通讯股份有限公司 | Device and method for frequency offset pre-compensation of wideband code division multiple access user equipment |
| CN101667846A (en) * | 2008-09-03 | 2010-03-10 | 中兴通讯股份有限公司 | Method and device for automatically controlling frequency in TD-SCDMA system |
| CN104619006A (en) * | 2015-01-29 | 2015-05-13 | 武汉剑通信息技术有限公司 | GSM (global system for mobile communications) network frequency offset correcting algorithm |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19854167C2 (en) * | 1998-11-24 | 2000-09-28 | Siemens Ag | Frequency-stabilized transmission / reception circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1264228A (en) * | 2000-02-01 | 2000-08-23 | 深圳市中兴通讯股份有限公司 | Automatic frequency control method and device in broadband CDMA system |
| CN101188430A (en) * | 2006-11-15 | 2008-05-28 | 中兴通讯股份有限公司 | Device and method for frequency offset pre-compensation of wideband code division multiple access user equipment |
| CN101667846A (en) * | 2008-09-03 | 2010-03-10 | 中兴通讯股份有限公司 | Method and device for automatically controlling frequency in TD-SCDMA system |
| CN104619006A (en) * | 2015-01-29 | 2015-05-13 | 武汉剑通信息技术有限公司 | GSM (global system for mobile communications) network frequency offset correcting algorithm |
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