CN106158581B - A method for alloying a wafer after wiring - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 50
- 238000005275 alloying Methods 0.000 title claims abstract description 25
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 78
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 30
- 239000007789 gas Substances 0.000 claims abstract description 25
- 229910001873 dinitrogen Inorganic materials 0.000 claims abstract description 18
- 239000001257 hydrogen Substances 0.000 claims abstract description 18
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 18
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 17
- 239000012299 nitrogen atmosphere Substances 0.000 claims abstract description 14
- 239000012159 carrier gas Substances 0.000 claims abstract description 5
- 150000002431 hydrogen Chemical class 0.000 claims description 5
- 238000001816 cooling Methods 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 abstract description 20
- 239000000956 alloy Substances 0.000 abstract description 13
- 229910045601 alloy Inorganic materials 0.000 abstract description 13
- 230000008439 repair process Effects 0.000 abstract description 9
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 7
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 239000010703 silicon Substances 0.000 abstract description 3
- 230000008569 process Effects 0.000 description 24
- 230000010355 oscillation Effects 0.000 description 18
- 238000000137 annealing Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 3
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 239000012535 impurity Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 230000002195 synergetic effect Effects 0.000 description 1
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28247—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
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Abstract
本发明提供一种对布线后晶圆进行合金化处理的方法，该方法包括：将布线后的晶圆置于一腔体内，向腔体内连续通入用于载气的氮气，并将腔体温度升温至第一预设温度；保持第一预设温度，向腔体内以预设流量通入一含有预设比例氢气的混合气体并持续第一预设时间；其中，预设流量大于流量门限值；混合气体通入结束后，向腔体内再次通入氮气直至晶圆所处的腔体内为纯氮气，在纯氮气气氛下冷却腔体。该方法通过对半导体制造技术中的合金菜单的优化，即将合金时通预设比例氢气的流量增大，有效地钝化界面附近Si(硅)悬挂键，大大降低界面态密度，修复栅氧的质量，从而改变NMOS电容的C‑V曲线特性，继而达到改善频率失效的目的，同时也就改善了产品良率。
The invention provides a method for alloying a wafer after wiring. The method includes: placing the wafer after wiring in a cavity, continuously feeding nitrogen gas for carrier gas into the cavity, and placing the cavity in the cavity. The temperature is raised to the first preset temperature; the first preset temperature is maintained, and a mixed gas containing a preset proportion of hydrogen is introduced into the cavity at a preset flow rate for a first preset time; wherein, the preset flow rate is greater than the flow gate Limit; after the mixed gas is introduced, nitrogen is introduced into the cavity again until the cavity where the wafer is located is pure nitrogen, and the cavity is cooled in a pure nitrogen atmosphere. The method optimizes the alloy menu in the semiconductor manufacturing technology, that is, increases the flow rate of hydrogen through the alloy at a preset ratio, effectively passivates the Si (silicon) dangling bonds near the interface, greatly reduces the interface state density, and repairs the gate oxide. quality, thereby changing the C-V curve characteristics of NMOS capacitors, thereby achieving the purpose of improving frequency failure, and at the same time improving product yield.
Description
技术领域technical field
本发明涉及半导体芯片制造工艺技术领域，特别涉及一种对布线后晶圆进行合金化处理的方法。The invention relates to the technical field of semiconductor chip manufacturing processes, in particular to a method for alloying a wafer after wiring.
背景技术Background technique
在半导体制造CMOS工艺技术中，晶圆在完成布线后，会经过一道合金(Alloy)工艺，合金工艺相当于一个退火的过程，其目的在于使金属再结晶，修复离子造成的损伤等。在集成电路设计中，电路的设计者往往设计一个振荡电路能产生大小和方向相同的周期性振荡电流从而实现电路工作的目的。具体的，振荡电路的周期T＝1/f＝2πRC，从公式可以看出，振荡频率f与振荡电路的电阻R、电容C相关，振荡频率f与振荡电阻成反比，振荡频率f与振荡电容也成反比。对于振荡电路为NMOS电容、外接电阻(恒定值)的CMOS工艺产品，振荡电容C减小，则振荡频率f增大；振荡电容C增大，则振荡频率f减小。等效的振荡电路如图1所示。NMOS电容C＝(εS)/(4πKd)，从公式可以看出，电容C与εS成正比，电容C与4πKd成反比。对于半导体制造NMOS电容中，栅氧的质量是会影响电容C的。比如，可移动离子电荷等。其中，ε为介电常数；S为电容上下极板对应的面积；d为电容上下极板对应的距离；K为一常数。In the semiconductor manufacturing CMOS process technology, after the wafer is wired, it will go through an alloying process. The alloying process is equivalent to an annealing process. The purpose is to recrystallize the metal and repair the damage caused by ions. In the design of integrated circuits, circuit designers often design an oscillator circuit that can generate periodic oscillating currents of the same magnitude and direction to achieve the purpose of circuit operation. Specifically, the period of the oscillation circuit T=1/f=2πRC, it can be seen from the formula that the oscillation frequency f is related to the resistance R and capacitance C of the oscillation circuit, the oscillation frequency f is inversely proportional to the oscillation resistance, and the oscillation frequency f is related to the oscillation capacitance also inversely proportional. For a CMOS process product whose oscillation circuit is an NMOS capacitor and an external resistor (constant value), if the oscillation capacitor C decreases, the oscillation frequency f increases; if the oscillation capacitor C increases, the oscillation frequency f decreases. The equivalent oscillator circuit is shown in Figure 1. NMOS capacitor C=(εS)/(4πKd). It can be seen from the formula that capacitance C is proportional to εS, and capacitance C is inversely proportional to 4πKd. For semiconductor manufacturing NMOS capacitors, the quality of the gate oxide will affect the capacitor C. For example, mobile ionic charge, etc. Among them, ε is the dielectric constant; S is the area corresponding to the upper and lower plates of the capacitor; d is the distance corresponding to the upper and lower plates of the capacitor; K is a constant.
现有技术中，在对晶圆的合金过程中通入的氢气H2的气体流量较小，不能很好的修复栅氧质量，影响NMOS电容C的稳定性及大小，继而使得振荡频率失效导致产品良率下降。In the prior art, the gas flow rate of hydrogen H 2 introduced in the process of alloying the wafer is small, which cannot repair the quality of the gate oxygen well, affects the stability and size of the NMOS capacitor C, and then causes the oscillation frequency to fail. Product yield decreased.
发明内容SUMMARY OF THE INVENTION
本发明的目的在于提供一种对布线后晶圆进行合金化处理的方法，修复NMOS电容的栅氧质量，从而改变NMOS电容的C-V曲线特性，继而达到改善频率失效，改善产品良率。The purpose of the present invention is to provide a method for alloying the wafer after wiring, to repair the gate oxide quality of the NMOS capacitor, thereby changing the C-V curve characteristics of the NMOS capacitor, thereby improving frequency failure and improving product yield.
为了达到上述目的，本发明实施例提供一种对布线后晶圆进行合金化处理的方法，包括：In order to achieve the above purpose, an embodiment of the present invention provides a method for alloying a wafer after wiring, including:
将布线后的晶圆置于一腔体内，向所述腔体内连续通入用于载气的氮气，并将腔体温度升温至第一预设温度；placing the wired wafer in a cavity, continuously feeding nitrogen for carrier gas into the cavity, and raising the temperature of the cavity to a first preset temperature;
保持第一预设温度，向所述腔体内以预设流量通入一含有预设比例氢气的混合气体并持续第一预设时间；其中，所述预设流量大于流量门限值；maintaining a first preset temperature, and feeding a mixed gas containing a preset proportion of hydrogen into the cavity at a preset flow rate for a first preset time; wherein, the preset flow rate is greater than a flow rate threshold;
混合气体通入结束后，向所述腔体内再次通入氮气直至所述晶圆所处的腔体内为纯氮气，在所述纯氮气气氛下冷却所述腔体。After the introduction of the mixed gas, nitrogen is introduced into the cavity again until the cavity where the wafer is located is pure nitrogen, and the cavity is cooled under the pure nitrogen atmosphere.
其中，向所述腔体内连续通入用于载气的氮气，并将腔体温度升温至第一预设温度，具体包括：Wherein, nitrogen for carrier gas is continuously introduced into the cavity, and the temperature of the cavity is raised to a first preset temperature, which specifically includes:
在所述腔体内通入流量为第一预设值的氮气，并将腔体温度升温至第一预设温度；Passing nitrogen gas with a flow rate of a first preset value into the cavity, and raising the temperature of the cavity to the first preset temperature;
将所述氮气的流量增大为第二预设值，继续向所述腔体内通入流量为第二预设值的氮气并持续第二预设时间。The flow rate of the nitrogen gas is increased to a second preset value, and the nitrogen gas with the flow rate of the second preset value is continuously supplied into the cavity for a second preset time.
其中，所述向所述腔体内再次通入氮气直至所述晶圆所处的腔体内为纯氮气，在所述纯氮气气氛下冷却所述腔体，具体包括：Wherein, introducing nitrogen into the cavity again until the cavity where the wafer is located is pure nitrogen, and cooling the cavity under the pure nitrogen atmosphere, specifically includes:
连续向所述腔体内通入流量为第三预设值的氮气并持续第三预设时间；其中，流量为第三预设值的氮气通入结束后，所述腔体内为纯氮气气氛；Continuously introducing nitrogen gas with a flow rate of a third preset value into the cavity for a third preset time; wherein, after the nitrogen gas flow with a flow rate of the third preset value ends, the cavity is in a pure nitrogen atmosphere;
将氮气流量减小为第四预设值，继续向所述纯氮气气氛的腔体内通入流量为第四预设值的氮气并持续第四预设时间；在所述第四预设时间内冷却所述腔体。Reduce the nitrogen flow rate to a fourth preset value, and continue to introduce nitrogen with a flow rate of the fourth preset value into the cavity of the pure nitrogen atmosphere for a fourth preset time; within the fourth preset time Cool the cavity.
优选的，所述流量门限值为6L/min，所述预设流量为10L/min，所述第一预设时间为30min。Preferably, the flow threshold value is 6L/min, the preset flow rate is 10L/min, and the first preset time is 30min.
优选的，所述混合气体为氮气和氢气，所述混合气体中氢气的比例为4％。Preferably, the mixed gas is nitrogen and hydrogen, and the proportion of hydrogen in the mixed gas is 4%.
优选的，所述第一预设温度为425℃。Preferably, the first preset temperature is 425°C.
优选的，所述第一预设值为8L/min，所述第二预设值为10L/min，所述第二预设时间为5min。Preferably, the first preset value is 8L/min, the second preset value is 10L/min, and the second preset time is 5min.
优选的，所述第三预设值为10L/min，所述第三预设时间为5min，所述第四预设值为8L/min，所述第四预设时间为40min。Preferably, the third preset value is 10L/min, the third preset time is 5min, the fourth preset value is 8L/min, and the fourth preset time is 40min.
本发明的上述技术方案至少具有如下有益效果：The above-mentioned technical scheme of the present invention has at least the following beneficial effects:
本发明实施例的对布线后晶圆进行合金化处理的方法中，通过对半导体制造技术中的合金菜单的优化，即将合金时通预设比例氢气的流量增大，则在不损伤晶圆的栅氧的结构的情况下，更加有效地钝化界面附近Si(硅)悬挂键，大大降低界面态密度，修复栅氧的质量，从而改变NMOS电容的C-V曲线特性，继而达到改善频率失效的目的，同时也就改善了产品良率；另一方面对布线后的晶圆进行合金化处理相当于退火的过程，修复了离子造成的损伤。In the method for alloying the wafer after wiring according to the embodiment of the present invention, by optimizing the alloy menu in the semiconductor manufacturing technology, that is, increasing the flow rate of hydrogen gas passing through the alloy at a preset proportion, the wafer can be protected without damaging the wafer. In the case of the structure of gate oxide, Si (silicon) dangling bonds near the interface are more effectively passivated, which greatly reduces the interface state density and repairs the quality of gate oxide, thereby changing the C-V curve characteristics of NMOS capacitors, and then achieving the purpose of improving frequency failure. At the same time, it also improves the product yield; on the other hand, alloying the wafer after wiring is equivalent to the annealing process, which repairs the damage caused by the ions.
附图说明Description of drawings
图1表示等效振荡电路的电路结构图；Fig. 1 shows the circuit structure diagram of the equivalent oscillation circuit;
图2表示本发明实施例的对布线后晶圆进行合金化处理的方法的基本步骤示意图；2 is a schematic diagram showing the basic steps of a method for alloying a wafer after wiring according to an embodiment of the present invention;
图3表示现有技术中NMOS电容和利用本发明实施例提供的方法优化后的NMOS电容的对比图；FIG. 3 shows a comparison diagram of an NMOS capacitor in the prior art and an NMOS capacitor optimized by the method provided by an embodiment of the present invention;
图4表示现有技术中振荡频率和利用本发明实施例提供的方法优化后的振荡频率的对比图；FIG. 4 shows a comparison diagram of the oscillation frequency in the prior art and the oscillation frequency optimized by the method provided by the embodiment of the present invention;
图5表示现有技术中产品良率和利用本发明实施例提供的方法优化后的产品良率的对比图。FIG. 5 shows a comparison diagram of the product yield in the prior art and the product yield optimized by the method provided by the embodiment of the present invention.
具体实施方式Detailed ways
为使本发明要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, the following will be described in detail with reference to the accompanying drawings and specific embodiments.
本发明针对现有技术中的CMOS工艺技术中，合金过程中导致的NMOS电容的频率失效的问题，提供一种对布线后晶圆进行合金化处理的方法，通过对半导体制造技术中的合金菜单的优化，即将合金时通预设比例氢气的流量增大，则在不损伤晶圆的栅氧的结构的情况下，更加有效地钝化界面附近Si(硅)悬挂键，大大降低界面态密度，修复栅氧的质量，从而改变NMOS电容的C-V曲线特性，继而达到改善频率失效的目的，同时也就改善了产品良率；另一方面对布线后的晶圆进行合金化处理相当于退火的过程，修复了离子造成的损伤。Aiming at the problem of frequency failure of NMOS capacitors caused by the alloying process in the CMOS process technology in the prior art, the present invention provides a method for alloying a wafer after wiring. The optimization of the alloy is to increase the flow rate of hydrogen at the preset ratio when passing through the alloy, so that the Si (silicon) dangling bonds near the interface can be passivated more effectively without damaging the structure of the gate oxide of the wafer, and the interface state density can be greatly reduced. , repair the quality of the gate oxide, thereby changing the C-V curve characteristics of the NMOS capacitor, thereby achieving the purpose of improving the frequency failure, and also improving the product yield; on the other hand, alloying the wafer after wiring is equivalent to annealing. process that repairs the damage caused by the ions.
如图2所示，本发明实施例提供一种对布线后晶圆进行合金化处理的方法，包括：As shown in FIG. 2, an embodiment of the present invention provides a method for alloying a wafer after wiring, including:
步骤11，将布线后的晶圆置于一腔体内，向所述腔体内连续通入用于载气的氮气，并将腔体温度升温至第一预设温度；Step 11, placing the wired wafer in a cavity, continuously feeding nitrogen gas for carrier gas into the cavity, and raising the temperature of the cavity to a first preset temperature;
步骤12，保持第一预设温度，向所述腔体内以预设流量通入一含有预设比例氢气的混合气体并持续第一预设时间；其中，所述预设流量大于流量门限值；Step 12, maintaining a first preset temperature, and feeding a mixed gas containing a preset proportion of hydrogen into the cavity at a preset flow rate for a first preset time; wherein the preset flow rate is greater than a flow threshold value ;
步骤13，混合气体通入结束后，向所述腔体内再次通入氮气直至所述晶圆所处的腔体内为纯氮气，在所述纯氮气气氛下冷却所述腔体。Step 13, after the introduction of the mixed gas, nitrogen is introduced into the cavity again until the cavity where the wafer is located is pure nitrogen, and the cavity is cooled under the pure nitrogen atmosphere.
本发明的上述实施例中，将布线后晶圆置于充斥了氮气的腔体后，将腔体内的温度升至第一预设温度，再通入混合气体，混合气体中含有预设比例的氢气，之后再通入氮气使腔体内变为纯氮气环境，再降低腔体内温度。需要说明的是，整个合金工艺过程中腔体内的退火温度的升降都需非常缓慢，能够有效地避免键合后晶圆在退火过程中发生破片现象，并且整个过程也只有一次升温和一次降温，退火过程中温度控制简单，方便操作。In the above-mentioned embodiment of the present invention, after the wafer after wiring is placed in a cavity filled with nitrogen, the temperature in the cavity is raised to the first preset temperature, and then a mixed gas is introduced, and the mixed gas contains a preset ratio of After that, nitrogen is introduced into the cavity to make the cavity into a pure nitrogen environment, and then the temperature in the cavity is lowered. It should be noted that the annealing temperature in the cavity needs to rise and fall very slowly during the entire alloying process, which can effectively avoid the phenomenon of fragmentation of the bonded wafer during the annealing process, and the whole process has only one heating and one cooling. During the annealing process, the temperature control is simple and the operation is convenient.
本发明的上述实施例中，步骤11具体包括：In the above-mentioned embodiment of the present invention, step 11 specifically includes:
步骤111，在所述腔体内通入流量为第一预设值的氮气，并将腔体温度升温至第一预设温度；Step 111, introducing nitrogen with a flow rate of a first preset value into the cavity, and raising the temperature of the cavity to the first preset temperature;
步骤112，将所述氮气的流量增大为第二预设值，继续向所述腔体内通入流量为第二预设值的氮气并持续第二预设时间。Step 112 , increasing the flow rate of the nitrogen gas to a second preset value, and continuing to flow nitrogen gas with a flow rate of the second preset value into the cavity for a second preset time.
本发明的上述实施例中，步骤13具体包括：In the above-mentioned embodiment of the present invention, step 13 specifically includes:
步骤131，连续向所述腔体内通入流量为第三预设值的氮气并持续第三预设时间；其中，流量为第三预设值的氮气通入结束后，所述腔体内为纯氮气气氛；In step 131, nitrogen gas with a flow rate of a third preset value is continuously introduced into the cavity for a third preset time; wherein, after the nitrogen gas flow with a flow rate of the third preset value ends, the cavity is filled with pure nitrogen gas. nitrogen atmosphere;
步骤132，将氮气流量减小为第四预设值，继续向所述纯氮气气氛的腔体内通入流量为第四预设值的氮气并持续第四预设时间；在所述第四预设时间内冷却所述腔体。Step 132, reducing the nitrogen flow rate to a fourth preset value, and continuing to introduce nitrogen with a flow rate of the fourth preset value into the cavity of the pure nitrogen atmosphere for a fourth preset time; Cool the cavity for a set time.
具体的，所述流量门限值为6L/min，所述预设流量为10L/min，所述第一预设时间为30min。Specifically, the flow threshold value is 6L/min, the preset flow rate is 10L/min, and the first preset time is 30min.
具体的，所述混合气体为氮气和氢气，所述混合气体中氢气的比例为4％。Specifically, the mixed gas is nitrogen and hydrogen, and the proportion of hydrogen in the mixed gas is 4%.
具体的，所述第一预设温度为425℃。Specifically, the first preset temperature is 425°C.
具体的，所述第一预设值为8L/min，所述第二预设值为10L/min，所述第二预设时间为5min。Specifically, the first preset value is 8L/min, the second preset value is 10L/min, and the second preset time is 5min.
具体的，所述第三预设值为10L/min，所述第三预设时间为5min，所述第四预设值为8L/min，所述第四预设时间为40min。Specifically, the third preset value is 10L/min, the third preset time is 5min, the fourth preset value is 8L/min, and the fourth preset time is 40min.
综上所述，该合金工艺的具体过程如下：In summary, the specific process of the alloy process is as follows:
首先，将布线后的晶圆放在纯氮气气氛(气体流量为8L)中升温至425℃，并在气体流量为10L的纯氮气中保持5min；随后通入氢气含量为4％的氢气和氮气的混合气体(气体流量为6L)并保持30min，再通入纯氮气(气体流量为10L)并保持5min，然后在纯氮气气氛(气体流量为8L)中冷却40min，该合金工艺完成。First, the wired wafer was heated to 425°C in a pure nitrogen atmosphere (gas flow rate of 8L), and kept in pure nitrogen gas with a gas flow rate of 10L for 5min; then hydrogen and nitrogen with a hydrogen content of 4% were introduced The mixed gas (gas flow is 6L) and kept for 30min, then pure nitrogen (gas flow is 10L) and kept for 5min, then cooled in pure nitrogen atmosphere (gas flow is 8L) for 40min, the alloy process is completed.
合金菜单优化后，即将合金时通4％氢气(H2)气体流量加大(从6L加大至10L)，从而能够对栅氧GOX的质量进行修复，从而使电容C更加稳定。After the alloy menu is optimized, the gas flow rate of 4% hydrogen (H 2 ) is increased (from 6L to 10L) when the alloy is passed, so that the quality of the gate oxide GOX can be repaired, thereby making the capacitor C more stable.
其工作原理如下：在半导体制造CMOS工艺技术中，栅氧(GOX)的表面存在大量的Si的悬挂键，这是界面态的主要来源。在合金(Alloy)工序过程中，氢气与悬挂键结合形成Si-H共价键，能够去除界面的悬挂键，在该工序过程中提高气体流量时，氢气的平均动能增大，H原子的穿透能力有所提高，导致H原子在界面处的覆盖率有所增大，钝化界面附近Si悬挂键的能力增强。该合金(Alloy)工序过程中将4％氢气气体流量加大，在不损伤GOX的晶格结构的情况下，能够更加有效地钝化界面附近Si悬挂键，大大降低界面态密度，修复GOX的质量。另外，在半导体制造CMOS过程中，晶圆与外部环境的接触是不可避免的，这会导致晶圆表面会吸附一些杂质(如O2等)和局部氧化，在合金(Alloy)工序过程中将4％氢气气体流量加大，H原子的覆盖率增大，能够更好地消除吸附的杂质，同时更好地还原导线在布线后形成的氧化层，降低导线的电阻。Its working principle is as follows: In the semiconductor manufacturing CMOS process technology, a large number of Si dangling bonds exist on the surface of the gate oxide (GOX), which is the main source of the interface state. During the Alloy process, hydrogen combines with dangling bonds to form Si-H covalent bonds, which can remove dangling bonds at the interface. When the gas flow is increased during this process, the average kinetic energy of hydrogen increases, and the penetration of H atoms increases. The permeability is improved, which leads to an increase in the coverage of H atoms at the interface, and the ability to passivate Si dangling bonds near the interface is enhanced. During the Alloy process, the flow rate of 4% hydrogen gas is increased, which can more effectively passivate the Si dangling bonds near the interface without damaging the lattice structure of GOX, greatly reduce the interface state density, and repair the GOX. quality. In addition, in the semiconductor manufacturing CMOS process, the contact between the wafer and the external environment is unavoidable, which will lead to the adsorption of some impurities (such as O 2 , etc.) and local oxidation on the surface of the wafer. During the Alloy process, the When the flow rate of 4% hydrogen gas increases, the coverage rate of H atoms increases, which can better eliminate the adsorbed impurities, and at the same time, better reduce the oxide layer formed by the wire after wiring, and reduce the resistance of the wire.
在合金(Alloy)工序过程中将4％氢气气体流量加大(例如从原有的6L加大至10L)，能够更好地去除界面悬挂键，降低界面态密度，使GOX的质量得到修复，导致GOX的介电常数ε提高，电容增大，同时导线的电阻降低，这两方面的协同作用导致CMOS的振荡频率f降低，使产品的频率特性得到改善。During the alloying process, increasing the flow rate of 4% hydrogen gas (for example, from the original 6L to 10L) can better remove the interface dangling bonds, reduce the interface state density, and restore the quality of GOX. As a result, the dielectric constant ε of GOX increases, the capacitance increases, and the resistance of the wire decreases. The synergistic effect of these two aspects reduces the oscillation frequency f of CMOS, which improves the frequency characteristics of the product.
如图3所示，现有技术中NMOS电容1和利用本发明实施例提供的方法优化后的NMOS电容2的对比；如图4所示为现有技术中振荡频率3和利用本发明实施例提供的方法优化后的振荡频率4的对比，由图4可知，现有技术中振荡频率3容易失效(即不在频率上限和频率下限圈定的范围内)；如图5所示为现有技术中产品良率5和利用本发明实施例提供的方法优化后的产品良率6的对比，由图5可以看出本发明实施例提供的合金化处理方法处理过的晶圆的良率明显增大。As shown in FIG. 3 , the comparison between the NMOS capacitor 1 in the prior art and the NMOS capacitor 2 optimized by the method provided by the embodiment of the present invention; as shown in FIG. 4 , the oscillation frequency 3 in the prior art and the embodiment of the present invention are shown The comparison of the oscillating frequency 4 after the optimization of the method provided, as can be seen from Fig. 4, the oscillating frequency 3 in the prior art is easy to fail (that is, not within the range delineated by the upper frequency limit and the lower frequency limit); The comparison between the product yield 5 and the product yield 6 optimized by the method provided by the embodiment of the present invention shows that the yield of the wafer processed by the alloying treatment method provided by the embodiment of the present invention is significantly increased from FIG. 5 . .
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明所述原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。The above are the preferred embodiments of the present invention. It should be pointed out that for those skilled in the art, without departing from the principles of the present invention, several improvements and modifications can be made. These improvements and modifications It should also be regarded as the protection scope of the present invention.
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