CN106026924A - Terahertz wave CMOS injection-locking frequency multiplier applied to bioimaging - Google Patents

Abstract

The invention belongs to the field of terahertz wave CMOS integrated circuit design, in particular to a terahertz wave CMOS injection-locked frequency multiplier applied to biological imaging. The circuit consists of two pairs of double-push injection transistors and a cross-coupled oscillator sharing tail current source. The quadrature input of the double-push injection pair tube adopts capacitive AC coupling, and the grid bias voltage setting is adjustable. By adjusting the bias of the double-push injection pair tube, the maximum conversion gain and locking range can be obtained. The working center frequency of frequency multiplier is around 100GHz. When driving capacitive loads, the injection-locked frequency multiplier can achieve a wide frequency locking range and high conversion gain with low power consumption, completely overcome the lock range changes caused by process errors and temperature drift, center frequency floating and output swing low impact.

Description

A terahertz wave CMOS injection-locked frequency multiplier for biological imaging

technical field

The invention belongs to the technical field of terahertz wave CMOS integrated circuits, and in particular relates to a wide locking range, high gain and low power consumption injection locking frequency multiplier applied to a terahertz wave biological imaging system.

Background technique

Terahertz waves are electromagnetic waves with a frequency between 0.1 and 10 THz, which are in the transition band from macroelectronics to microphotonics. Terahertz detection medicine is a comprehensive cross-cutting frontier subject involving medicine, biology, biomedical engineering, physics, optics, computer science, information and materials, etc. It is aimed at the application of biomedical experimental diagnosis, using terahertz ( THz) wave technology is a new discipline at the intersection of label-free and non-destructive detection of biomacromolecules, biological cells and tissues, medicine and physics. Compared with the existing medical imaging technology, terahertz wave spectral imaging technology has more unique and more applicable physical characteristics. Because terahertz wave has fingerprint characteristics reflecting the structure and properties of matter, and the energy of photons is low, much smaller than that of X-rays, It will not produce harmful ionization to biological macromolecules, biological cells and tissues, the radiation dose is almost zero, and the damage to the human body is very small, especially suitable for biopsy of biological tissues; compared with existing detection methods such as X-rays and nuclear magnetic resonance , the frequency of the terahertz wave is very high, and the pulse time is very short (picosecond level), so it has high spatial resolution and time resolution, so the terahertz wave can be detected down to the cell level, providing a Imaging and the study of the interaction of terahertz waves with human tissue provide a new and reliable technical approach. At present, many international scientific research teams are conducting in-depth application research on terahertz wave biological imaging.

Thanks to the reduction of device size and the further development of technology, CMOS integrated circuits have also entered the terahertz frequency band, making it possible to design CMOS-based terahertz wave chips. CMOS terahertz chips have the characteristics of low cost and easy RF/baseband integration. Nevertheless, as a key module of a terahertz chip, the terahertz wave local oscillator has become the biggest difficulty and bottleneck in the design of a terahertz wave chip. The direct design of terahertz wave local oscillators is limited by the low quality factor of CMOS on-chip passive devices, which have high power consumption, narrow tuning range and high noise. The design of the terahertz frequency multiplier bypasses the difficulty of directly designing the terahertz wave local oscillator, and achieves a higher frequency band clock signal by frequency multiplication, which greatly reduces the design difficulty of the voltage-controlled oscillator, enabling high-performance and low-power consumption Local oscillator design is possible. Nevertheless, it is still a difficult problem to be solved to find an efficient and reliable frequency multiplication method.

Injection-locked frequency multiplication is one of the main research hotspots of terahertz wave CMOS frequency multipliers. It can achieve high conversion gain with low power consumption, and will not bring excessive load to the front-end circuit at the same time. The locking range and conversion gain of an injection-locked frequency multiplier limit each other, so designing an injection-locked frequency multiplier with a wide locking range and high conversion gain is an important issue in circuit design.

Contents of the invention

The invention aims to provide a new terahertz wave CMOS injection locking frequency multiplier capable of realizing wide locking range and high conversion gain with lower power consumption.

The terahertz wave CMOS injection-locked frequency multiplier provided by the present invention has a circuit structure consisting of two main push-push injection pairs, a cross-coupling oscillator and a differential buffer; the cross-coupling oscillator shares a tail current source. in:

The four quadrature input signals are AC-coupled and input to the double-push injection pair through the DC-blocking capacitor to generate the required 2-fold frequency harmonic, which is injected into the cross-coupled oscillator with an inductance-capacitor resonator to lock the oscillator frequency To double the injection frequency, the maximum conversion gain and wide locking range can be obtained by adjusting the bias voltage of the push-push injection pair; the differential output signal of the frequency multiplier is output through a differential buffer.

In the present invention, the double-push injection pair tubes are composed of two NMOS tube pairs (M1 and M2, M3 and M4) whose drains are connected; the gate bias voltage is adjustable, and the drains are connected to generate the required double frequency harmonic Wave.

In the present invention, the DC blocking capacitor is composed of an on-chip metal-insulator-metal capacitor (MIM-cap).

In the present invention, the cross-coupled oscillator is composed of cross-coupled NMOS tube pairs, on-chip passive inductance and device parasitic capacitance, and the Q value curve of the selected passive inductance is gentle and flat within the locking frequency range. The sources of the pair of tubes M5 and M6 are connected to the tail current source, the drains are connected to the differential inductor, and the middle tap of the inductor is connected to the power supply.

In the present invention, the tail current source is composed of a single NMOS transistor with adjustable gate bias voltage.

In the present invention, the differential buffer is composed of a differential circuit with a passive inductance-capacitance resonant cavity.

Description of drawings

FIG. 1 is a schematic diagram of an injection-locked frequency multiplier circuit of the present invention.

FIG. 2 is a schematic diagram of a differential buffer circuit.

Fig. 3 is a simulation schematic diagram of the maximum output swing curve of the frequency multiplier and the corresponding double-push injection-to-tube bias curve when driving a capacitive load.

detailed description

The injection-locked oscillator and the locking range optimization method in the invention will be further described below in conjunction with the accompanying drawings.

The circuit structure of the present invention is shown in Figure 1, wherein NMOS transistors M5, M6, M7 and inductor L1 form a cross-coupled oscillator, the source electrodes of the paired transistors M5 and M6 are connected to the drain electrode of M7, the source electrode of M7 is grounded, and the gate electrode is connected to The bias voltage Vtail, the drains of the transistors M5 and M6 are respectively connected to both ends of the differential inductor L1, the middle tap of the inductor is connected to the power supply, and the gate of M5 is connected to the drain of M6, and the gate of M6 is connected to the drain of M5; NMOS transistors M1 and M2, M3 and M4 form two sets of dual-push injection pair tubes, the sources of the double-push injection pair tubes M1 and M2 are connected to the drain of the micro-current source M7, the drains of M1 and M2 are connected to the drain of M5, and the gate of M1 is connected to the drain of M5. Capacitor C1 is connected, the other end of the capacitor is the input terminal VI+, the gate of M2 is connected to the capacitor C2, the other end of the capacitor is the input terminal VI-, the source of the double-push injection pair tube M3 and M4 is connected to the drain of the micro current source M7, M3 , The drain of M4 is connected to the drain of M6, the gate of M3 is connected to the capacitor C3, the other end of the capacitor is the input terminal VQ-, the gate of M4 is connected to the capacitor C4, the other end of the capacitor is the input terminal VQ+, and the bias voltage VB1 passes through the resistor R1 is connected to the gate of M1, the bias voltage VB2 is connected to the gate of M2 through the resistor R2, the bias voltage VB3 is connected to the gate of M3 through the resistor R3, and the bias voltage VB4 is connected to the gate of M4 through the resistor R4.

The 2-fold frequency signal output by the oscillator is finally output through a differential buffer, as shown in Figure 2. The differential buffer is composed of NMOS pair tubes M8 and M9, a tail current source M10, a differential inductor L2 and capacitors C5 and C6. The sources of the tubes M8 and M9 are connected to the tail current source M10, the source of M10 is grounded, the gate is connected to the bias voltage Vtail, the drains of the tubes M8 and M9 are respectively connected to both ends of the differential inductor L2, and the middle tap of the inductor is connected to the power supply. The gate of M8 is connected to one of the output V+ of the cross-coupled oscillator, the gate of M9 is connected to the other output V- of the cross-coupled oscillator, the two ends of the capacitor C5 are respectively connected to the drain of M8 and the ground, and the two ends of the capacitor C6 are respectively connected to M9 drain and ground.

The on-chip differential inductance and the parasitic capacitance of the device form a passive inductance-capacitance resonant cavity, and the cross-coupling tubes M5 and M6 provide the required negative impedance for the oscillator to oscillate. The input signal passes through the DC blocking capacitor and is input to the gate of the double-push injection pair (M1-4) to generate a strong 2-fold harmonic at the common drain and inject it into the oscillator. When the 2-fold harmonic frequency When the locking requirement is met, the oscillator oscillation frequency is stabilized at the 2-fold harmonic frequency. The DC bias voltage of the double-push injection pair tube is connected to the gate of the double-push injection pair tube through a bias resistor and can be adjusted to obtain the widest locking range. The gate bias voltage of the tail current source M7 is selected as required to control the overall power consumption of the circuit.

The present invention uses four quadrature signals ( ) Input double-push injection to the tube to generate a pair of differential 2-fold frequency signals to achieve a strong 2-fold frequency harmonic injection. The Q value curve of the selected passive inductor-capacitor resonator is gentle and flat within the locked frequency range, so both A strong injection ratio is achieved and sufficient conversion gain is ensured. At the same time, by adjusting the gate bias voltage of the double-push injection pair tube, the quiescent current flowing into the double-push injection pair tube and the cross-coupled oscillator is dynamically controlled: when the injection frequency is close to the center frequency, the bias voltage of the injection pair tube is reduced to make the conversion gain Maximum; when the injection frequency is far away from the center frequency, increase the injection-to-tube bias voltage to widen the locking range and ensure the maximum output amplitude, thereby achieving optimal frequency doubling performance. The locked multiplied signal is output through a differential buffer. Fig. 3 is a simulation schematic diagram of the maximum output swing curve VO+ of the frequency multiplier and the corresponding double-push injection-to-tube bias curve VB when driving a capacitive load.

Claims (5)

1. A terahertz wave CMOS injection-locked frequency multiplier applied to biological imaging, characterized in that: the circuit structure mainly consists of two double-push injection pair tubes, a cross-coupled oscillator with an inductance-capacitance resonant cavity and a differential buffer Composition; two double-push injection pair tubes and a cross-coupled oscillator share a tail current source; where: The four quadrature input signals are AC-coupled and input to the double-push injection pair through the DC-blocking capacitor to generate the required 2-fold frequency harmonic, which is injected into the cross-coupled oscillator with an inductance-capacitor resonator to lock the oscillator frequency To double the injection frequency, the maximum conversion gain and wide locking range are obtained by adjusting the bias voltage of the push-push injection pair; the differential output signal of the frequency multiplier is output through a differential buffer. 2. The terahertz wave CMOS injection-locked frequency multiplier applied to biological imaging according to claim 1, characterized in that: the double-push injection pair tube is composed of two NMOS tubes connected to the drain; The bias voltage is adjustable and the drains are connected to generate the required 2X harmonics. 3. The terahertz wave CMOS injection-locked frequency multiplier applied to biological imaging according to claim 1, wherein the cross-coupled oscillator consists of cross-coupled NMOS tube pairs, on-chip passive inductors and devices Composed of parasitic capacitance, the selected passive inductance Q value curve is gentle and flat within the locked frequency range; on-chip inductance with a gentle and flat quality factor curve and device parasitic capacitance form a passive inductance-capacitance resonant cavity. 4. The terahertz wave CMOS injection-locked frequency multiplier applied to biological imaging according to claim 1, wherein the tail current source is composed of a single NMOS transistor with adjustable gate bias voltage, and the two A push-push injection pair and a cross-coupled oscillator share this tail current source. 5. The terahertz CMOS injection-locked frequency multiplier for biological imaging according to claim 1, wherein the differential buffer is composed of a differential circuit with a passive inductance-capacitance resonant cavity.