CN106020317A - Over-current protection circuit of low-dropout linear voltage regulator - Google Patents
Over-current protection circuit of low-dropout linear voltage regulator Download PDFInfo
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- CN106020317A CN106020317A CN201610362624.7A CN201610362624A CN106020317A CN 106020317 A CN106020317 A CN 106020317A CN 201610362624 A CN201610362624 A CN 201610362624A CN 106020317 A CN106020317 A CN 106020317A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
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Abstract
The invention discloses an over-current protection circuit of a low-dropout linear voltage regulator. The over-current protection circuit is connected with the low-dropout linear voltage regulator and used for over-current protection of the regulator. The low-dropout linear voltage regulator comprises a voltage input end, a power tube, a driving voltage end, and a voltage output end. The over-current protection circuit of the low-dropout linear voltage regulator comprises a sampling tube, a current compression circuit and an over-current protection execution circuit. An output end of the over-current protection execution circuit is connected with the driving voltage end. The over-current protection circuit of the low-dropout linear voltage regulator has following beneficial effects: the circuit is simple in structure; without comparator, over-current judgments can be made; sampling current and output current flow outside a chip and does not flow into the chip; therefore, quiescent current of the small chip under different output current can be achieved; quiescent dissipation of the chip is effectively reduced; and the over-current protection circuit of the low-dropout linear voltage regulator can be extensively applied to the field of low-dropout linear voltage regulators.
Description
Technical field
The present invention relates to low pressure difference linear voltage regulator field, the current foldback circuit of a kind of low pressure difference linear voltage regulator.
Background technology
Along with the market of developing rapidly of integrated circuit, power supply and power management chip is more and more wide.Low pressure difference linear voltage regulator as a kind of structure of power management, the seat that occuping market is important.As the power tube of core devices in low pressure difference linear voltage regulator, there is the more weak ability bearing short-time overload.When work makes power tube self-energy assemble because crossing stream, easily cause avalanche breakdown and damage device.Need the most in actual applications to design current foldback circuit, it is ensured that power device is reliably, stably work.Owing to low pressure difference linear voltage regulator is generally used in the electric power system of portable type electronic product, it requires that the power consumption of low pressure difference linear voltage regulator sufficiently small must could extend power-on time.As the current foldback circuit embedded in functional circuit, except providing reliable circuit protection function, its additional power consumption also must be the least.
In the low pressure difference linear voltage regulator with PMOS as power tube; common current foldback circuit is to utilize a sampling tube with the electric current on certain proportion sampled power pipe; this sample rate current is multiplied with resistance and obtains the voltage being directly proportional to output electric current; then this voltage is compared with reference voltage; the grid of power tube is controlled by logic circuit; reduce the grid-source voltage Vgs of power tube, thus the output electric current of power tube is limited in certain value.
It is a kind of typical low pressure difference linear voltage regulator current foldback circuit with reference to Fig. 1, Fig. 1.The source electrode of the PMOS power tube M1 of manostat connects input voltage VIN, drain electrode connects output voltage VO UT, the grid of grid and PMOS sampling tube M2 meets common driving voltage Vdrive, PMOS M3 and M4 are connected into current-mirror structure, ensure that the dram-source voltage Vds of PMOS power tube M1 and PMOS sampling tube M2 is equal, thus ensure the high accuracy of sample rate current.Current source I1 provides bias current for PMOS M3, and resistance R1 is compared with reference voltage V REF by comparator with the product of sample rate current, then controls Vdrive through logic circuit.When exporting electric current more than certain value, Vdrive is drawn high, thus realizes overcurrent protection function.In the method, sample rate current is directly proportional to output electric current, and all flows to chip ground, therefore increase along with output electric current through sampling resistor R1, and the quiescent current of chip ground end also increases, and adds the quiescent dissipation of chip.
Summary of the invention
In order to solve above-mentioned technical problem, it is an object of the invention to provide the current foldback circuit of a kind of low pressure difference linear voltage regulator utilizing current ratio relatively to realize overcurrent protection, described current foldback circuit can reduce the quiescent dissipation of chip.
The technical solution adopted in the present invention is: the current foldback circuit of a kind of low pressure difference linear voltage regulator; it is connected with low pressure difference linear voltage regulator and it is carried out overcurrent protection; described low pressure difference linear voltage regulator includes the voltage output end that the driving voltage end that the power tube that voltage input end, source electrode are connected is connected with the grid of power tube is connected with the drain electrode of power tube with voltage input end
The current foldback circuit of described low pressure difference linear voltage regulator includes the sampling tube that grid is respectively connected with the grid of power tube, the drain electrode with power tube that drains; the current comparison circuit that first input end is connected with voltage input end, the second input is connected with the source electrode of sampling tube; the overcurrent protection that input is connected with the outfan of current comparison circuit performs circuit, and overcurrent protection performs the outfan of circuit and is connected with driving voltage end.
nullFurther，Described current comparison circuit includes the first resistance、Second resistance、First PNP pipe、Second PNP pipe、The bias current circuit of the bias current of 1:1 is provided for described first PNP pipe and the second PNP pipe，The upper end of described first resistance is connected with the upper end of the second resistance，The upper end of described second resistance is as the first input end of current comparison circuit，The lower end of described first resistance is as the second input of current comparison circuit，The lower end of described first resistance is connected with the emitter stage of the first PNP pipe，The base stage of described first PNP pipe is connected with the base stage of the second PNP pipe，The base stage of described first PNP pipe is connected with colelctor electrode，The emitter stage of described second PNP pipe and the lower end of the second resistance connect，The colelctor electrode of described second PNP pipe is as the outfan of current comparison circuit，First outfan of described bias current circuit and the colelctor electrode of the first PNP pipe connect，Second outfan of described bias current circuit and the colelctor electrode of the second PNP pipe connect.
nullFurther，Described overcurrent protection performs circuit and includes the first bias current end、The first NMOS tube that the colelctor electrode of grid and the second PNP pipe is connected、Second NMOS tube、First PMOS、The NPN pipe that emitter stage is connected with driving voltage end，The drain electrode of described first NMOS tube is connected with the first bias current end，The source electrode of described first NMOS tube and the source electrode of the second NMOS tube are connected，The grid of described second NMOS tube and the drain electrode of the first NMOS tube are connected，The grid of described second NMOS tube and the grid of the first PMOS are connected，The drain electrode of described second NMOS tube is connected with the drain electrode of the first PMOS，The drain electrode of described second NMOS tube is connected with the base stage of a NPN pipe，The described colelctor electrode of a NPN pipe and the source electrode of the first PMOS are connected，The source electrode of described first PMOS is connected with voltage input end.
nullFurther，Described bias current circuit includes the second bias current end、Biased electrical pressure side、The 3rd NMOS tube that drain electrode is connected with the second bias current end、4th NMOS tube、The 5th NMOS tube that drain electrode is connected with the colelctor electrode of the first PNP pipe、6th NMOS tube、The 7th NMOS tube that drain electrode is connected with the colelctor electrode of the second PNP pipe、The 8th NMOS tube that the source electrode of source electrode and the first NMOS tube is connected，The described source electrode of the 3rd NMOS tube and the drain electrode of the 4th NMOS tube are connected，Grid and the second bias current end of described 4th NMOS tube are connected，The grid of described 3rd NMOS tube is connected with biased electrical pressure side，The described grid of the 3rd NMOS tube and the grid of the 5th NMOS tube are connected，The described source electrode of the 5th NMOS tube and the drain electrode of the 6th NMOS tube are connected，The described grid of the 6th NMOS tube and the grid of the 4th NMOS tube are connected，The described grid of the 6th NMOS tube and the grid of the 8th NMOS tube are connected，The drain electrode of described 8th NMOS tube is connected with the source electrode of the 7th NMOS tube，The described grid of the 7th NMOS tube and the grid of the 5th NMOS tube are connected，Described 4th NMOS tube、6th NMOS tube、The source ground of the 8th NMOS tube.
Further, described power tube and sampling tube are the PMOS that breadth length ratio is proportional.
The invention has the beneficial effects as follows: the sampling tube sampled output current of the current foldback circuit of a kind of low pressure difference linear voltage regulator of the present invention, current comparison circuit by current ratio compared with by the way of realized stream judge, overcurrent protection performs circuit realiration overcurrent protection, the circuit structure of the present invention is simple, judge without using comparator can realize stream, and by the drain electrode of sampling tube Yu power tube is connected on voltage output end VOUT, sample rate current is all flowed to outside chip with output electric current, it does not flow to chip ground, therefore quiescent current is held under various output electric currents, with all can realizing smaller chip, significantly reduce the quiescent dissipation of chip.
Accompanying drawing explanation
Below in conjunction with the accompanying drawings the detailed description of the invention of the present invention is described further:
Fig. 1 is the circuit theory diagrams of prior art；
Fig. 2 is the circuit theory diagrams of the current foldback circuit of a kind of low pressure difference linear voltage regulator of the present invention；
Fig. 3 is a physical circuit schematic diagram of the current foldback circuit of a kind of low pressure difference linear voltage regulator of the present invention.
Detailed description of the invention
It should be noted that in the case of not conflicting, the embodiment in the application and the feature in embodiment can be mutually combined.
A kind of current foldback circuit of low pressure difference linear voltage regulator; it is connected with low pressure difference linear voltage regulator and it is carried out overcurrent protection; with reference to Fig. 2; Fig. 2 is the circuit theory diagrams of the current foldback circuit of a kind of low pressure difference linear voltage regulator of the present invention; described low pressure difference linear voltage regulator includes the voltage output end VOUT that the drain electrode of driving voltage end Vdrive and the power tube MP that the grid of power tube MP and the power tube MP that voltage input end VIN, source electrode be connected is connected is connected with voltage input end VIN
The current foldback circuit of described low pressure difference linear voltage regulator includes the sampling tube MS that grid is respectively connected with the grid of power tube MP, the drain electrode with power tube MP that drains; the current comparison circuit that first input end is connected with voltage input end VIN, the second input is connected with the source electrode of sampling tube MS; the overcurrent protection that input is connected with the outfan of current comparison circuit performs circuit, and overcurrent protection performs the outfan of circuit and is connected with driving voltage end Vdrive.
Sample rate current Isample is also delivered to current comparison circuit by sampling tube MS sampled output current IOUT; current comparison circuit is by comparing sample rate current Isample with the size of predetermined current to produce different digital signals; described different digital signal input overcurrent protection performs circuit; when sample rate current Isample is less than predetermined current, overcurrent protection performs circuit and is not turned on；When sample rate current Isample is more than predetermined current, overcurrent protection performs circuit turn-on makes the grid voltage of power tube MP increase, thus output current IO UT limiting low pressure difference linear voltage regulator continues to increase, it is achieved overcurrent protection.The present invention is by being connected on the drain electrode of sampling tube MS Yu power tube MP on voltage output end VOUT, sample rate current Isample and output current IO UT are all flowed to outside chip, it does not flow to chip ground, therefore under various output electric currents, all can realize smaller ground end quiescent current, significantly reduce the quiescent dissipation of chip.
nullFurther improvement as technical scheme，With reference to Fig. 2，Fig. 2 is the circuit theory diagrams of the current foldback circuit of a kind of low pressure difference linear voltage regulator of the present invention，Described current comparison circuit includes the first resistance R1、Second resistance R2、First PNP pipe Q1、Second PNP pipe Q2、The bias current circuit of the bias current of 1:1 is provided for described first PNP pipe Q1 and the second PNP pipe Q2，The upper end of described first resistance R1 is connected with the upper end of the second resistance R2，The upper end of described second resistance R2 is as the first input end of current comparison circuit，The lower end of described first resistance R1 is as the second input of current comparison circuit，The described lower end of the first resistance R1 is connected with the emitter stage of the first PNP pipe Q1，The base stage of described first PNP pipe Q1 is connected with the base stage of the second PNP pipe Q2，The base stage of described first PNP pipe Q1 is connected with colelctor electrode，The emitter stage of described second PNP pipe Q2 and the lower end of the second resistance R2 connect，The colelctor electrode of described second PNP pipe Q2 is as the outfan of current comparison circuit，First outfan 1 of described bias current circuit is connected with the colelctor electrode of the first PNP pipe Q1，Second outfan 2 of described bias current circuit is connected with the colelctor electrode of the second PNP pipe Q2.
In the present embodiment, output current IO UT flows to voltage output end VOUT, sampling tube MS with certain proportion n sampled output current IOUT from voltage input end VIN through power tube MP, obtains sample rate current Isample, Isample=IOUT/ n.Sample rate current Isample produces pressure drop Vsample=Isample*R1 when flowing through resistance R1.First PNP pipe Q1 and the second PNP pipe Q2 composition PNP mirror image pipe, bias current circuit provides bias current for PNP mirror image pipe.When Iout is less; Vsample is the least; A point voltage VA in Fig. 2 is higher; B point voltage VB in Fig. 2 is the highest, and therefore the base emitter voltage VBE of the second PNP pipe Q2 is less, and the collector current IC of the second PNP pipe Q2 is the least; when the bias current that the collector current IC of the second PNP pipe Q2 produces less than bias current circuit; C point output low level in Fig. 2, overcurrent protection performs circuit and is not turned on, do not affects the state of Vdrive；Increase along with IOUT, Vsample increases, A point voltage VA in Fig. 2 reduces, B point voltage VB in Fig. 2 also reduces, the base emitter voltage VBE of the second PNP pipe Q2 increases, the collector current IC of the second PNP pipe Q2 increases, when the bias current that the collector current IC of the second PNP pipe Q2 produces more than bias current circuit, C point output high level in Fig. 2, overcurrent protection performs circuit turn-on and Vdrive is drawn high by output voltage, reduce the grid-source voltage VGS of power tube MP, thus the continuation limiting output current IO UT increases, play the effect of overcurrent protection.
In above-mentioned work process, owing to sample rate current Isample is outside sampling tube MS and voltage output end VOUT flow direction plate, does not the most increase the ground end quiescent current of chip, reduce the quiescent dissipation of chip.
As the further improvement of technical scheme, described power tube MP and sampling tube MS is the PMOS that breadth length ratio is proportional.So, the sampling tube MS electric current with certain proportion n sampled power pipe MP, i.e. output current IO UT can be realized.Described certain proportion n is the ratio of the power tube MP breadth length ratio with sampling tube MS.
nullFurther improvement as technical scheme，With reference to Fig. 3，Fig. 3 is a physical circuit schematic diagram of the current foldback circuit of a kind of low pressure difference linear voltage regulator of the present invention，Described overcurrent protection performs circuit and includes the first bias current end Ib1、The first NMOS tube N1 that the colelctor electrode of grid and the second PNP pipe Q2 is connected、Second NMOS tube N2、First PMOS M1、The NPN pipe Q3 that emitter stage is connected with driving voltage end Vdrive，The drain electrode of described first NMOS tube N1 is connected with the first bias current end Ib1，The source electrode of described first NMOS tube N1 and the source electrode of the second NMOS tube N2 are connected，The grid of described second NMOS tube N2 and the drain electrode of the first NMOS tube N1 are connected，The grid of described second NMOS tube N2 and the grid of the first PMOS M1 are connected，The drain electrode of described second NMOS tube N2 is connected with the drain electrode of the first PMOS M1，The drain electrode of described second NMOS tube N2 is connected with the base stage of a NPN pipe Q3，The described colelctor electrode of a NPN pipe Q3 and the source electrode of the first PMOS M1 are connected，The source electrode of described first PMOS M1 is connected with voltage input end VIN.
In the present embodiment, when the bias current that the collector current IC of the second PNP pipe Q2 produces less than bias current circuit, C point in Fig. 3 is low level, first NMOS tube N1 is output as high level, first PMOS M1 and the phase inverter output low level of the second NMOS tube N2 composition, oneth NPN pipe Q3 turns off, and does not affect the signal of driving voltage end Vdrive；When the bias current that the collector current IC of the second PNP pipe Q2 produces more than bias current circuit; C point in Fig. 3 becomes high level from low level; oneth NPN pipe Q3 output becomes low level; the phase inverter output high level of the first PMOS M1 and the second NMOS tube N2 composition; oneth NPN pipe Q3 conducting; by the base emitter voltage VBE of a NPN pipe Q3, the driving voltage of power tube MP is drawn high; reduce the grid-source voltage VGS of power tube MP; thus limit output current IO UT and continue to increase, it is achieved overcurrent protection.
nullFurther improvement as technical scheme，With reference to Fig. 3，Fig. 3 is a physical circuit schematic diagram of the current foldback circuit of a kind of low pressure difference linear voltage regulator of the present invention，Described bias current circuit includes the second bias current end Ib2、Biased electrical pressure side Vbias、The 3rd NMOS tube N3 that drain electrode is connected with the second bias current end Ib2、4th NMOS tube N4、The 5th NMOS tube N5 that drain electrode is connected with the colelctor electrode of the first PNP pipe Q1、6th NMOS tube N6、The 7th NMOS tube N7 that drain electrode is connected with the colelctor electrode of the second PNP pipe Q2、The 8th NMOS tube N8 that the source electrode of source electrode and the first NMOS tube N1 is connected，The described source electrode of the 3rd NMOS tube N3 and the drain electrode of the 4th NMOS tube N4 are connected，Grid and the second bias current end Ib2 of described 4th NMOS tube N4 are connected，The grid of described 3rd NMOS tube N3 is connected with biased electrical pressure side Vbias，The described grid of the 3rd NMOS tube N3 and the grid of the 5th NMOS tube N5 are connected，The described source electrode of the 5th NMOS tube N5 and the drain electrode of the 6th NMOS tube N6 are connected，The described grid of the 6th NMOS tube N6 and the grid of the 4th NMOS tube N4 are connected，The described grid of the 6th NMOS tube N6 and the grid of the 8th NMOS tube N8 are connected，The drain electrode of described 8th NMOS tube N8 is connected with the source electrode of the 7th NMOS tube N7，The described grid of the 7th NMOS tube N7 and the grid of the 5th NMOS tube N5 are connected，Described 4th NMOS tube N4、6th NMOS tube N6、The source ground of the 8th NMOS tube N8.
In the present embodiment, the 3rd NMOS tube N3 and the 4th NMOS tube N4, the 5th NMOS tube N5 and the 6th NMOS tube N6, the 7th NMOS tube N7 and the 8th NMOS tube N8 composition cascode structure provide the bias current of accurate 1:1 for the first PNP pipe Q1 and the second PNP pipe Q2.
It is above the preferably enforcement of the present invention is illustrated, but the invention is not limited to described embodiment, those of ordinary skill in the art it may also be made that all equivalent variations or replacement on the premise of spirit of the present invention, and deformation or the replacement of these equivalents are all contained in the application claim limited range.
Claims (5)
1. the current foldback circuit of a low pressure difference linear voltage regulator; it is connected with low pressure difference linear voltage regulator and it is carried out overcurrent protection; described low pressure difference linear voltage regulator includes the voltage output end that the driving voltage end that the power tube that voltage input end, source electrode are connected is connected with the grid of power tube is connected with the drain electrode of power tube with voltage input end; it is characterized in that
The current foldback circuit of described low pressure difference linear voltage regulator includes the sampling tube that grid is respectively connected with the grid of power tube, the drain electrode with power tube that drains; the current comparison circuit that first input end is connected with voltage input end, the second input is connected with the source electrode of sampling tube; the overcurrent protection that input is connected with the outfan of current comparison circuit performs circuit, and overcurrent protection performs the outfan of circuit and is connected with driving voltage end.
nullThe current foldback circuit of a kind of low pressure difference linear voltage regulator the most according to claim 1，It is characterized in that，Described current comparison circuit includes the first resistance、Second resistance、First PNP pipe、Second PNP pipe、The bias current circuit of the bias current of 1:1 is provided for described first PNP pipe and the second PNP pipe，The upper end of described first resistance is connected with the upper end of the second resistance，The upper end of described second resistance is as the first input end of current comparison circuit，The lower end of described first resistance is as the second input of current comparison circuit，The lower end of described first resistance is connected with the emitter stage of the first PNP pipe，The base stage of described first PNP pipe is connected with the base stage of the second PNP pipe，The base stage of described first PNP pipe is connected with colelctor electrode，The emitter stage of described second PNP pipe and the lower end of the second resistance connect，The colelctor electrode of described second PNP pipe is as the outfan of current comparison circuit，First outfan of described bias current circuit and the colelctor electrode of the first PNP pipe connect，Second outfan of described bias current circuit and the colelctor electrode of the second PNP pipe connect.
nullThe current foldback circuit of a kind of low pressure difference linear voltage regulator the most according to claim 2，It is characterized in that，Described overcurrent protection performs circuit and includes the first bias current end、The first NMOS tube that the colelctor electrode of grid and the second PNP pipe is connected、Second NMOS tube、First PMOS、The NPN pipe that emitter stage is connected with driving voltage end，The drain electrode of described first NMOS tube is connected with the first bias current end，The source electrode of described first NMOS tube and the source electrode of the second NMOS tube are connected，The grid of described second NMOS tube and the drain electrode of the first NMOS tube are connected，The grid of described second NMOS tube and the grid of the first PMOS are connected，The drain electrode of described second NMOS tube is connected with the drain electrode of the first PMOS，The drain electrode of described second NMOS tube is connected with the base stage of a NPN pipe，The described colelctor electrode of a NPN pipe and the source electrode of the first PMOS are connected，The source electrode of described first PMOS is connected with voltage input end.
nullThe current foldback circuit of a kind of low pressure difference linear voltage regulator the most according to claim 3，It is characterized in that，Described bias current circuit includes the second bias current end、Biased electrical pressure side、The 3rd NMOS tube that drain electrode is connected with the second bias current end、4th NMOS tube、The 5th NMOS tube that drain electrode is connected with the colelctor electrode of the first PNP pipe、6th NMOS tube、The 7th NMOS tube that drain electrode is connected with the colelctor electrode of the second PNP pipe、The 8th NMOS tube that the source electrode of source electrode and the first NMOS tube is connected，The described source electrode of the 3rd NMOS tube and the drain electrode of the 4th NMOS tube are connected，Grid and the second bias current end of described 4th NMOS tube are connected，The grid of described 3rd NMOS tube is connected with biased electrical pressure side，The described grid of the 3rd NMOS tube and the grid of the 5th NMOS tube are connected，The described source electrode of the 5th NMOS tube and the drain electrode of the 6th NMOS tube are connected，The described grid of the 6th NMOS tube and the grid of the 4th NMOS tube are connected，The described grid of the 6th NMOS tube and the grid of the 8th NMOS tube are connected，The drain electrode of described 8th NMOS tube is connected with the source electrode of the 7th NMOS tube，The described grid of the 7th NMOS tube and the grid of the 5th NMOS tube are connected，Described 4th NMOS tube、6th NMOS tube、The source ground of the 8th NMOS tube.
5. according to the current foldback circuit of a kind of low pressure difference linear voltage regulator described in any one of Claims 1-4, it is characterised in that described power tube and sampling tube are the PMOS that breadth length ratio is proportional.
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| CN107085448A (en) * | 2017-06-26 | 2017-08-22 | 中国电子科技集团公司第五十八研究所 | Low pressure difference linear voltage regulator LDO circuit comprising overcurrent protection |
| CN107085448B (en) * | 2017-06-26 | 2018-09-11 | 中国电子科技集团公司第五十八研究所 | Include the low pressure difference linear voltage regulator LDO circuit of overcurrent protection |
| CN108768360A (en) * | 2018-08-22 | 2018-11-06 | 苏州华芯微电子股份有限公司 | A kind of current foldback circuit |
| CN109765957A (en) * | 2019-01-07 | 2019-05-17 | 上海奥令科电子科技有限公司 | A low dropout linear regulator |
| CN110377102A (en) * | 2019-07-10 | 2019-10-25 | 深圳市锐能微科技有限公司 | A kind of low-dropout linear voltage-regulating circuit and integrated circuit |
| CN110377102B (en) * | 2019-07-10 | 2024-06-07 | 深圳市锐能微科技有限公司 | Low-dropout linear voltage stabilizing circuit and integrated circuit |
| CN111478300A (en) * | 2020-05-09 | 2020-07-31 | 上海维安半导体有限公司 | Foldback overcurrent protection circuit |
| CN111478300B (en) * | 2020-05-09 | 2025-03-07 | 上海维安半导体有限公司 | A Foldback Overcurrent Protection Circuit |
| CN116488621A (en) * | 2023-02-27 | 2023-07-25 | 江苏帝奥微电子股份有限公司 | Wide voltage domain level comparison circuit suitable for high-voltage LDO |
| CN116488621B (en) * | 2023-02-27 | 2023-11-03 | 江苏帝奥微电子股份有限公司 | Wide voltage domain level comparison circuit suitable for high-voltage LDO |
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|---|---|
| CN106020317B (en) | 2017-09-29 |
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