CN105957886A - Silicon carbide bipolar junction transistor - Google Patents
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Abstract
Description
技术领域technical field
本发明涉及高功率半导体器件领域,更具体地涉及一种碳化硅(SiC)双极结型晶体管(BJT)。The invention relates to the field of high-power semiconductor devices, in particular to a silicon carbide (SiC) bipolar junction transistor (BJT).
背景技术Background technique
宽禁带半导体材料SiC是制备高压电力电子器件的理想材料,碳化硅(SiC)双极结型晶体管(BJT)是重要的常关型器件之一,在万伏级高耐压电力电子器件领域具有优势。相对Si基三极管,SiC BJT具有更低的导通电压,不存在二次击穿现象等优点;SiC BJT避免了常开型器件SiC JFET的栅极驱动问题,没有SiC IGBT导通损耗大的缺点,不存在SiCMOSFET因为栅介质稳定性差及沟道迁移率低而使器件工作条件受到限制的问题。The wide bandgap semiconductor material SiC is an ideal material for preparing high-voltage power electronic devices. Silicon carbide (SiC) bipolar junction transistor (BJT) is one of the important normally-off devices. Advantages. Compared with Si-based transistors, SiC BJT has the advantages of lower turn-on voltage and no secondary breakdown phenomenon; SiC BJT avoids the gate drive problem of normally-on device SiC JFET, and does not have the disadvantage of large conduction loss of SiC IGBT , there is no problem that the working conditions of the SiC MOSFET are limited due to the poor stability of the gate dielectric and the low mobility of the channel.
SiC/SiO2高界面态的存在会导致SiC MOSFET的栅介质不稳定,沟道迁移率低等不良影响;对于SiC BJT,SiC BJT的发射极台面边缘与基极欧姆接触之间的外基区表面的高界面态密度会成为复合中心,导致大量的基区少子(电子和空穴)在界面处复合产生复合电流,降低器件的电流增益,并导致器件性能退化。美国专利号US8378390提出了一种新结构的碳化硅双极结型晶体管,来减小SiC/SiO2高界面态导致的复合电流,其基本原理是:在SiC BJT的发射极台面边缘与基极欧姆接触之间的外基区,利用SiO2介质层上的金属、SiO2介质层以及外基区三者形成MOS结构,利用BE结偏置电压控制MOS结构衬底表面的电势,改变衬底表面的载流子密度,达到抑制表面复合电流的作用。这种结构虽然减小了复合电流,提高了电流增益,但是仍然没有从根本上解决SiC/SiO2高界面态的问题;而且SiO2介质层上的金属是一个需要加电压的电极,导致此结构的器件是一个四端器件,而本领域公知的是,对于三极管而言,四端器件相比于三端器件存在很多弊端。The existence of SiC/SiO 2 high interface state will lead to the instability of the gate dielectric of SiC MOSFET, low channel mobility and other adverse effects; for SiC BJT, the outer base region between the emitter mesa edge and the base ohmic contact of SiC BJT The high interface state density on the surface will become a recombination center, resulting in a large number of minority carriers (electrons and holes) in the base region recombining at the interface to generate a recombination current, reducing the current gain of the device and degrading the device performance. US Patent No. US8378390 proposes a new structure of silicon carbide bipolar junction transistors to reduce the recombination current caused by the SiC/SiO 2 high interface state. The outer base region between the ohmic contacts uses the metal on the SiO 2 dielectric layer, the SiO 2 dielectric layer and the outer base region to form a MOS structure, and uses the BE junction bias voltage to control the potential of the substrate surface of the MOS structure, changing the substrate The carrier density on the surface can suppress the surface recombination current. Although this structure reduces the recombination current and improves the current gain, it still does not fundamentally solve the problem of SiC/SiO 2 high interface state; and the metal on the SiO 2 dielectric layer is an electrode that needs to be applied voltage, resulting in this The device of the structure is a four-terminal device, and it is well known in the art that for a triode, a four-terminal device has many disadvantages compared with a three-terminal device.
发明内容Contents of the invention
有鉴于此,本发明的主要目的在于提供一种碳化硅双极结型晶体管,以解决上述技术问题中的至少之一。In view of this, the main purpose of the present invention is to provide a silicon carbide bipolar junction transistor to solve at least one of the above technical problems.
为了实现上述目的,本发明提供了一种碳化硅双极结型晶体管,所述双极结型晶体管的发射极台面边缘与基极欧姆接触之间的外基区表面形成有一个肖特基接触结构。In order to achieve the above object, the present invention provides a silicon carbide bipolar junction transistor, a Schottky contact is formed on the surface of the outer base region between the edge of the emitter mesa and the ohmic contact of the base of the bipolar junction transistor. structure.
作为优选,所述肖特基接触结构包括一基区及位于所述基区上的一金属层。Preferably, the Schottky contact structure includes a base region and a metal layer on the base region.
作为优选,所述肖特基接触结构形成的肖特基势垒为P型反阻挡层。Preferably, the Schottky barrier formed by the Schottky contact structure is a P-type anti-barrier layer.
作为优选,所述基区是不同掺杂浓度的两层结构。Preferably, the base region is a two-layer structure with different doping concentrations.
作为优选,所述基区的两层结构是:靠近发射结的一层是厚度为t1的基区,其采用P型掺杂;而靠近漂移区的另一层是厚度为t2的基区,其掺杂浓度要比所述靠近发射结的一层基区的大,达到1017cm-3的数量级。Preferably, the two-layer structure of the base region is: the layer near the emitter junction is a base region with a thickness of t1 , which adopts P-type doping; and the other layer near the drift region is a base region with a thickness of t2 . region, its doping concentration is greater than that of the base region of the layer close to the emitter junction, reaching the order of 10 17 cm -3 .
作为优选,所述金属层不接电压、不接地。Preferably, the metal layer is not connected to voltage or grounded.
作为优选,所述金属层的功函数大于所述基区表面的功函数。Preferably, the work function of the metal layer is greater than the work function of the surface of the base region.
作为优选,所述金属层采用镍或铂制备。Preferably, the metal layer is made of nickel or platinum.
作为优选,所述金属层的左端与发射极台面边缘之间形成有一SiO2钝化层。Preferably, a SiO 2 passivation layer is formed between the left end of the metal layer and the edge of the emitter mesa.
作为优选,所述SiO2钝化层的厚度为40-60nm。Preferably, the thickness of the SiO 2 passivation layer is 40-60nm.
基于上述技术方案可知,本发明的碳化硅双极结型晶体管及其制作方法具有如下有益效果:当金属的功函数Wm大于外基区表面处的P型半导体的功函数Ws时,半导体表面的能带向上弯曲,形成一个P型反阻挡层(阻止电子向界面处运动),同时为了保证发射结正偏,基极要加正向偏压,这会使得外基区远离表面的能带下移,表面处的能带进一步向上弯曲,势垒高度增加;最终结果是,P型外基区表面处于积累状态,空穴浓度增大,电子浓度降低,在空间上分离了电子和空穴。由于势垒的存在,电子向表面运动受到限制,从而阻止了从发射区注入基区的电子被外基区表面陷阱俘获,降低了表面复合电流,提高了电流增益;本发明不需要额外的加偏置电压的电极,仍保持器件为三端器件。Based on the above technical scheme, it can be seen that the silicon carbide bipolar junction transistor and its manufacturing method of the present invention have the following beneficial effects: when the work function W m of the metal is greater than the work function W s of the P-type semiconductor at the surface of the outer base region, the semiconductor The energy band on the surface bends upward to form a P-type anti-blocking layer (to prevent electrons from moving to the interface), and at the same time, in order to ensure that the emitter junction is forward-biased, the base must be forward-biased, which will make the outer base region away from the energy of the surface The band moves down, the energy band at the surface is further bent upward, and the barrier height increases; the final result is that the surface of the P-type extrinsic base region is in an accumulation state, the hole concentration increases, the electron concentration decreases, and the electrons and holes are separated in space. hole. Due to the existence of the potential barrier, the movement of electrons to the surface is limited, thereby preventing the electrons injected from the emitter region into the base region from being captured by the surface traps in the outer base region, reducing the surface recombination current and improving the current gain; the present invention does not require additional electrodes for the bias voltage, still maintaining the device as a three-terminal device.
附图说明Description of drawings
图1是本发明的一种碳化硅双极结型晶体管的结构示意图;Fig. 1 is the structural representation of a kind of silicon carbide bipolar junction transistor of the present invention;
图2是本发明的金属层和基区的肖特基接触结构的结构示意图;Fig. 2 is the structural representation of the Schottky contact structure of metal layer and base region of the present invention;
图3是肖特基接触前的能带图;Figure 3 is the energy band diagram before the Schottky contact;
图4是金属和P型半导体接触后的能带图。Fig. 4 is the energy band diagram after the contact between the metal and the P-type semiconductor.
具体实施方式detailed description
为使本发明的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图,对本发明作进一步的详细说明。In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
本发明公开了一种带有肖特基接触结构的碳化硅双极结型晶体管,不需要额外的加偏置电压的电极,仍保持器件为三端器件;且有效地解决了SiC/SiO2高界面态的问题,提高了SiC BJT器件的电流增益。更具体地,本发明是通过在三极管的发射极台面边缘与基极欧姆接触之间的外基区表面制造一个肖特基接触结构,在该外基区表面形成肖特基势垒从而阻止电子向表面处运动,抑制表面复合,提高器件的电流增益。The invention discloses a silicon carbide bipolar junction transistor with a Schottky contact structure, which does not require an additional bias voltage electrode, and still maintains the device as a three-terminal device; and effectively solves the problem of SiC/SiO 2 The problem of high interface states improves the current gain of SiC BJT devices. More specifically, the present invention makes a Schottky contact structure on the surface of the outer base region between the edge of the emitter mesa and the base ohmic contact of the triode, and forms a Schottky barrier on the surface of the outer base region to prevent electrons Moving toward the surface, suppressing surface recombination and increasing the current gain of the device.
进一步的,所述肖特基结构是由金属层与P型碳化硅接触形成的。Further, the Schottky structure is formed by the contact between the metal layer and the P-type silicon carbide.
进一步的,所述金属层要选择功函数比较大的金属,如镍、铂等;且所述金属层要浮空,不外接任何电压、不接地,即不作电极使用。Further, the metal layer should choose a metal with relatively large work function, such as nickel, platinum, etc.; and the metal layer should be floating, not connected to any external voltage, not grounded, that is, not used as an electrode.
进一步的,所述P型碳化硅是所述三极管的基区,所述基区是采用不同掺杂浓度的两层结构,靠近发射结的一层厚度为t1的基区采用低浓度的P型掺杂,例如浓度小于1015cm-3的数量级;而靠近漂移区的另一层是厚度为t2的基区,其掺杂浓度要比上一层基区大,达到1017cm-3的数量级。Further, the P-type silicon carbide is the base region of the triode, and the base region adopts a two-layer structure with different doping concentrations, and a base region with a thickness of t1 near the emitter junction adopts low-concentration P type doping, for example, the concentration is less than 10 15 cm -3 ; another layer close to the drift region is the base region with a thickness of t 2 , and its doping concentration is higher than that of the base region of the previous layer, reaching 10 17 cm - 3 orders of magnitude.
进一步的,所述金属层的左端与发射极台面边缘之间形成有一SiO2钝化层,所述SiO2钝化层的厚度为40-60nm,优选为50nm。Further, a SiO 2 passivation layer is formed between the left end of the metal layer and the edge of the emitter mesa, and the thickness of the SiO 2 passivation layer is 40-60 nm, preferably 50 nm.
下面结合附图对本发明的具体实施方式作进一步的说明。The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings.
为了增加现有技术中SiC BJT的电流增益,必须减少发射极台面边缘和基极欧姆接触之间的外基区表面的复合电流,影响复合电流大小的主要因素有三个:In order to increase the current gain of SiC BJT in the prior art, it is necessary to reduce the recombination current at the outer base surface between the edge of the emitter mesa and the ohmic contact of the base. There are three main factors affecting the magnitude of the recombination current:
1、外基区表面处的缺陷浓度;1. Defect concentration at the surface of the exogenous base region;
2、外基区表面处的电子浓度;2. Electron concentration at the surface of the exogenous base region;
3、外基区表面处的空穴浓度;3. Hole concentration at the surface of the extrinsic base region;
因素1取决于现有的材料生长及工艺水平,因素2、3可能受设计的影响,本发明就是从设计方面来减少外基区表面的复合电流。在该三极管中,电子-空穴对的复合率主要取决于少数载流子的浓度,复合主要发生在发射极台面边缘到基极欧姆接触之间的外基区表面,又由于在P型基区中电子是少子,因此外基区表面处电子的浓度会极大的影响表面复合的发生。本发明通过在所述三极管的发射极台面边缘与基极欧姆接触之间的外基区表面制造一个肖特基接触结构,在该外基区表面形成肖特基势垒从而阻止电子向表面处运动,减少外基区表面处的电子浓度,抑制表面复合,提高器件的电流增益。Factor 1 depends on the existing material growth and technology level, and factors 2 and 3 may be affected by the design. The present invention is designed to reduce the recombination current on the surface of the outer base region. In this triode, the recombination rate of electron-hole pairs mainly depends on the concentration of minority carriers, and the recombination mainly occurs on the surface of the outer base region between the edge of the emitter mesa and the ohmic contact of the base, and because the P-type base The electrons in the outer base region are minority carriers, so the concentration of electrons on the surface of the outer base region will greatly affect the occurrence of surface recombination. In the present invention, a Schottky contact structure is manufactured on the surface of the outer base region between the edge of the emitter mesa and the ohmic contact of the base of the triode, and a Schottky barrier is formed on the surface of the outer base region to prevent electrons from going to the surface. Movement, reducing the electron concentration at the surface of the extrinsic base region, inhibiting surface recombination, and improving the current gain of the device.
图1是本发明的结构示意图。图中画出了发射极台面的边缘,具有发射极1、基极2、N+发射区3、P型基区4、N-集电区5、N+衬底6和集电极7。在发射极台面的边缘有SiO2钝化层8,在SiO2钝化层8的边缘和基极2之间的外基区的表面,溅射形成具有一定厚度和长度的金属层9,金属层9和P型基区4的表面形成肖特基接触结构。Fig. 1 is a schematic structural view of the present invention. The figure shows the edge of the emitter mesa, with emitter 1, base 2, N+ emitter 3, P-type base 4, N- collector 5, N+ substrate 6 and collector 7. There is a SiO2 passivation layer 8 on the edge of the emitter mesa, and on the surface of the outer base region between the edge of the SiO2 passivation layer 8 and the base 2, a metal layer 9 with a certain thickness and length is formed by sputtering, and the metal Layer 9 and the surface of P-type base region 4 form a Schottky contact structure.
图2是金属层9和基区4的肖特基接触结构示意图。此结构只是用来形成肖特基势垒,其中金属层不作电极使用,作浮空处理,不接任何电压和地。FIG. 2 is a schematic diagram of the Schottky contact structure between the metal layer 9 and the base region 4 . This structure is only used to form a Schottky barrier, in which the metal layer is not used as an electrode, it is floated, and is not connected to any voltage and ground.
需要着重说明的是,该P型基区是采用不同掺杂浓度的两层结构,靠近发射结的一层厚度为t1的基区采用低浓度的P型掺杂,浓度小于1015cm-3的数量级;而靠近漂移区的另一层是厚度为t2的基区,其掺杂浓度比上一层基区要大,达到1017cm-3的数量级。靠近发射结的一层轻掺杂是为了调节外基区表面处的P型SiC半导体的功函数,使得金属的功函数大于半导体的功函数,这样才能形成如图4所示的肖特基势垒,如此同时还可以提高发射结的注入效率。It should be emphasized that the P-type base region adopts a two-layer structure with different doping concentrations, and the base region with a thickness of t 1 close to the emitter junction adopts low-concentration P-type doping, and the concentration is less than 10 15 cm - 3 ; another layer close to the drift region is the base region with a thickness of t 2 , and its doping concentration is higher than that of the base region of the previous layer, reaching the order of 10 17 cm -3 . A layer of light doping near the emitter junction is to adjust the work function of the P-type SiC semiconductor on the surface of the outer base region, so that the work function of the metal is greater than that of the semiconductor, so that the Schottky potential shown in Figure 4 can be formed Barrier, so at the same time can also improve the injection efficiency of the emitter junction.
图3是肖特基接触前的能带图,其中E0是真空能级,(EF)m是金属的费米能级,Wm是金属的功函数,x是半导体的电子亲和能,Ws是半导体的功函数,(EF)s是半导体的费米能级,EC和EV分别是半导体的导带和价带。Figure 3 is the energy band diagram before the Schottky contact, where E0 is the vacuum energy level, (EF) m is the Fermi level of the metal, Wm is the work function of the metal, x is the electron affinity of the semiconductor, W s is the work function of the semiconductor, (EF) s is the Fermi level of the semiconductor, EC and EV are the conduction band and valence band of the semiconductor, respectively.
图4是金属和P型半导体接触后的能带图,当金属的功函数Wm大于P型半导体的功函数Ws时,半导体表面的能带向上弯曲,形成一个P型反阻挡层(阻止电子向界面处运动),同时为了保证发射结正偏,基极要加正向偏压,这会使得外基区远离表面的能带下移,表面处的能带进一步向上弯曲,势垒高度增加。最终结果是,P型外基区表面处于积累状态,空穴浓度增大,电子浓度降低,在空间上分离了电子和空穴。由于势垒的存在,电子向表面运动受到限制,从而阻止了从发射区注入基区的电子被外基区表面陷阱俘获,降低了表面复合电流,提高了电流增益。Figure 4 is the energy band diagram after the metal and P-type semiconductor are in contact. When the work function Wm of the metal is greater than the work function Ws of the P-type semiconductor, the energy band on the surface of the semiconductor is bent upwards to form a P-type anti-blocking layer (to prevent electrons from moving to At the same time, in order to ensure that the emitter junction is forward-biased, the base must be forward-biased, which will cause the energy band of the outer base region away from the surface to move down, and the energy band at the surface will further bend upwards, increasing the barrier height. The final result is that the surface of the P-type extrinsic base region is in an accumulation state, the hole concentration increases, the electron concentration decreases, and the electrons and holes are separated in space. Due to the existence of potential barriers, the movement of electrons to the surface is restricted, thereby preventing the electrons injected from the emitter region into the base region from being captured by surface traps in the outer base region, reducing the surface recombination current and increasing the current gain.
以上所述的具体实施例,对本发明的目的、技术方案和有益效果进行了进一步详细说明,应理解的是,以上所述仅为本发明的具体实施例而已,并不用于限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention, and are not intended to limit the present invention. Within the spirit and principles of the present invention, any modifications, equivalent replacements, improvements, etc., shall be included in the protection scope of the present invention.
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CN107452618A (en) * | 2017-06-19 | 2017-12-08 | 西安电子科技大学 | SiC PNM IGBT based on buries oxide layer and preparation method thereof |
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CN110752256A (en) * | 2019-10-22 | 2020-02-04 | 深圳第三代半导体研究院 | Silicon carbide Schottky clamp transistor and preparation method thereof |
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