CN105912066A - Low-power-consumption high-PSRR band-gap reference circuit - Google Patents

Abstract

The invention discloses a bandgap reference circuit with low power consumption and high PSRR, which is characterized in that it is composed of a bandgap core circuit without an op amp, a start-up circuit and a negative feedback control loop, and in the bandgap core circuit without an op amp, The resistance value of resistor R6 is much larger than that of resistor R4 and resistor R5, so that the base current of transistor Q4 is reduced to a negligible level, and at the same time avoids the use of operational amplifiers, reduces the complexity of circuit design, and further reduces the overall power In the negative feedback control loop, the voltage change of node V2 and the potential error of nodes A and B are detected, and the negative feedback voltage and the mirror effect of the current mirror are generated respectively through the transistor MN2 in the loop to suppress the power supply voltage change and the device The mismatch has a negative impact on the circuit and improves the stability of the bandgap circuit; in the start-up circuit, the start-up of the bandgap circuit is triggered by the transistor MP4, so that the start-up circuit can be quickly shut down after the bandgap circuit works normally, saving power consumption of the circuit.

Description

A Bandgap Reference Circuit with Low Power Consumption and High PSRR

technical field

The invention relates to a bandgap reference circuit, in particular to a bandgap reference circuit with low power consumption and high PSRR, and belongs to the field of electrical technology.

Background technique

One of the main circuit structures of analog integrated circuits is the bandgap reference source, which is widely used in analog hybrid integrated circuits to provide a stable DC voltage that does not depend on power supply voltage and temperature changes. Operational amplifiers are commonly used in traditional bandgap reference voltage sources (Fig. 1). However, due to the low voltage trend of CMOS technology, the typical value of intrinsic gain of transistors is about 20-30dB in deep submicron technology. This will lead to the degradation of the performance of the operational amplifier, which cannot meet the requirements of the bandgap reference circuit on its gain and bandwidth, and reduces the PSRR and stability of the bandgap reference circuit. Therefore, new design techniques and circuit structures must be used to realize low-voltage and low-power bandgap reference sources to improve circuit performance and obtain good bandgap performance; other techniques such as high-order temperature compensation can also be used to improve bandgap reference However, the use of these technologies will inevitably increase the power consumption of the circuit, which cannot be tolerated in low-power applications. Therefore, from the perspective of power consumption, low-power bandgap voltage references are more affected. people's attention.

What Fig. 1 shows is the circuit diagram of the traditional bandgap reference circuit. In the circuit shown in Figure 1, due to the use of operational amplifiers, not only the core area of the overall circuit is increased, but also the power consumption is greatly increased, which greatly increases the power consumption of the bandgap reference circuit and the limitations of the circuit design. At the same time, if the design of the operational amplifier is unreasonable, if its non-ideal factors such as offset cannot be well eliminated and suppressed, it will seriously affect the stability and accuracy of the bandgap reference, and may even cause the bandgap Loss of function of the reference circuit.

Contents of the invention

In order to solve the deficiencies of the prior art, the object of the present invention is to provide a bandgap reference circuit with low power consumption and high PSRR.

In order to achieve the above object, the present invention adopts the following technical solutions:

A bandgap reference circuit with low power consumption and high PSRR is characterized in that it is composed of a bandgap core circuit without an operational amplifier, a start-up circuit and a negative feedback control loop, wherein,

No operational amplifier bandgap core circuit: used to realize the core function of the circuit and generate the required bandgap reference voltage;

Start-up circuit: used to complete the start-up of the bandgap reference circuit, so that the bandgap reference circuit enters a normal working state;

Negative feedback control loop: used to control and improve the stability of the bandgap reference circuit, eliminate the use of operational amplifiers, reduce power consumption and chip area;

The working process of the whole circuit is: the circuit is powered on, the start-up circuit starts to work first, the core circuit without op amp bandgap is turned on, the bandgap reference circuit generates a reference voltage, and at the same time, the negative feedback control loop suppresses the harmful influence of non-ideal factors on the circuit .

The aforementioned bandgap reference circuit with low power consumption and high PSRR is characterized in that the bandgap core circuit without an operational amplifier is mainly composed of transistor Q3, transistor Q4, resistor R1, resistor R2, resistor R3, resistor R4, resistor R5 and resistor R6 The aforementioned transistor is an NPN type bipolar transistor, and the resistance value of the aforementioned resistor R6 is much larger than that of the resistor R4 and the resistor R5, wherein,

The emitter of the transistor Q3 is connected to the ground, the base of the transistor Q3 is connected to one end of the resistor R2 and one end of the resistor R4, and the collector of the transistor Q3 is connected to the other end of the resistor R4 and one end of the resistor R6;

The emitter of the transistor Q4 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the ground, the base of the transistor Q4 is connected to the other end of the resistor R6, the collector of the transistor Q4 is connected to one end of the resistor R3, and the other end of the resistor R3 One end is connected to the other end of the resistor R2, and the connection node of the two is connected to one end of the resistor R1;

Among them, the base of transistor Q3 is the first clamp matching end of the core circuit without op amp bandgap, which is connected to the first feedback detection input end of the negative feedback control loop; the collector of transistor Q4 is the core circuit without op amp bandgap The second clamp matching end of the circuit is connected to the second feedback detection input end of the negative feedback control loop; the other end of the resistor R1 is the output end of the non-op-amp bandgap core circuit, which is connected to the bandgap reference output voltage V _ref is connected.

The aforementioned bandgap reference circuit with low power consumption and high PSRR is characterized in that the aforementioned start-up circuit is mainly composed of transistor MP4, transistor MP5, transistor Q5, transistor Q6, resistor R7, resistor R8 and resistor R9, and the aforementioned transistor MP4, transistor MP5 It is a PMOS transistor, and the aforementioned transistor Q5 and transistor Q6 are NPN type bipolar transistors, wherein,

The gate terminal of the transistor MP4 is connected with the drain terminal of the transistor MP5 and the collector of the transistor Q6, the source terminal of the transistor MP4 is connected with the power supply voltage, the drain terminal of the transistor MP4 is connected with one terminal of the resistor R7, and the other terminal of the resistor R7 is used for starting the circuit an output terminal connected to the start input terminal of the negative feedback control loop;

The source terminal of the transistor MP5 is connected to the power supply voltage, the drain terminal of the transistor MP5 is connected to the collector of the transistor Q6, and the gate terminal of the transistor MP5 is a switch port of the startup circuit, which is connected to the gate terminal of the transistor MP2 in the negative feedback control loop;

The base of the transistor Q6 is connected to the collector of the transistor Q5, and the emitter of the transistor Q6 is connected to the ground;

The base of the transistor Q5 is connected to one end of the resistor R8 and one end of the resistor R9, the collector of the transistor Q5 is connected to the other end of the resistor R8, the emitter of the transistor Q5 is connected to the ground, and the other end of the resistor R9 is connected to the power supply voltage.

The aforementioned bandgap reference circuit with low power consumption and high PSRR is characterized in that the aforementioned negative feedback control loop is mainly composed of transistor MP1, transistor MP2, transistor MP3, transistor MN1, transistor MN2, transistor MN3, transistor Q1, transistor Q2, resistor Composed of R0 and resistor R10, the aforementioned transistor MP1, transistor MP2, and transistor MP3 are PMOS transistors, the aforementioned transistor MN1, transistor MN2, and transistor MN3 are NMOS transistors, and the aforementioned transistor Q1 and transistor Q2 are NPN transistors, wherein,

The gate terminal of the transistor MP1, the gate terminal of the transistor MP2 are connected to the gate terminal of the transistor MP3, the source terminal of the transistor MP1, the source terminal of the transistor MP2, and the source terminal of the transistor MP3 are connected to the power supply voltage, and the drain terminal of the transistor MP1 is connected to the transistor MN1. The source terminal is connected to the collector of the transistor Q1, the drain terminal of the transistor MP2 is connected to the gate terminal of the transistor MP2, and the drain terminal of the transistor MN1, and the drain terminal of the transistor MP3 is connected to the gate terminal of the transistor MN1, the gate terminal of the transistor MN2, and the gate terminal of the transistor MN2. The drain terminal is connected to the gate terminal of the transistor MN3;

The gate terminal of the transistor MN1 is connected to the gate terminal of the transistor MN2, the drain terminal of the transistor MN2, and the gate terminal of the transistor MN3, and the drain terminal of the transistor MN2 is the starting input terminal of the negative feedback control loop, which is connected to the output terminal of the starting circuit;

The source terminal of the transistor MN1 is connected to the collector of the transistor Q1, the source terminal of the transistor MN2 is connected to the collector of the transistor Q2, the source terminal of the transistor MN3 is connected to the bandgap reference output voltage _Vref , the drain terminal of the transistor MN3 is connected to the resistor R0 One end is connected, and the other end of the resistor R0 is connected to the power supply voltage;

The emitter of the transistor Q1 is connected to one end of the resistor R10, and the other end of the resistor R10 is connected to the ground. The base of the transistor Q1 is the first feedback detection input end of the negative feedback control loop, and it is connected to the first end of the bandgap-free core circuit of the op amp. A clamp matching terminal is connected;

The emitter of the transistor Q2 is connected to the ground, and the base of the transistor Q2 is the second feedback detection input terminal of the negative feedback control loop, which is connected to the second clamp matching terminal of the non-op-amp bandgap core circuit.

The benefits of the present invention are:

(1) Has lower power consumption

In the bandgap reference circuit, since the traditional bandgap reference circuit uses a complex operational amplifier to improve the stability of the bandgap reference circuit, and the operational amplifier occupies most of the power consumption, we use a negative feedback control loop instead Technology to improve the stability of the bandgap reference circuit, avoid the use of high-power operational amplifiers, save considerable power consumption, and is very suitable for low-power applications.

(2) Higher power supply rejection ratio (PSRR) and stability

In the bandgap reference circuit of the present invention, a negative feedback control loop is composed of transistor Q1, transistor Q2, transistor MP1, transistor MP2, transistor MP3, transistor MN1, and transistor MN2, and bias is generated at the same time. Among them, the transistor MP1, the transistor MP2 and the transistor MP3 form a current mirror, which is formed by parallel connection of 3, 1 and 4 unit transistors respectively. Under the same voltage bias condition, the ratio of the current flowing through the transistor MP1, the transistor MP2 and the transistor MP3 It will be 3:1:4, the current flowing through the transistor Q1 is the sum of the currents of the transistor MP1 and the transistor MP2, and the current flowing through the transistor Q2 is the current flowing through the transistor MP3, here due to the transistor Q1, the transistor Q2 The base current is so small that it is ignored, thus ensuring that the currents I4 and I5 are equal. In addition, transistor MP1, transistor MP2, transistor MP3, transistor MN1, and transistor MN2 together constitute a cascode current mirror. Once the power supply voltage changes or there is an offset voltage, the negative feedback mechanism will help suppress the power supply voltage. fluctuations, improve the power supply voltage rejection ratio.

As far as the traditional bandgap reference circuit structure is concerned, the bandgap reference circuit of the present invention using the negative feedback loop control technology has higher power supply voltage rejection ratio (PSRR) and stability.

(3) It has a simpler circuit structure and a smaller core area

In the bandgap reference voltage source circuit of the present invention, compared with the traditional bandgap reference voltage source, eliminating the use of complex operational amplifiers is a major feature of the circuit of the present invention. Thanks to this, the entire bandgap circuit is structurally It is simpler and does not need to use complex circuit design technology, so it is more convenient at the design level, and the chip area occupied is correspondingly reduced, which greatly reduces the production cost.

Description of drawings

Fig. 1 is the circuit diagram of traditional bandgap reference circuit;

Fig. 2 (a) is the composition schematic diagram of the bandgap reference circuit of the present invention;

Fig. 2 (b) is the circuit diagram of the bandgap reference circuit in Fig. 2 (a);

Fig. 3 is the circuit diagram of the core circuit without operational amplifier bandgap among Fig. 2 (b);

Fig. 4 is the circuit diagram of the feedback control loop among Fig. 2 (b);

Fig. 5 is a circuit diagram of the starting circuit in Fig. 2(b).

detailed description

The bandgap reference circuit of the present invention is designed on the basis of the traditional bandgap reference circuit and combined with negative feedback control loop technology. The designed bandgap circuit not only has lower power consumption, but also has higher power supply rejection ratio (PSRR).

The present invention will be specifically introduced below in conjunction with the accompanying drawings and specific embodiments.

With reference to Fig. 2 (a) and Fig. 2 (b), the bandgap reference circuit of low power consumption high PSRR of the present invention is made up of no operational amplifier bandgap core circuit, start-up circuit and negative feedback control loop, wherein,

No op amp bandgap core circuit: used to realize the core function of the circuit and generate the required bandgap reference voltage.

Start-up circuit: used to complete the normal start-up of the bandgap reference circuit, so that the bandgap reference circuit enters a normal working state.

Negative feedback control loop: used to control and improve the stability of the bandgap reference circuit, eliminate the use of operational amplifiers, and reduce power consumption and chip area.

The working process of the whole circuit is: the circuit is powered on, the startup circuit starts to work first, the core circuit without the op amp bandgap is turned on, the bandgap reference circuit generates a reference voltage, and at the same time, the negative feedback control loop suppresses non-ideal factors (such as power supply voltage fluctuations , Device mismatch, etc.) have a vicious influence on the circuit, thereby improving the stability of the circuit and ensuring the realization of the function of the circuit.

The following describes in detail the non-op amp bandgap core circuit, start-up circuit and negative feedback control loop.

1. No op amp bandgap core circuit

Referring to Figure 3, the non-op-amp bandgap core circuit is mainly composed of transistors Q3, transistors Q4, resistors R1, resistors R2, resistors R3, resistors R4, resistors R5 and resistors R6, wherein the transistors are NPN bipolar transistors, and the resistors R6 The resistance value is much larger than the resistor R4 and the resistor R5.

The connection relationship between each component is as follows:

The emitter of the transistor Q3 is connected to the ground, the base of the transistor Q3 is connected to one end of the resistor R2 and one end of the resistor R4, and the collector of the transistor Q3 is connected to the other end of the resistor R4 and one end of the resistor R6;

The emitter of the transistor Q4 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the ground, the base of the transistor Q4 is connected to the other end of the resistor R6, the collector of the transistor Q4 is connected to one end of the resistor R3, and the other end of the resistor R3 One end is connected to the other end of the resistor R2, and the connection node (namely node C) of the two is connected to one end of the resistor R1.

In this no-op-amp bandgap core circuit:

(1) The base of the transistor Q3 is the first clamp matching end (i.e. node A) of the bandgap-free core circuit of the op amp, which is connected to the first feedback detection input end of the negative feedback control loop (i.e. the base of the transistor Q1) connected;

(2) The collector of transistor Q4 is the second clamping matching end (i.e. node B) of the core circuit without op-amp bandgap, which is connected to the second feedback detection input end of the negative feedback control loop (i.e. the base of transistor Q2 ) connected;

(3) The other end of the resistor R1 is the output end of the non-op-amp bandgap core circuit, which is connected to the bandgap reference output voltage V _ref .

Figure 1 is a circuit diagram of a conventional bandgap reference voltage source. In the circuit shown in Figure 1, due to the use of operational amplifiers, the structural complexity and power consumption of the circuit increase significantly.

The bandgap reference circuit in this design is an improvement on the basis of the circuit shown in Figure 1. The purpose is to eliminate the use of operational amplifiers, simplify the circuit structure design, and reduce the power consumption of the circuit. details as follows:

In the case of temporarily disregarding device mismatch, the potentials of nodes A and B are equalized by setting the resistance values of resistors R2 and R3 to be equal, so that the base-emitter voltage V BE3 of transistor Q3 is equal to the base-emitter voltage V _BE3 of transistor Q4 Emitter voltage V _BE4 , thus a PTAT current represented by the base-emitter voltage difference ΔV _BE can be obtained. After the current flows through the resistor, a voltage with a positive temperature coefficient can be obtained. The desired bandgap reference output voltage V _ref is obtained after the base-emitter voltage V _BE3 of the transistor Q3 is summed.

It can be seen that in the non-op-amp bandgap core circuit, by setting the resistance value of resistor R6 to be much larger than resistor R4 and resistor R5, the base current of transistor Q4 is reduced to a negligible level, which is not only beneficial The accuracy of the bandgap output voltage is improved, and the use of an operational amplifier is avoided, the complexity of circuit design is reduced, and the overall power consumption is further reduced.

2. Start circuit

Referring to Figure 5, the starting circuit is mainly composed of transistor MP4, transistor MP5, transistor Q5, transistor Q6, resistor R7, resistor R8 and resistor R9, wherein transistor MP4 and transistor MP5 are PMOS transistors, transistor Q5 and transistor Q6 are NPN double pole transistor.

The connection relationship between each component is as follows:

The gate terminal of the transistor MP4 is connected with the drain terminal of the transistor MP5 and the collector of the transistor Q6, the source terminal of the transistor MP4 is connected with the power supply voltage, the drain terminal of the transistor MP4 is connected with one terminal of the resistor R7, and the other terminal of the resistor R7 is used for starting the circuit an output terminal, which is connected to the start input terminal of the negative feedback control loop (that is, the drain terminal of the transistor MN2);

The source terminal of the transistor MP5 is connected to the power supply voltage, the drain terminal of the transistor MP5 is connected to the collector of the transistor Q6, and the gate terminal of the transistor MP5 is a switch port of the starting circuit, which is connected to the current mirror gate terminal V1 of the negative feedback control loop;

The base of the transistor Q6 is connected to the collector of the transistor Q5, and the emitter of the transistor Q6 is connected to the ground;

The base of the transistor Q5 is connected to one end of the resistor R8 and one end of the resistor R9, the collector of the transistor Q5 is connected to the other end of the resistor R8, the emitter of the transistor Q5 is connected to the ground, and the other end of the resistor R9 is connected to the power supply voltage.

In the start-up circuit shown in Figure 5, when the circuit is initially powered on, both transistors Q5 and Q6 are in the off state, and as the voltage rises, the transistor Q6 is turned on, which causes the voltage V4 to be output at a lower level, making the The transistor MP4 is turned on, and then the bandgap reference circuit is started. As the voltage continues to rise, the transistor Q5 is also turned on, so that the base of the transistor Q6 is equivalent to grounding, and the transistor Q6 is turned off. At this time, the bandgap reference circuit has been started, the current mirror grid voltage V1 makes the transistor MP5 tube also be turned on, and the voltage V4 is pulled up to a high level, and the transistor MP4 is turned off, so that the connection between the startup circuit and the bandgap reference circuit Disconnect to complete the start-up of the circuit. Here, the resistance value of resistor R8 is much greater than that of resistor R9, so that the voltage drop on the base of transistor Q6 is smaller than the voltage drop on the base of transistor Q5, which ensures that the bandgap reference circuit can be effectively turned off when the circuit is working. Start the circuit.

It can be seen that in the start-up circuit, the start-up of the bandgap circuit is triggered by the transistor MP4, so that the start-up circuit can be shut down quickly after the bandgap circuit works normally, saving power consumption of the circuit.

3. Negative feedback control loop

Referring to Fig. 4, the negative feedback control loop is mainly composed of transistor MP1, transistor MP2, transistor MP3, transistor MN1, transistor MN2, transistor MN3, transistor Q1, transistor Q2, resistor R0 and resistor R10, wherein transistor MP1, transistor MP2, The transistor MP3 is a PMOS transistor, the transistor MN1 , the transistor MN2 , and the transistor MN3 are NMOS transistors, and the transistor Q1 and the transistor Q2 are NPN transistors.

The connection relationship between each component is as follows:

The gate terminal of the transistor MP1, the gate terminal of the transistor MP2 are connected to the gate terminal of the transistor MP3, the source terminal of the transistor MP1, the source terminal of the transistor MP2, and the source terminal of the transistor MP3 are connected to the power supply voltage, and the drain terminal of the transistor MP1 is connected to the transistor MN1. The source terminal is connected to the collector of the transistor Q1, the drain terminal of the transistor MP2 is connected to the gate terminal of the transistor MP2, and the drain terminal of the transistor MN1, and the drain terminal of the transistor MP3 is connected to the gate terminal of the transistor MN1, the gate terminal of the transistor MN2, and the gate terminal of the transistor MN2. The drain terminal is connected to the gate terminal of the transistor MN3;

The gate terminal of the transistor MN1 is connected with the gate terminal of the transistor MN2, the drain terminal of the transistor MN2, and the gate terminal of the transistor MN3, and the drain terminal of the transistor MN2 is another input terminal of the negative feedback control loop, and it is connected with the output terminal of the starting circuit ( That is, the other end of the resistor R7) is connected;

The source terminal of the transistor MN1 is connected to the collector of the transistor Q1, the source terminal of the transistor MN2 is connected to the collector of the transistor Q2, the source terminal of the transistor MN3 is connected to the bandgap reference output voltage _Vref , the drain terminal of the transistor MN3 is connected to the resistor R0 One end is connected, and the other end of the resistor R0 is connected to the power supply voltage;

The emitter of the transistor Q1 is connected to one end of the resistor R10, and the other end of the resistor R10 is connected to the ground. The base of the transistor Q1 is the first feedback detection input end of the negative feedback control loop, and it is connected to the first end of the bandgap-free core circuit of the op amp. A clamping matching terminal (namely node A) is connected;

The emitter of the transistor Q2 is connected to the ground, and the base of the transistor Q2 is the second feedback detection input terminal of the negative feedback control loop, which is connected to the second clamp matching terminal (namely node B) of the non-op-amp bandgap core circuit.

In the negative feedback control loop shown in Figure 4, transistor MP2, transistor MP3, transistor MN1, and transistor MN2 form a cascode current mirror, which helps to suppress power supply disturbance and improve power supply voltage rejection ratio. The principle of the circuit structure for the stability of the voltage bias and the suppression of power fluctuations is as follows:

When the gate voltage V1 of the current mirror is disturbed to produce an increase, the gate-source voltage of transistor MP1 and transistor MP2 will decrease, and then the current of transistor MP1 and transistor MP2 will decrease, and the currents I4 and I5 flowing through the bipolar transistors will decrease. If kept unchanged, the grid voltage V1 of the current mirror will be pulled down correspondingly to keep stable. In order to ensure that I4 and I5 remain unchanged, it is necessary to suppress changes in the currents of the two branches of the transistor MP1 and the transistor MP2. When the gate voltage V1 of the current mirror is disturbed to generate an increase, the gate-source voltage of the transistor MP1 decreases, and the current flowing through the transistor MP1 also decreases accordingly. In order to suppress the decrease, the drain-source voltage of the transistor MP1 increases accordingly. That is, the voltage V2 at the source terminal of the transistor MN1 will decrease. The decrease of the source terminal voltage V2 will cause the gate-source voltage of the transistor MN1 to increase correspondingly, and the current flowing through the transistor MN1 will increase accordingly. In order to suppress the increase, the drain-source voltage of the transistor MN1 will decrease accordingly, that is, the source The terminal voltage V2 will decrease, which suppresses the original change of the source terminal voltage V2 and remains stable.

At the same time, the negative feedback structure also has an inhibitory effect on the change of the power supply voltage. When the power supply voltage VDD is increased by a disturbance, the gate-source voltage of the transistor MP1 will increase, and then the current of the transistor MP1 will increase. In order to suppress this increase, the drain-source voltage of the transistor MP1 will decrease accordingly, that is, the source terminal voltage V2 will increase. Due to the increase of the source terminal voltage V2, the gate-source voltage of the transistor MN1 decreases. In order to ensure the stability of the current, the current mirror gate voltage V1 will be pulled up to increase the gate voltage of the transistor MN1, that is, the current mirror gate voltage V1 The increase of VDD will correspondingly offset the negative impact caused by the increase of VDD, keep the gate-source voltage of the PMOS transistor basically unchanged, suppress the influence of VDD changes on the current, improve the power supply voltage rejection ratio of the circuit, and enhance the stability of the circuit.

For device mismatch, the negative feedback structure also has a suppressive effect. If VA>VB, the current I4 flowing through the transistor Q1 will rise, and due to the mirror effect of the current mirror, the current I5 flowing through the transistor Q2 will also rise, that is, the base-emitter voltage of the transistor Q2 rises, and the transistor Q2 The emitter voltage of Q2 remains unchanged due to grounding, so the base voltage VB of transistor Q2 will be raised to narrow the gap with VA.

It can be seen that in the negative feedback control loop, the voltage change of the detection node V2 and the potential error of the A and B nodes are detected, and the negative feedback voltage and the mirror effect of the current mirror are generated respectively through the transistor MN2 in the loop to suppress the power supply voltage change and the device The mismatch negatively impacts the circuit, improving the stability of the bandgap circuit.

To sum up, the bandgap reference circuit of the present invention not only has lower power consumption, but also has higher PSRR, and can still work stably when the process, voltage and temperature vary.

It should be noted that the above embodiments do not limit the present invention in any form, and all technical solutions obtained by means of equivalent replacement or equivalent transformation fall within the protection scope of the present invention.

Claims (4)

1. A bandgap reference circuit with low power consumption and high PSRR is characterized in that it is made up of no operational amplifier bandgap core circuit, start-up circuit and negative feedback control loop, wherein, No operational amplifier bandgap core circuit: used to realize the core function of the circuit and generate the required bandgap reference voltage; Start-up circuit: used to complete the start-up of the bandgap reference circuit, so that the bandgap reference circuit enters a normal working state; Negative feedback control loop: used to control and improve the stability of the bandgap reference circuit, eliminate the use of operational amplifiers, reduce power consumption and chip area; The working process of the whole circuit is: the circuit is powered on, the start-up circuit starts to work first, the core circuit without op amp bandgap is turned on, the bandgap reference circuit generates a reference voltage, and at the same time, the negative feedback control loop suppresses the harmful influence of non-ideal factors on the circuit . 2. The bandgap reference circuit of low power consumption and high PSRR according to claim 1, wherein the bandgap core circuit without an operational amplifier is mainly composed of transistor Q3, transistor Q4, resistor R1, resistor R2, resistor R3, Composed of resistor R4, resistor R5 and resistor R6, the transistor is an NPN type bipolar transistor, and the resistance value of the resistor R6 is much larger than that of the resistor R4 and the resistor R5, wherein, The emitter of the transistor Q3 is connected to the ground, the base of the transistor Q3 is connected to one end of the resistor R2 and one end of the resistor R4, and the collector of the transistor Q3 is connected to the other end of the resistor R4 and one end of the resistor R6; The emitter of the transistor Q4 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the ground, the base of the transistor Q4 is connected to the other end of the resistor R6, the collector of the transistor Q4 is connected to one end of the resistor R3, and the other end of the resistor R3 One end is connected to the other end of the resistor R2, and the connection node of the two is connected to one end of the resistor R1; Among them, the base of transistor Q3 is the first clamp matching end of the core circuit without op amp bandgap, which is connected to the first feedback detection input end of the negative feedback control loop; the collector of transistor Q4 is the core circuit without op amp bandgap The second clamp matching end of the circuit is connected to the second feedback detection input end of the negative feedback control loop; the other end of the resistor R1 is the output end of the non-op-amp bandgap core circuit, which is connected to the bandgap reference output voltage V _ref is connected. 3. The bandgap reference circuit of low power consumption and high PSRR according to claim 2, wherein the start-up circuit is mainly composed of transistor MP4, transistor MP5, transistor Q5, transistor Q6, resistor R7, resistor R8 and resistor R9 composition, the transistor MP4 and the transistor MP5 are PMOS transistors, and the transistor Q5 and the transistor Q6 are NPN bipolar transistors, wherein, The gate terminal of the transistor MP4 is connected with the drain terminal of the transistor MP5 and the collector of the transistor Q6, the source terminal of the transistor MP4 is connected with the power supply voltage, the drain terminal of the transistor MP4 is connected with one terminal of the resistor R7, and the other terminal of the resistor R7 is used for starting the circuit an output terminal connected to the start input terminal of the negative feedback control loop; The source terminal of the transistor MP5 is connected to the power supply voltage, the drain terminal of the transistor MP5 is connected to the collector of the transistor Q6, and the gate terminal of the transistor MP5 is a switch port of the starting circuit, which is connected to the gate terminal of the transistor MP2 in the negative feedback control loop; The base of the transistor Q6 is connected to the collector of the transistor Q5, and the emitter of the transistor Q6 is connected to the ground; The base of the transistor Q5 is connected to one end of the resistor R8 and one end of the resistor R9, the collector of the transistor Q5 is connected to the other end of the resistor R8, the emitter of the transistor Q5 is connected to the ground, and the other end of the resistor R9 is connected to the power supply voltage. 4. The bandgap reference circuit of low power consumption and high PSRR according to claim 3, wherein the negative feedback control loop is mainly composed of transistor MP1, transistor MP2, transistor MP3, transistor MN1, transistor MN2, transistor MN3 , transistor Q1, transistor Q2, resistor R0 and resistor R10, the transistor MP1, transistor MP2, and transistor MP3 are PMOS transistors, the transistor MN1, transistor MN2, and transistor MN3 are NMOS transistors, and the transistor Q1 and transistor Q2 are NPN type transistors, where, The gate terminal of the transistor MP1, the gate terminal of the transistor MP2 are connected to the gate terminal of the transistor MP3, the source terminal of the transistor MP1, the source terminal of the transistor MP2, and the source terminal of the transistor MP3 are connected to the power supply voltage, and the drain terminal of the transistor MP1 is connected to the transistor MN1 The source terminal is connected to the collector of the transistor Q1, the drain terminal of the transistor MP2 is connected to the gate terminal of the transistor MP2, and the drain terminal of the transistor MN1, and the drain terminal of the transistor MP3 is connected to the gate terminal of the transistor MN1, the gate terminal of the transistor MN2, and the gate terminal of the transistor MN2. The drain terminal is connected to the gate terminal of the transistor MN3; The gate terminal of the transistor MN1 is connected to the gate terminal of the transistor MN2, the drain terminal of the transistor MN2, and the gate terminal of the transistor MN3, and the drain terminal of the transistor MN2 is the starting input terminal of the negative feedback control loop, which is connected to the output terminal of the starting circuit; The source terminal of the transistor MN1 is connected to the collector of the transistor Q1, the source terminal of the transistor MN2 is connected to the collector of the transistor Q2, the source terminal of the transistor MN3 is connected to the bandgap reference output voltage _Vref , the drain terminal of the transistor MN3 is connected to the resistor R0 One end is connected, and the other end of the resistor R0 is connected to the power supply voltage; The emitter of the transistor Q1 is connected to one end of the resistor R10, and the other end of the resistor R10 is connected to the ground. The base of the transistor Q1 is the first feedback detection input end of the negative feedback control loop, which is connected to the first end of the bandgap-free core circuit of the op amp. A clamp matching terminal is connected; The emitter of the transistor Q2 is connected to the ground, and the base of the transistor Q2 is the second feedback detection input terminal of the negative feedback control loop, which is connected to the second clamp matching terminal of the non-op-amp bandgap core circuit.