CN105871206B - A kind of improved B uck converter based on pulse train control - Google Patents
A kind of improved B uck converter based on pulse train control Download PDFInfo
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- CN105871206B CN105871206B CN201610341795.1A CN201610341795A CN105871206B CN 105871206 B CN105871206 B CN 105871206B CN 201610341795 A CN201610341795 A CN 201610341795A CN 105871206 B CN105871206 B CN 105871206B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
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Abstract
本发明涉及到一种基于脉冲序列控制的改进型Buck变换器，包括改进型Buck变换器和PT控制电路。所述的改进型Buck变换器是由Buck拓扑演变而来，将Buck变换器中的储能电感用一对耦合电感代替。耦合电感T原边侧同名端、二极管D阴极和MOS管Q源极相互连接；原边侧异名端、副边侧同名端和无极性电容C1的一端相互连接；副边侧异名端、中间电容C1的另一端、输出滤波电容C正极和负载R一端相互连接。所述的改进型Buck变换器运行在连续导电模式时能消除输出电压的低频波动现象。
The invention relates to an improved Buck converter based on pulse sequence control, comprising an improved Buck converter and a PT control circuit. The improved Buck converter is evolved from the Buck topology, and the energy storage inductor in the Buck converter is replaced by a pair of coupled inductors. The same-named terminal on the primary side of the coupled inductor T, the cathode of the diode D and the source of the MOS transistor Q are connected to each other; , the other end of the intermediate capacitor C1 , the positive pole of the output filter capacitor C and one end of the load R are connected to each other. The improved Buck converter can eliminate the low-frequency fluctuation phenomenon of the output voltage when it operates in the continuous conduction mode.
Description
技术领域technical field
本发明涉及一种改进型Buck变换器，具体是一种基于脉冲序列控制的改进型Buck变换器。The invention relates to an improved Buck converter, in particular to an improved Buck converter based on pulse sequence control.
背景技术：Background technique:
脉冲序列(PT)控制是一种新颖的开关变换器非线性离散控制技术，它不需要补偿网络，控制电路实现简单。PT控制开关变换器具有传统脉冲宽度调制(PWM)的线性控制开关变换器无法比拟的快速动态响应能力，非常适用于对可靠性要求较高的开关电源控制系统。Pulse train (PT) control is a novel non-linear discrete control technology for switching converters, it does not need compensation network, and the control circuit is simple to implement. The PT control switching converter has a fast dynamic response capability that cannot be compared with the traditional pulse width modulation (PWM) linear control switching converter, and is very suitable for switching power supply control systems with high reliability requirements.
PT控制是针对电感电流断续导电模式(DCM)开关变换器提出来的一种控制方法，它本质上是对开关变换器的输入能量控制。在一个开关周期内，开关变换器的电感储能为零，输入能量全部传递到输出端。PT控制选择高功率控制脉冲以向开关变换器输入更多的能量，使输出电压上升；选择低功率控制脉冲以减小向开关变换器输入的能量，使输出电压下降。开关变换器稳态工作时，由高功率控制脉冲和低功率控制脉冲组合形成一个脉冲序列循环周期，在该脉冲循环周期内输入能量和输出能量达到动态平衡，从而维持输出电压的恒定。基于PT控制的Buck变换器工作于电感电流连续导电模式(CCM)时，在一个开关周期内，Buck变换器的电感储能不再为零，输出电压变化量不再直接受控于控制脉冲相关。对于PT控制CCMBuck变换器，高功率控制脉冲作用时，电感电流上升，但不能保证输出电压立即上升；同样地，低功率控制脉冲作用时，电感电流下降，但不能保证输出电压立即下降。因此，PT控制CCMBuck变换器存在输出电压调节的滞后性和由此引起的输出电压的低频波动现象。PT control is a control method proposed for the inductor current discontinuous conduction mode (DCM) switching converter, which essentially controls the input energy of the switching converter. In a switching cycle, the inductance energy storage of the switching converter is zero, and all the input energy is transferred to the output terminal. PT control selects high-power control pulses to input more energy to the switching converter to increase the output voltage; selects low-power control pulses to reduce the energy input to the switching converter to decrease the output voltage. When the switching converter works in a steady state, a pulse sequence cycle is formed by combining high-power control pulses and low-power control pulses. In this pulse cycle, the input energy and output energy reach a dynamic balance, thereby maintaining a constant output voltage. When the Buck converter based on PT control works in the continuous conduction mode (CCM) of the inductor current, within one switching cycle, the inductor energy storage of the Buck converter is no longer zero, and the output voltage variation is no longer directly controlled by the control pulse correlation. . For the PT-controlled CCMBuck converter, when the high-power control pulse is applied, the inductor current rises, but the output voltage cannot be guaranteed to rise immediately; similarly, when the low-power control pulse is applied, the inductor current decreases, but the output voltage cannot be guaranteed to drop immediately. Therefore, the PT controlled CCMBuck converter has the hysteresis of the output voltage regulation and the low-frequency fluctuation of the output voltage caused by it.
针对以上PT控制CCMBuck变换器存在的低频波动问题，本发明提出一种改进型Buck变换器，消除了低频波动现象。Aiming at the low-frequency fluctuation problem existing in the PT-controlled CCMBuck converter, the present invention proposes an improved Buck converter, which eliminates the low-frequency fluctuation phenomenon.
发明内容：Invention content:
本发明是针对上述低频波动问题，提出一种基于脉冲序列控制的改进型Buck变换器。为了实现上述目的，本发明采用如下技术方案：所提变换器由改进型Buck变换器和PT控制电路组成；PT控制电路是由比较器AC、D触发器DFF、与门AN1、AN2、或门OR、驱动器DR组成，其中，比较器AC的正极性端接参考电压，比较器AC的输出端接D触发器DFF的输入端，D触发器DFF的时钟信号端接低功率脉冲，D触发器DFF的输出端接与门AN1的一个输入端，D触发器DFF的反相输出端接与门AN2的一个输入端，与门AN1的另一个输入端接高功率脉冲，与门AN2的另一个输入端接低功率脉冲，与门AN1、AN2的输出端分别对应接或门OR的两个输入端，或门OR的输出端接驱动器DR输入端；改进型Buck变换器包括：电源E、MOS管Q、二极管D、耦合电感T、无极性电容C1、输出滤波电容C和负载R；其特征在于，所述的改进型Buck变换器是由Buck拓扑演变而来，将Buck变换器中的储能电感用一对耦合电感T代替；MOS管Q漏极接输入电源E正极；耦合电感T原边侧同名端、二极管D阴极和MOS管Q源极相互连接；原边侧异名端、副边侧同名端和无极性电容C1的一端相互连接；副边侧异名端、无极性电容C1的另一端、输出滤波电容C正极和负载R一端相互连接；电源E负极、二极管D阳极、输出滤波电容C负极和负载R另一端相互连接；MOS管Q栅极接PT控制电路中驱动器DR输出端；变换器输出电压的正端接PT控制电路中比较器AC的负极性端。所述的耦合电感原边侧L1和副边侧L2电感值相同且耦合系数α取值范围为0.8到0.9。所述的无极性电容C1为陶瓷电容或薄膜电容。The present invention aims at the above low-frequency fluctuation problem, and proposes an improved Buck converter based on pulse sequence control. In order to achieve the above object, the present invention adopts the following technical scheme: the proposed converter is composed of an improved Buck converter and a PT control circuit; the PT control circuit is composed of a comparator AC, a D flip-flop DFF, AND gates AN1, AN2, or OR and driver DR, where the positive terminal of the comparator AC is connected to the reference voltage, the output terminal of the comparator AC is connected to the input terminal of the D flip-flop DFF, the clock signal of the D flip-flop DFF is connected to the low-power pulse, and the D flip-flop The output terminal of the DFF is connected to an input terminal of the AND gate AN1, the inverting output terminal of the D flip-flop DFF is connected to an input terminal of the AND gate AN2, the other input terminal of the AND gate AN1 is connected to a high-power pulse, and the other input terminal of the AND gate AN2 The input terminal is connected to the low power pulse, and the output terminals of the AND gate AN1 and AN2 are respectively connected to the two input terminals of the OR gate OR, and the output terminal of the OR gate OR is connected to the input terminal of the driver DR; the improved Buck converter includes: power supply E, MOS Tube Q, diode D, coupling inductor T, non-polar capacitor C1, output filter capacitor C and load R; it is characterized in that the improved Buck converter is evolved from the Buck topology, and the storage in the Buck converter The energy inductance is replaced by a pair of coupled inductors T; the drain of the MOS tube Q is connected to the positive pole of the input power supply E; the same-named terminal on the primary side of the coupled inductor T, the cathode of the diode D, and the source of the MOS tube Q are connected to each other; The terminal with the same name on the side and one end of the non-polar capacitor C1 are connected to each other; the terminal with the same name on the secondary side, the other end of the non-polar capacitor C1, the positive pole of the output filter capacitor C, and the end of the load R are connected to each other; the negative pole of the power supply E, the anode of the diode D, and the output The negative terminal of the filter capacitor C is connected to the other end of the load R; the gate of the MOS transistor Q is connected to the output terminal of the driver DR in the PT control circuit; the positive terminal of the converter output voltage is connected to the negative terminal of the comparator AC in the PT control circuit. The primary side L1 of the coupled inductor and the secondary side L2 have the same inductance value, and the coupling coefficient α ranges from 0.8 to 0.9. The non-polar capacitor C1 is a ceramic capacitor or a film capacitor.
本发明有益效果：消除了PT控制Buck变换器运行在CCM模式时存在的低频波动现象。The beneficial effect of the invention is that the phenomenon of low-frequency fluctuation existing when the PT controls the Buck converter to operate in the CCM mode is eliminated.
附图说明：Description of drawings:
图1为一种PT控制改进型Buck变换器电路结构框图。Figure 1 is a block diagram of a PT control improved Buck converter circuit structure.
图2为PT控制Buck变换器在负载R为2.0Ω时的仿真波形。Figure 2 is the simulation waveform of the PT controlled Buck converter when the load R is 2.0Ω.
图3为PT控制改进型Buck变换器在负载R为2.0Ω时的仿真波形。Fig. 3 is the simulated waveform of the PT control improved Buck converter when the load R is 2.0Ω.
图4为PT控制Buck变换器在负载R为5.0Ω时的仿真波形。Figure 4 is the simulation waveform of the PT-controlled Buck converter when the load R is 5.0Ω.
图5为PT控制改进型Buck变换器在负载R为5.0Ω时的仿真波形。Figure 5 is the simulation waveform of the improved Buck converter controlled by PT when the load R is 5.0Ω.
具体实施方式：Detailed ways:
下面结合附图和实施例对本发明技术方案进行详细说明。The technical solution of the present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.
图1为一种PT控制改进型Buck变换器电路结构框图，由改进型Buck变换器和PT控制电路组成。PT控制电路是由比较器AC、D触发器DFF、与门AN1、AN2、或门OR、驱动器DR组成，其中，比较器AC的正极性端接参考电压，比较器AC的输出端接D触发器DFF的输入端，D触发器DFF的时钟信号端接低功率脉冲，D触发器DFF的输出端接与门AN1的一个输入端，D触发器DFF的反相输出端接与门AN2的一个输入端，与门AN1的另一个输入端接高功率脉冲，与门AN2的另一个输入端接低功率脉冲，与门AN1、AN2的输出端分别对应接或门OR的两个输入端，或门OR的输出端接驱动器DR输入端；改进型Buck变换器包括：电源E、MOS管Q、二极管D、耦合电感T、无极性电容C1、输出滤波电容C和负载R；其特征在于，所述的改进型Buck变换器是由Buck拓扑演变而来，将Buck变换器中的储能电感用一对耦合电感T代替；MOS管Q漏极接输入电源E正极；耦合电感T原边侧同名端、二极管D阴极和MOS管Q源极相互连接；原边侧异名端、副边侧同名端和无极性电容C1的一端相互连接；副边侧异名端、无极性电容C1的另一端、输出滤波电容C正极和负载R一端相互连接；电源E负极、二极管D阳极、输出滤波电容C负极和负载R另一端相互连接；MOS管Q栅极接PT控制电路中驱动器DR输出端；变换器输出电压的正端接PT控制电路中比较器AC的负极性端。所述的耦合电感原边侧L1和副边侧L2电感值相同且耦合系数α取值范围为0.8到0.9。所述的无极性电容C1为陶瓷电容或薄膜电容。Figure 1 is a block diagram of a PT control improved Buck converter circuit, which is composed of an improved Buck converter and a PT control circuit. The PT control circuit is composed of comparator AC, D flip-flop DFF, AND gates AN1, AN2, OR gate OR, and driver DR. The positive terminal of comparator AC is connected to the reference voltage, and the output terminal of comparator AC is connected to D trigger. The input terminal of the DFF, the clock signal terminal of the D flip-flop DFF is connected to the low-power pulse, the output terminal of the D flip-flop DFF is connected to an input terminal of the AND gate AN1, and the inverting output terminal of the D flip-flop DFF is connected to one of the AND gate AN2 The input terminal, the other input terminal of the AND gate AN1 is connected to the high-power pulse, the other input terminal of the AND gate AN2 is connected to the low-power pulse, and the output terminals of the AND gate AN1 and AN2 are respectively connected to the two input terminals of the OR gate OR, or The output terminal of the gate OR is connected to the input terminal of the driver DR; the improved Buck converter includes: a power supply E, a MOS transistor Q, a diode D, a coupling inductor T, a non-polar capacitor C1, an output filter capacitor C and a load R; The improved Buck converter described above is evolved from the Buck topology. The energy storage inductance in the Buck converter is replaced by a pair of coupled inductors T; the drain of the MOS transistor Q is connected to the positive pole of the input power supply E; the primary side of the coupled inductor T has the same name Terminal, diode D cathode and MOS tube Q source are connected to each other; primary side side with the same name, secondary side with the same name and one end of non-polar capacitor C1 are connected to each other; secondary side with different name, the other end of non-polar capacitor C1 1. The positive pole of the output filter capacitor C is connected to one end of the load R; the negative pole of the power supply E, the anode of the diode D, the negative pole of the output filter capacitor C, and the other end of the load R are connected to each other; the gate of the MOS tube Q is connected to the output terminal of the driver DR in the PT control circuit; The positive terminal of the output voltage of the PT is connected to the negative terminal of the comparator AC in the PT control circuit. The primary side L1 of the coupled inductor and the secondary side L2 have the same inductance value, and the coupling coefficient α ranges from 0.8 to 0.9. The non-polar capacitor C1 is a ceramic capacitor or a film capacitor.
本发明实施例采用表1中的电路参数进行仿真，图2、4分别为PT控制Buck变换器在负载电阻为2.0Ω和5.0Ω时输出电压vo、负载电流Io及控制脉冲vGS时域仿真波形；图3、5分别为PT控制改进型Buck变换器在负载电阻为2.0Ω和5.0Ω时输出电压vo、负载电流Io及控制脉冲vGS时域仿真波形。从图3、5可以看出一种基于脉冲序列控制改进型Buck变换器消除了输出电压低频波动。The embodiment of the present invention uses the circuit parameters in Table 1 for simulation. Figures 2 and 4 are time-domain simulation waveforms of the output voltage vo, load current Io and control pulse vGS of the PT-controlled Buck converter when the load resistance is 2.0Ω and 5.0Ω, respectively. ; Figures 3 and 5 are the time-domain simulation waveforms of the output voltage vo, load current Io and control pulse vGS of the PT-controlled improved Buck converter when the load resistance is 2.0Ω and 5.0Ω. It can be seen from Figures 3 and 5 that an improved Buck converter based on pulse sequence control eliminates low-frequency fluctuations in the output voltage.
表1变换器仿真参数Table 1 Converter simulation parameters
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