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CN105553431B - A kind of delay amplifier module control circuit and control method - Google Patents

A kind of delay amplifier module control circuit and control method Download PDF

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Publication number
CN105553431B
CN105553431B CN201610082895.7A CN201610082895A CN105553431B CN 105553431 B CN105553431 B CN 105553431B CN 201610082895 A CN201610082895 A CN 201610082895A CN 105553431 B CN105553431 B CN 105553431B
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sequential
control circuit
transmitting
switch
delay
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CN105553431A (en
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戈海清
刘永锋
谢成发
何建平
季飞
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CETC 38 Research Institute
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CETC 38 Research Institute
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
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Abstract

The invention discloses a kind of delay amplifier module control circuit, including sequential control circuit, switch drive control circuit, power supply modulator circuits.Sequential control circuit receives data and sequential from upper level wave control extension set, it is parsed, judge after the circuit of next stage is distributed to by the sequential relationship of agreement.Switch drive control circuit receives the data distributed from sequential control circuit, according to the syntagmatic of data, controls and is connected to corresponding amount of delay in delay amplifier module.Power supply modulator circuit receives the data distributed from sequential control circuit, according to the data relationship of agreement, judges whether to distribute power to the transmitting-receiving amplification module in delay amplifier module.The present invention also provides a kind of delay amplifier module control methods.The advantage of the invention is that:It is not strong to solve existing control circuit scalability, control sequential combination is single, and each state that is delayed controls dumb, the big problem of quiescent dissipation, realizes control sequential independent assortment, has many advantages, such as that each delay state single channel complementation control, quiescent dissipation are small.

Description

A kind of delay amplifier module control circuit and control method
Technical field
The present invention relates to a kind of control circuit more particularly to a kind of delay amplifier module control circuits and controlling party Method.
Background technology
Higher and higher with requiring the identification of target, phased array radar system is just towards broadband, large-angle scanning, heavy caliber The direction of array is developed.Based on the phased array antenna system of phase shift wave beam control, in bandwidth of operation, first, with signal frequency The increasing of rate off center frequency and the increase of scan angle, antenna beam are directed toward the increase that the deviation generated can be linear;Its Secondary, when the bore array of phased array antenna increases, aperture fill time can also become larger, damage when each unit signal being caused to synthesize It loses.The loss of limitation and the gain to instantaneous bandwidth of operation brought to overcome this phase shift wave beam to control, ideal mode It is that time delay is added in feeding network, i.e., increases delay amplifier module in an array.
Delay amplifier module is that the radiofrequency signal for inputting one postpones a period of time, after certain amplification Output.It, which is not only required in passband, has the radiofrequency characteristics such as flat width distributed mutually, and requires the wave to upper level It is adaptively strong to control extension set, flexibly it can be controlled, quiescent dissipation requires the features such as small.
Delay amplifier module is made of three parts, i.e. control circuit, delay line, transmitting-receiving amplification module.Control circuit is main It is to receive the time series data of higher level's wave control extension set to control conversion of the delay line between benchmark state and each delay state, and control System transmitting-receiving amplification module mutually converted between transmitting and reception, and be delayed amplifier module be in do not need work when block Power supply supplies the power of entire component.
For receiving the time series data of higher level's wave control extension set distribution, delay amplifier module control circuit first by data into Row latches, then according to the state of a transmitting-receiving control signal TR come the data of the data or reception that select output to emit.This The major defect of kind circuit is that the transmitting-receiving sequential for input is a kind of fixed sequential, selectivity and compatibility.Sequential In only emit and receive two states, convert this moment in transmitting-receiving, due to having the front and back relationship along delay in circuit, This moment is possible to will appear a kind of uncertain state, causes the confusion of circuit or burns.
The control converted between benchmark state and each delay state for delay amplifier module, method be to make delay Line be connected on one side another side disconnection, the phase inverter of addition on one side of circuit with facilitate control (Du Jiangkun, Song Qinghui, Zhao Botao, " the miniaturization delayer design based on LTCC technology " radio engineering 2013,43 (8):62-64).This method can cause two The switching of way switch is asynchronous, having time delay, and increases the complexity of circuit.And benchmark state is only existed in circuit and is prolonged Tense two states.Because only that two states, so must also have a kind of state when component does not work in work State causes unnecessary quiescent dissipation.
In short, just all existing in current delay amplifier module control circuit, control sequential is single, this allows for circuit and exists Existence and uniquenss in use, replaces a kind of control sequential in other equipment, just has to develop a control circuit again, Its commonality is not strong.It is not buffered between transmitting-receiving conversion, quiescent dissipation is big, these unfavorable factors are answered in airborne, satellite borne equipment Seem in especially prominent.
Invention content
Technical problem to be solved by the present invention lies in provide one kind can freely adapt to various input control sequential groups It closes, output complementation controls, accurately control component amount of delay, hair conversion setting buffers delay amplification group excessive, that quiescent dissipation is small Part control circuit.
The present invention is to solve above-mentioned technical problem by the following technical programs:A kind of delay amplifier module control circuit, For controlling the amplifier module that is delayed, the delay amplifier module control circuit includes sequential control circuit, switch drive control electricity Road, power supply modulator circuit;
The sequential control circuit receives the logical data and sequential of upper level wave control extension set distribution, including:Data SD, when Clock SC, gate CP, refresh SYN, transmitting T, receive R, according to transmitting T and receive R sequential relationship, parsed, judge after will Data export the circuit for giving next stage;The switch drive control circuit receives the data distributed from sequential control circuit, According to the syntagmatic of data, controls and be connected to corresponding amount of delay in delay amplifier module;The power supply modulator circuit receives Data from sequential control circuit distribution judge whether according to the data relationship of agreement to the transmitting-receiving in delay amplifier module Amplification module distributes power.
Specifically, two sequential selection signals PUL1, PUL2 are arranged in the sequential control circuit, when by changing two The low and high level that sequence selection signal PUL1, PUL2 is connected adapts to the transmitting T of arbitrary combination and receives the sequential logic of R;
The sequential control circuit, output double switch combine signal SW1, SW2, the receipts for controlling transmitting-receiving amplification module Hair conversion, the delay amplifier module include delay switch and transmitting-receiving amplification module, and the transmitting-receiving amplification module includes that transmitting-receiving turns It changing switch and is connected to the transmitting branch and receiving branch of transmit-receive switch, transmit-receive switch is connected to delay switch, Transmit-receive switch is tri-state switch, with double switch combination signal SW1, SW2 control, transmitting-receiving amplification module is made to be operated in respectively Emit state, receive state and load state;
The power supply modulator circuit is connected respectively to the transmitting branch and receiving branch, and the sequential control circuit is defeated Go out two groups of power modulation signal T-OUT, R-OUT to power supply modulator circuit, when emitting work, closes the power supply work(of receiving branch Rate supplies, and the power supply of transmitting branch is closed when receiving work.
Specifically, the switch drive control circuit, single channel inputs complementary output, control respectively delay line benchmark state and The complementary duty for the state that is delayed is being delayed amplifier module not wherein an enable signal EN is arranged in switch drive control circuit All delay line working conditions are closed when work.
Specifically, the sequential control circuit, right+5V, -5V voltages carry out under-voltage fault and judge, to data SD into Row even-odd check.
Specifically, its work schedule is:When emitting T sequential and reception R sequential is simultaneously high level, make delay amplification group Part is operated in emission state, and control circuit turns off the power supply of receiving branch;Emit T sequential and receives R sequential simultaneously For low level when, so that delay amplifier module is operated in reception state, control circuit needs to turn off the transmitting branch of delay amplifier module The power on road supplies;When other sequential combinations, delay amplifier module is made to be operated in load state, control circuit simultaneously turns off whole The power of a radio frequency link supplies.
Specifically, its work schedule is:Sequential selection signal PUL1 connection high level keeps transmitting T sequential high effectively;Sequential Selection signal PUL2 connection low levels keep reception R sequential low effectively.
Specifically, sequential control circuit receives the logical data and sequential of upper level wave control extension set distribution, including:Data SD, clock SC, gate CP, refresh SYN, transmitting T, receive R, and the transmitting T to receiving, reception R sequential combinations carry out logic Judge, right+5V, -5V supply voltages carry out under-voltage fault and judge, carry out even-odd check to data SD, are sent out when wrong False alarm;
When sequential control circuit self-test prompts inerrancy, sent according to the state selection output delays time to control code of transmitting T sequential To switch drive control circuit, when it is high level to emit T sequential, emission delay control code is exported, when transmitting T sequential is low electricity Usually, reception delay control code is exported;
Switch drive control circuit receives the delays time to control code of sequential control circuit distribution, each delays time to control code passes through After switch drive control circuit modulation ,+the 5V of a pair of of complementation of output, the drive signal of -5V give delay switch respectively, and delay is opened The conversion that benchmark state is carried out between the state that is delayed according to the logical relation of this pair of of complementary signal is closed, that is, closes benchmark state opening and prolongs Tense opens benchmark state closing delay state, and when delay amplifier module does not work, switch drive control circuit is according to sequential control The enable signal EN that circuit processed is sent out, turns off all delays time to control drive signals;
Sequential control circuit exports double switch and combines signal SW1, SW2, controls the transmitting-receiving conversion of transmit-receive switch, receives Hair change-over switch is a tri-state switch, and switch combination signal SW1, SW2 is obtained by emitting T sequential and receiving R sequential combinations, sent out When penetrating T sequential and receiving R sequential while being high level, switch combination signal SW1 exports high level, and SW2 exports low level, at this time When transmit-receive switch connection transmitting branch, transmitting T sequential and reception R sequential are low level simultaneously, switch combination signal SW1 is defeated Go out low level, SW2 exports high level, and transmit-receive switch is connected to receiving branch at this time, and transmitting T sequential and reception R sequential are it When he combines, switch combination signal SW1 exports low level, and SW2 exports low level, the load branch of transmit-receive switch connection at this time Road;
Sequential control circuit exports two groups of power modulation signals T-OUT, R-OUT and controls power supply modulator circuit, power modulation Circuit closes the power supply of receiving branch, in delay amplifier module work when the amplifier module that is delayed is operated in transmitting state The power for making to close transmitting branch when receiving state supplies.
As the embodiment of an optimization, one data of setting overflow SDout interfaces in the sequential control circuit, more In channel components or when the data bit comparison of needs while control is more, cascade extension is directly carried out.
The present invention also provides a kind of delay amplifier module control methods, for controlling delay amplifier module, which is characterized in that The delay amplifier module control method controls delay amplifier module using delay amplifier module control circuit, the delay Amplifier module control circuit includes sequential control circuit, switch drive control circuit, be delayed amplifier module, power supply modulator circuit, The sequential control circuit receives the logical data and sequential of upper level wave control extension set distribution, including:Data SD, clock SC, door Control CP, refresh SYN, transmitting T, receive R, according to transmitting T and receive R sequential relationship, parsed, judge after data are exported Give the circuit of next stage;The switch drive control circuit receives the data distributed from sequential control circuit, according to data Syntagmatic, control and be connected to delay amplifier module in corresponding amount of delay;The power supply modulator circuit, which receives, comes from sequential The data of control circuit distribution judge whether according to the data relationship of agreement to the transmitting-receiving amplification module in delay amplifier module Distribute power.
As a specific example, which includes the following steps:
Sequential control circuit receives the logical data and sequential of upper level wave control extension set distribution, including:Data SD, clock SC, CP is gated, SYN, transmitting T are refreshed, receives R, and the transmitting T to receiving, reception R sequential combinations progress logic judgment, right+ 5V, -5V supply voltage carry out under-voltage fault and are judged, carry out even-odd check to data SD, false alarm is sent out when wrong;
When sequential control circuit self-test prompts inerrancy, sent according to the state selection output delays time to control code of transmitting T sequential To switch drive control circuit, when it is high level to emit T sequential, emission delay control code is exported, when transmitting T sequential is low electricity Usually, reception delay control code is exported;
The delay amplifier module includes delay switch and transmitting-receiving amplification module, and the transmitting-receiving amplification module includes that transmitting-receiving turns It changing switch and is connected to the transmitting branch and receiving branch of transmit-receive switch, transmit-receive switch is connected to delay switch, Switch drive control circuit receives the delays time to control code of sequential control circuit distribution, each delays time to control code passes through switch drive After control circuit modulation ,+the 5V of a pair of of complementation of output, the drive signal of -5V give delay switch respectively, and delay switch is according to this The conversion that the logical relation of a pair of of complementary signal carries out benchmark state between the state that is delayed, that is, close benchmark state opening time-delaying state or It opens benchmark state and closes delay state, when delay amplifier module does not work, switch drive control circuit is sent according to sequential control circuit The enable signal EN gone out turns off all delays time to control drive signals;
Sequential control circuit exports double switch and combines signal SW1, SW2, controls the transmitting-receiving conversion of transmit-receive switch, receives Hair change-over switch is a tri-state switch, and switch combination signal SW1, SW2 is obtained by emitting T sequential and receiving R sequential combinations, sent out When penetrating T sequential and receiving R sequential while being high level, switch combination signal SW1 exports high level, and SW2 exports low level, at this time When transmit-receive switch connection transmitting branch, transmitting T sequential and reception R sequential are low level simultaneously, switch combination signal SW1 is defeated Go out low level, SW2 exports high level, and receiving branch is received in transmit-receive switch connection at this time, and transmitting T sequential is with R sequential is received When other combinations, switch combination signal SW1 exports low level, and SW2 exports low level, the load branch of transmit-receive switch connection at this time Road;
Sequential control circuit exports two groups of power modulation signals T-OUT, R-OUT and controls power supply modulator circuit, power modulation Circuit closes the power supply of receiving branch, in delay amplifier module work when the amplifier module that is delayed is operated in transmitting state The power for making to close transmitting branch when receiving state supplies.
The present invention has the following advantages compared with prior art:The commonality of abundant consideration control circuit, in control circuit Middle setting sequential selection signal, is adapted to a variety of different sequential logics.In distinct device, when sequential logic differs When, new circuit need not be developed again, it is only necessary to which the logical combination for changing sequential selection signal, it is total compared with other circuits It is strong with property, the development cost of novel circuit can be saved.
Due to being provided with enabled EN control ports in the switch drive control circuit of delay line so that delay amplifier module When not working, the power supply that can be cut off the power to delay line part greatly reduces component relative to other circuits Quiescent dissipation.Using two paths of signals combination control in transmitting-receiving conversion and control, increases the load state of intermediate buffering conversion, make The reliability higher of component.In power modulation control, complementary output is all used, it can according to different use requirements, flexibly Modulation transmitting-receiving branch power.
SDout interfaces are overflowed since this control circuit is provided with data, in multichannel component or needs while controlling Data bit it is more in the case of, can directly carry out cascade use, additional circuit need not be increased.
Entire delay amplifier module control circuit is simple in structure compared with other control circuits, and external interface connection is free, Internal control connection is flexible, and reliability is high, convenient for extension design.
Description of the drawings
The general frame figure for the delay amplifier module control circuit that Fig. 1 embodiment of the present invention 1 provides;
The extension design framework figure for the delay amplifier module control circuit that Fig. 2 embodiment of the present invention 2 provides.
Specific implementation mode
It elaborates below to the embodiment of the present invention, the present embodiment is carried out lower based on the technical solution of the present invention Implement, gives detailed embodiment and specific operating process, but protection scope of the present invention is not limited to following implementation Example.
Embodiment 1:
Referring to Fig. 1, a preferred embodiment is the control circuit of C-band delay amplifier module, and component needs realization 5 Bit digital is delayed.Work schedule is:When emitting T sequential and receiving R sequential while being high level, make component operation in emitting shape State, control circuit need to turn off the power supply of receiving branch;When emitting T sequential and receiving R sequential while being low level, Make component operation in reception state, control circuit needs to turn off the power supply of transmitting branch;When other sequential combinations, make In load state, control circuit needs to simultaneously turn off the power supply of entire radio frequency link component operation.
The delay amplifier module control circuit includes mainly sequential control circuit 1, switch drive control circuit 2, power supply Modulation circuit 3.The amplifier module that is delayed includes delay switch 6, transmit-receive switch 7 and transmitting branch 8 and receiving branch 9.
In the present embodiment, when transmitting T sequential and reception R sequential are high level simultaneously, make component operation in emission state;Hair When penetrating T sequential and receiving R sequential while being low level, make component operation in reception state.So sequential selection signal PUL1 connects High level is connect, keeps transmitting T sequential high effectively;Sequential selection signal PUL2 connection low levels keep reception R sequential low effectively.
Sequential control circuit 1 receives the logical data and sequential of upper level wave control extension set distribution, including:Data SD, clock SC, gate CP, refresh SYN, transmitting T, receive R.And the transmitting T to receiving, reception R sequential combinations carry out logic judgment;Right+ 5V, -5V supply voltage carry out under-voltage fault and are judged;Even-odd check is carried out to data SD, false alarm is sent out when wrong.
When 1 self-test of sequential control circuit prompts inerrancy, sent according to the state selection output delays time to control code of transmitting T sequential To switch drive control circuit 2.When it is high level to emit T sequential, emission delay control code is exported;When transmitting T sequential is low When level, reception delay control code is exported.
Switch drive control circuit 2 receives the delays time to control code that sequential control circuit 1 is distributed, each delays time to control code warp After crossing the modulation of switch drive control circuit 2 ,+the 5V of a pair of of complementation of output, the drive signal of -5V give delay switch 6 respectively, prolong Shi Kaiguan 6 carries out the conversion between benchmark state 4 and delay state 5 according to the logical relation of this pair of of complementary signal, that is, closes benchmark 4 opening time-delaying state 5 of state opens 4 closing delay state 5 of benchmark state.When delay amplifier module does not work, switch drive control electricity The enable signal EN that road 2 is sent out according to sequential control circuit 1 turns off all delays time to control drive signals.
Sequential control circuit 1 exports double switch and combines signal SW1, SW2, and the transmitting-receiving of control transmit-receive switch 7 is converted, Transmit-receive switch 7 is a tri-state switch.Switch combination signal SW1, SW2 is obtained by emitting T sequential and receiving R sequential combinations It arrives.When emitting T sequential in the present embodiment and receiving R sequential while being high level, switch combination signal SW1 exports high level, SW2 Low level is exported, the transmitting branch 8 in the transmitting-receiving amplification module of the connection of transmit-receive switch 7 at this time;When emitting T sequential and receiving R When sequence is low level simultaneously, switch combination signal SW1 exports low level, and SW2 exports high level, and transmit-receive switch 7 connects at this time Receiving branch 9 in logical transmitting-receiving amplification module;When transmitting T sequential and reception R sequential are other combinations, switch combination signal SW1 Low level is exported, SW2 exports low level, the load branch in the transmitting-receiving amplification module of the connection of transmit-receive switch 7 at this time.
Sequential control circuit 1 exports two groups of power modulation signals T-OUT, R-OUT and controls power supply modulator circuit 3.Power supply tune Circuit 3 processed closes the power supply of receiving branch 9 when the amplifier module that is delayed is operated in transmitting state;In delay amplification group Part is operated in the power supply that transmitting branch 8 is closed when receiving state.Each group of power modulation signal has a pair of of complementation Two paths of signals exports, and can be selected according to actual need of work.
Embodiment 2:
Referring to Fig. 2, another preferred embodiment of the invention is a binary channels delay amplifier module control circuit.This control Circuit processed is made of two sequential control circuits in internal directly cascade, and the data spilling port of first sequential control circuit is straight Attach to the data input port of second sequential control circuit.This circuit shares a sequential and data port, connects in multichannel In the case of connecing, the quantity of external interface and transmission cable can be greatly saved, the volume of device is reduced.
The above content is combine specific preferred embodiment to elaborate the present invention, and it cannot be said that the present invention has Body implementation is only limitted to these explanations.For the technical staff of technical field that the present invention belongs to, present inventive concept is not being departed from Under the premise of, several simple deductions and replacement can also be made, such as increase the control digit of delay line, all shall be regarded as belonging to this Invent invention protection domain determined by the appended claims.

Claims (9)

1. a kind of delay amplifier module control circuit, for controlling delay amplifier module, which is characterized in that the delay amplification group Part control circuit includes sequential control circuit, switch drive control circuit, power supply modulator circuit;
The sequential control circuit receives the logical data and sequential of upper level wave control extension set distribution, including:Data SD, clock SC, gate CP, refresh SYN, transmitting T, receive R, according to transmitting T and receive R sequential relationship, parsed, judge after will count The circuit of next stage is given according to output;The switch drive control circuit receives the data distributed from sequential control circuit, presses According to the syntagmatic of data, controls and be connected to corresponding amount of delay in delay amplifier module;The power supply modulator circuit, which receives, to be come The data distributed from sequential control circuit judge whether to put to the transmitting-receiving in delay amplifier module according to the data relationship of agreement Big module assignment power;
Two sequential selection signals PUL1, PUL2 are set in the sequential control circuit, by changing two sequential selection signals The low and high level that PUL1, PUL2 are connected adapts to the transmitting T of arbitrary combination and receives the sequential logic of R;
The sequential control circuit, output double switch combine signal SW1, SW2, and the transmitting-receiving for controlling transmitting-receiving amplification module turns It changes, the delay amplifier module includes delay switch and transmitting-receiving amplification module, and the transmitting-receiving amplification module includes that transmitting-receiving conversion is opened The transmitting branch and receiving branch of transmit-receive switch are closed and are connected to, transmit-receive switch is connected to delay switch, transmitting-receiving Change-over switch is tri-state switch, with double switch combination signal SW1, SW2 control, transmitting-receiving amplification module is made to be operated in transmitting respectively State receives state and load state;
The power supply modulator circuit is connected respectively to the transmitting branch and receiving branch, the sequential control circuit, output two Power modulation signal T-OUT, R-OUT is to power supply modulator circuit for group, and when emitting work, the power for closing receiving branch supplies It gives, the power supply of transmitting branch is closed when receiving work.
2. a kind of delay amplifier module control circuit according to claim 1, which is characterized in that the switch drive control Circuit, single channel input complementary output, the complementary duty of the benchmark state and delay state of delay line are controlled respectively, wherein in switch drive One enable signal EN is set in control circuit, all delay line working conditions are closed when the amplifier module that is delayed does not work.
3. a kind of delay amplifier module control circuit according to claim 1, which is characterized in that the timing control electricity Road, right+5V, -5V voltages carry out under-voltage fault judgement, and even-odd check is carried out to data SD.
4. a kind of delay amplifier module control circuit according to claim 1, which is characterized in that its work schedule is:When When emitting T sequential and receiving R sequential while being high level, delay amplifier module is made to be operated in emission state, control circuit shutdown The power of receiving branch supplies;When emitting T sequential and receiving R sequential while being low level, delay amplifier module is made to work In reception state, control circuit needs to turn off the power supply of the transmitting branch of delay amplifier module;Other sequential combinations When, so that delay amplifier module is operated in load state, control circuit simultaneously turns off the power supply of entire radio frequency link.
5. a kind of delay amplifier module control circuit according to claim 4, which is characterized in that its work schedule is:When Sequence selection signal PUL1 connection high level keeps transmitting T sequential high effectively;Sequential selection signal PUL2 connection low levels, make reception R Sequential is low effectively.
6. a kind of delay amplifier module control circuit according to claim 4, which is characterized in that sequential control circuit receives The logical data and sequential of upper level wave control extension set distribution, including:Data SD, clock SC, gate CP, refresh SYN, transmitting T, connect R is received, and the transmitting T to receiving, reception R sequential combinations carry out logic judgment, right+5V, -5V supply voltages carry out under-voltage fault Judge, even-odd check is carried out to data SD, false alarm is sent out when wrong;
When sequential control circuit self-test prompts inerrancy, given out according to the state selection output delays time to control code of transmitting T sequential Drive control circuit is closed, when it is high level to emit T sequential, exports emission delay control code, when transmitting T sequential is low level When, export reception delay control code;
Switch drive control circuit receives the delays time to control code of sequential control circuit distribution, each delays time to control code is by switch After drive control circuit modulation ,+the 5V of a pair of of complementation of output, the drive signal of -5V give delay switch, delay switch root respectively According to the conversion that the logical relation of this pair of of complementary signal carries out benchmark state between the state that is delayed, that is, close benchmark state opening time-delaying state Or open benchmark state and close delay state, when delay amplifier module does not work, switch drive control circuit is according to timing control electricity The enable signal EN that road is sent out, turns off all delays time to control drive signals;
Sequential control circuit exports double switch and combines signal SW1, SW2, controls the transmitting-receiving conversion of transmit-receive switch, and transmitting-receiving turns It is a tri-state switch to change switch, and switch combination signal SW1, SW2 is obtained by emitting T sequential and receiving R sequential combinations, emits T When sequential and reception R sequential are high level simultaneously, switch combination signal SW1 exports high level, and SW2 exports low level, receives at this time Change-over switch connection transmitting branch is sent out, when transmitting T sequential and reception R sequential are low level simultaneously, the SW1 outputs of switch combination signal Low level, SW2 export high level, and transmit-receive switch is connected to receiving branch at this time, and transmitting T sequential and reception R sequential are other When combination, switch combination signal SW1 exports low level, and SW2 exports low level, and transmit-receive switch is connected to load branch at this time;
Sequential control circuit exports two groups of power modulation signals T-OUT, R-OUT and controls power supply modulator circuit, power supply modulator circuit When the amplifier module that is delayed is operated in transmitting state, the power supply of receiving branch is closed, is operated in delay amplifier module The power supply of transmitting branch is closed when receiving state.
7. a kind of delay amplifier module control circuit according to claim 1, which is characterized in that the sequential control circuit Middle one data of setting overflow SDout interfaces, in multichannel component or when the data bit comparison of needs while control is more, directly Tap into row cascade extension.
8. a kind of delay amplifier module control method, for controlling delay amplifier module, which is characterized in that the delay amplifier module Control method controls delay amplifier module using delay amplifier module control circuit, the delay amplifier module control electricity Road includes sequential control circuit, switch drive control circuit, power supply modulator circuit, and the sequential control circuit receives upper level wave The logical data and sequential of extension set distribution are controlled, including:Data SD, clock SC, gate CP, refresh SYN, transmitting T, receive R, according to Emit T and receive the sequential relationship of R, parsed, judge after give data output to the circuit of next stage;The switch drive Control circuit receives the data distributed from sequential control circuit, according to the syntagmatic of data, controls and is connected to delay amplification Corresponding amount of delay in component;The power supply modulator circuit receives the data distributed from sequential control circuit, according to agreement Data relationship judges whether to distribute power to the transmitting-receiving amplification module in delay amplifier module;
Two sequential selection signals PUL1, PUL2 are set in the sequential control circuit, by changing two sequential selection signals The low and high level that PUL1, PUL2 are connected adapts to the transmitting T of arbitrary combination and receives the sequential logic of R;
The sequential control circuit, output double switch combine signal SW1, SW2, and the transmitting-receiving for controlling transmitting-receiving amplification module turns It changes, the delay amplifier module includes delay switch and transmitting-receiving amplification module, and the transmitting-receiving amplification module includes that transmitting-receiving conversion is opened The transmitting branch and receiving branch of transmit-receive switch are closed and are connected to, transmit-receive switch is connected to delay switch, transmitting-receiving Change-over switch is tri-state switch, with double switch combination signal SW1, SW2 control, transmitting-receiving amplification module is made to be operated in transmitting respectively State receives state and load state;
The power supply modulator circuit is connected respectively to the transmitting branch and receiving branch, the sequential control circuit, output two Power modulation signal T-OUT, R-OUT is to power supply modulator circuit for group, and when emitting work, the power for closing receiving branch supplies It gives, the power supply of transmitting branch is closed when receiving work.
9. a kind of delay amplifier module control method according to claim 8, which is characterized in that specifically include following steps Suddenly:
Sequential control circuit receives the logical data and sequential of upper level wave control extension set distribution, including:Data SD, clock SC, door Control CP, refresh SYN, transmitting T, receive R, and the transmitting T to receiving, reception R sequential combinations progress logic judgment, right+5V ,- 5V supply voltages carry out under-voltage fault judgement, carry out even-odd check to data SD, false alarm is sent out when wrong;
When sequential control circuit self-test prompts inerrancy, given out according to the state selection output delays time to control code of transmitting T sequential Drive control circuit is closed, when it is high level to emit T sequential, exports emission delay control code, when transmitting T sequential is low level When, export reception delay control code;
Switch drive control circuit receives the delays time to control code of sequential control circuit distribution, each delays time to control code is by switch After drive control circuit modulation ,+the 5V of a pair of of complementation of output, the drive signal of -5V give delay switch, delay switch root respectively According to the conversion that the logical relation of this pair of of complementary signal carries out benchmark state between the state that is delayed, that is, close benchmark state opening time-delaying state Or open benchmark state and close delay state, when delay amplifier module does not work, switch drive control circuit is according to timing control electricity The enable signal EN that road is sent out, turns off all delays time to control drive signals;
Sequential control circuit exports double switch and combines signal SW1, SW2, controls the transmitting-receiving conversion of transmit-receive switch, and transmitting-receiving turns It is a tri-state switch to change switch, and switch combination signal SW1, SW2 is obtained by emitting T sequential and receiving R sequential combinations, emits T When sequential and reception R sequential are high level simultaneously, switch combination signal SW1 exports high level, and SW2 exports low level, receives at this time Change-over switch connection transmitting branch is sent out, when transmitting T sequential and reception R sequential are low level simultaneously, the SW1 outputs of switch combination signal Low level, SW2 export high level, and receiving branch is received in transmit-receive switch connection at this time, and transmitting T sequential is it with R sequential is received When he combines, switch combination signal SW1 exports low level, and SW2 exports low level, the load branch of transmit-receive switch connection at this time Road.
CN201610082895.7A 2016-02-03 2016-02-03 A kind of delay amplifier module control circuit and control method Active CN105553431B (en)

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CN109901125B (en) * 2019-03-11 2021-07-23 中国电子科技集团公司第三十八研究所 Airborne two-dimensional active phased array radar antenna correction device and method

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