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CN105379170B - 高带宽通信接口方法和系统 - Google Patents

高带宽通信接口方法和系统 Download PDF

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CN105379170B
CN105379170B CN201480033274.9A CN201480033274A CN105379170B CN 105379170 B CN105379170 B CN 105379170B CN 201480033274 A CN201480033274 A CN 201480033274A CN 105379170 B CN105379170 B CN 105379170B
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CN105379170A (zh
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布赖恩·霍尔登
约翰·福克斯
阿里·侯马缇
彼得·亨特
约翰·凯伊
阿明·肖克罗拉
理查德·辛普森
阿南特·辛格
安德鲁·斯图尔特
朱塞佩·苏尔艾斯
罗杰·乌尔里克
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Kang Du Laboratories Inc
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Abstract

公开了在物理信道中发送数据的系统和方法，以提供在高速低功率利用率下运行的发送器件和接收器件之间可实现高带宽低延迟的接口。使用一组四根导线，通过向量信令码进行通信，其中每一导线上设置有低摆幅信号，并且具有四信号值中的一个。本发明公开了一种具有分组信令通信的优选特征的线集拓扑结构和设计。

Description

高带宽通信接口方法和系统
相关申请的交叉引用
本申请要求申请日为2013年4月16日，申请号为61/812,667的美国临时申请的优先权，并通过引用将其内容整体并入本文。
以下参考文献通过引用整体并入本文，以供所有目的之用：
公开号为2011/0268225，申请号为12/784,414，申请日为2010年5月20日，发明人为Harm Cronie和Amin Shokrollahi，名称为《正交差分向量信令》的美国专利申请(下称“Cronie I”)；
公开号为2011/0302478，申请号为12/982,777，申请日为2010年12月30日，发明人为Harm Cronie和Amin Shokrollahi，名称为《具有抗共模噪声和抗同步开关输出噪声能力的高引脚利用率、高功率利用率芯片间通信》的美国专利申请(下称“Cronie II”)；
申请号为13/030,027，申请日为2011年2月17日，发明人为Harm Cronie，AminShokrollahi以及Armin Tajalli，名称为《利用稀疏信令码进行抗噪声干扰、高引脚利用率、低功耗通讯的方法和系统》的美国专利申请(下称“Cronie III”)；
临时申请号为61/753,870，申请日为2013年1月17日以及非临时申请号为14/158,452，申请日为2014年1月17日，发明人为John Fox，Brian Holden，Peter Hunt，John DKeay，Amin Shokrollahi，Richard Simpson，Anant Singh，Andrew Kevin John Stewart和Giuseppe Surace，名称为《低同步开关噪声芯片间通信方法和系统》的美国专利申请(下称“Fox I”)；
申请号为61/763,403，申请日为2013年2月11日，发明人为John Fox、BrianHolden、Ali Hormati、Peter Hunt、John D Keay、Amin Shokrollahi、Anant Singh、AndrewKevin John Stewart、Giuseppe Surace以及Roger Ulrich，名称为《高带宽芯片间通信接口方法和系统》的美国临时专利申请(下称“Fox II”)；
申请号为61/773,709，申请日为2013年3月6日，发明人为John Fox、BrianHolden、Peter Hunt、John D Keay、Amin Shokrollahi、Andrew Kevin John Stewart、Giuseppe Surace以及Roger Ulrich，名称为《高带宽芯片间通信接口方法和系统》的美国临时专利申请(下称“Fox III”)。
背景技术
在通信系统中，信息可从某一物理位置传输至另一物理位置。并且对于此类信息传输，人们一般要求其可靠、快速、且消耗的资源最少。串行通信链路为最常见的信息传输手段之一，其可为基于以地面或其他常见参照物为相对参照的单线电路，也可为基于以地面或其他常见参照物为相对参照的多个此类电路，还可为基于相互间互为相对参照的多个电路。
在一般情况下，串行通信链路跨越多个时间周期。在每个所述时间周期内，链路内的一个或多个信号代表一定量的以比特为度量单位的信息，从而达到该信息的传送目的。在高电平上，串行通信链路将发射器连接至接收器。所述发射器在每一时间周期内发送一个或多个信号，而所述接收器对该一个或多个信号进行接收(或接收相近信号，这是因为在噪声及其他作用的影响下，所接收的信号可能并不完全与发送信号相同)。所述发射器所传送的信息被该发射器“消耗”后生成代表信号。所述接收器用于从接收信号中解读所述传送信息。在总体不发生错误的情况下，所述接收器可精确输出所述被消耗的比特。
串行通信链路的最佳设计往往取决于其用途。在许多情况下，需要在各种性能参数之间做出权衡，例如带宽(每单位时间和/或周期所能传送的比特数)、引脚利用率(一次可传送的比特或比特等同物的数量与实现所述传送所要求的线路的数目的比值)、功耗(所述发射器、信号逻辑、接收器等每传送一个比特所消耗的功率单位)、抗同步开关输出噪声能力及抗串扰能力、以及期望误差率。
上述后者的一例中使用差分信令(DS)。差分信令的工作原理为，在一条线路上发送一个信号，而且在该线路的配对线路上发送上述信号的相反信号。其中，信号信息由此两条线路之间的差值，而非其相对于地面或其它固定参照物的绝对值表示。相较于单端信令(SES)，差分信令可抵消串扰和其它共模噪声，从而增强原始信号在接收端的恢复能力。现有的多种信令方法可在保持差分信令的有益性能的同时，实现优于差分信令的引脚利用率。许多此类方法的工作原理在于，同时使用多于两条线路，在每条线路上均使用二进制信号，且将信息映射为多组比特。
向量信令是一种信息发送方法。通过向量信令，多条线路中的多个信号在保持每个信号的独立性的同时可视为一个整体。其中，上述整体信号中的每一个均称为分量，所述多条线路的数量称为向量的“维数”。然而，在一些实施方式中，与差分信令对的情况一样，某一线路中的信号完全取决于另一线路中的信号。因此，在某些情况下，所述向量维数指的是多条线路中信号的自由度的数量，而非所述多条线路的数量。
在二进制向量信令中，每一分量具有坐标值(或简称“坐标”)，该坐标值为两个可能取值当中的一个。举例而言，可将8条单端信号线视为一个整体，其中，每个分量/线路的取值为信号周期两值中的一值。那么该二进制向量信令的一个“码字”即对应所述整体分量/线路组的其中一个可能状态。对于一个给定的向量信令编码方案，有效可取码字的集合称为“向量信令码”或“向量信令码集”。“二进制向量信令码”即为将信息比特映射至二进制向量的一种映射方法和/或一组规则。
在非二进制向量信令中，每个分量的坐标值选取自由多于两个的可能取值组成的组。“非二进制向量信令码”则指将信息比特映射至非二进制向量的一种映射方法和/或一组规则。
Cronie I，Cronie II，Cronie III，Fox I，Fox II和Fox III中均描述了向量信令方法的实施例。
发明内容
一种可使用串行通信链路通信的发射及接收器，其中，所述串行通信链路所使用的信令为向量信令，该向量信令为均衡向量信令，而且可由多个比较器检出，所述比较器具有与向量信号分量和值的不同组合相耦合的输入。
所述分量的数目可等于四，或者大于或小于四。分量的坐标值数目可等于四，或者大于或小于四。例如，链路可使用具有四个可能坐标值的四个分量，所述四个可能坐标值为一个高值、一个低值以及该高值和低值的相反值，而且具有所述高值的信号可抵消三个具有所述低值的相反值的信号，具有所述高值的相反值的信号可抵消三个具有所述低值的信号。在这种方式下，所述链路可使用所述四个分量通过下述方式在一个周期内传送三个比特：将所述八个可能的三比特组合映射至由一个所述高值和三个所述低值的相反值构成的四种组合以及一个所述高值的相反值和三个所述低值构成的四种组合表示的八个向量码字。在一种更加具体的实施方式中，所述高值和低值为相对于参考值的电压值，所述高值与其相反值大小相等但符号相反，所述低值与其相反值大小相等但符号相反，所述高值的大小为所述低值大小的三倍。
在接收器中，由一定数目的比较器对信号的和值进行比较。在一种具体实施方式中，三个比较器中的每一个均用于对接收信号中的两个信号的和值进行比较，而且三个比较器的输出共同识别出由所述信号编码的三个比特。优选地，可在此接收比较级，或更符合常规地，在接收线路信号上实施由判定反馈均衡技术所实现的常用信号均衡。
在至少一种实施方式中，本发明提供在物理信道中发送数据的方法和装置，该方法和装置可提供以低功耗实现高总带宽的高速低延迟接口，从而实现多芯片系统中各集成电路芯片的互连。在一些实施例中，使用不同的电压、电流等电平实现信令，而且还可使用两个以上的电平，例如，每线信号具有三值当中一值的三进制向量信令码，或每线信号具有四值当中一值的四进制信令系统。
此《发明内容》部分为以下《具体实施方式》中所描述概念的选择性简述，此《发明内容》部分的目的并不在于指出权利要求所述技术方案的关键或必要技术特征，也不在于辅助确定权利要求的范围。通过查阅以下《具体实施方式》的内容以及附图，本领域技术人员可清楚了解本发明的其他目的和/或优点。
附图说明
以下，通过参考附图，描述本发明的各个实施例。其中，本文及附图中通篇以相同的数字标注类似元件或构件。
图1为根据本发明至少一种实施方式的包括发送器件、互连器件以及接收器件的示例性系统框图。
图2所示为适合用于本发明至少一种实施方式中所述信号编码方法的几种物理信道拓扑结构。
图3所示为差分通信及H4编码通信中的不同传输模。
图4为根据本发明至少一种实施方式的图1所示系统的H4编码及发射器框图。
图5为根据本发明至少一种实施方式的图1所示系统的使用单个处理级及多个处理级的接收器及H4解码器框图。
图6为根据本发明至少一种实施方式的每个传输数据值的示例性传输线路值以及相应的示例性接收比较器输出和接收数据字的表。
图7为根据本发明至少一种实施方式的采用两种DFE补偿方法的接收器框图。
图8所示为根据本发明至少一种实施方式的被传输H4码的各个线路信号以及所有线路的合并信令，图中所示为在每个传输周期内使用四个信号电平中的两个信号电平的情形。
图9为权利要求1至5所述方法的框图。
具体实施方式
虽然将多个完整系统集成至单一集成电路的技术能力在不断提高，但是多芯片系统及子系统仍具有显著的技术优势。只要能解决功率、复杂性及其他电路实施中的问题，即可实现支持高带宽芯片间连接性的基础性物理接口。
出于描述而非限制目的，本申请中描述的本发明至少某些方面的例示性实施方式具有如下所述系统环境：(1)具有连接分别作为发射器和接收器的两个集成电路芯片的至少一个点对点通信接口；(2)所述通信接口由一组四条在例如18.75GHz(37.3G/秒)下具有中度损耗连接性且无过度波纹损耗特性及反射的高速传输互连信号线支持；(3)所述互连信号线组具有低的内部集成偏斜度；以及(4)所述通信接口在所述四线电路上工作时的信令速率例如为37.3G/秒，总吞吐量约为112Gb/秒。
如下文所述，本发明的至少一种实施方式使用低信号摆幅电流模逻辑引脚驱动器以及同时端接于发射器和接收器的互联线路。
物理信道布线
图2所示为根据本发明至少一种实施方式的几种示例性物理信道拓扑结构。
示例性结构201所示为截面形式的四芯带状线，该带状线具有四条内嵌于电介质203中的信号导线202，该电介质203设置于接地平面204之间。在一些实施方式中，还包括使接地平面204相互连接的过孔205。在一些实施方案中，通过对信号导线202的水平位置做周期性偏移来改进信号导线的位置，以使所述四个信号路径获得更加均一的特性。例如，如210中所示，可在左移上两条信号导线202的同时，使下两条信号导线202右移。此外，还在每一后续偏移周期内，使上述偏移方向反转。其中，所述偏移周期和偏移程度选择为可使所述四个信号路径获得更加均一特性的值。
示例性结构211所示为截面形式的四芯同轴电缆，该电缆具有四条内嵌于电介质213中的信号导线212，该电介质213包裹于或大致包裹于导电屏蔽层214中。实际使用中，正如214作为说明目的外形所示，所述电介质及导电屏蔽层的外形应根据制造简单性(例如，传统同轴电缆的圆形外形)和传输特性优化(例如，201所示正方形或长方形)两方面的权衡结果确定。和上例相同，可对导线212的线隙和/或位置做出周期性变化，以使所述四个信号路径获得更加均一的特性。
示例性结构221所示为扭绞四芯电缆，其中，各绝缘信号导线222绕共同轴线绞为一组。该电缆内可设置用于控制总直径及线隙的中心绝缘线223，也可不设置此中央绝缘线。一些实施方式还可进一步选择性地包括中心导电中性线、绝缘包层以及导电屏蔽包层中的至少一个，以进一步实现对阻抗特性和/或噪声隔离性的控制。
对于熟悉本领域的技术人员容易理解的是，图2中每一例均采用信号导线的三维结构，使得所述四条信号导线的每一条均获得基本相同的阻抗特性，并使得该四条信号导线之间获得基本相同的线间耦合特性。这些特性有利于信号传输模为每条线路中的信号提供实际相同的传播速度以及实际相同的衰减和频率响应特性。类似传输特性还可通过编织扭绞四芯电缆、四芯微同轴电缆等其他已知电缆设计实现。
在某些条件下，所述发明还可与包括四芯微带线、双对微带线、双绞对线电缆在内的其他已知电缆设计联用。在使用此类电缆时，用于下文所述H4编码信号的各信号传输模并不完全相同，而且通常而言，三个主要传输模的其中一个具有较低的接收信号电平以及较慢的传播速度。本发明的一些实施方式通过对所述性能较差的模中的接收信号进行额外放大以及对其接收信号值进行延迟采样的方式对上述效应进行补偿。本发明其他实施方式提供传统的通信能力，其中，使用总通信吞吐量较低的传统双差分方法实现信号的传输和接收。
本申请中描述的示例性信号电平、信号频率以及物理尺寸用于说明而非限制目的。本发明的其他实施方式可采用不同的信令电平、连接拓扑结构、端接技术和/或其他物理接口，包括光学式、电感式、电容式或电气式互连线。类似地，基于从发射器至接收器的单向通信的示例用于描述的清晰性，组合式发射器-接收器的实施方式以及双向通信的实施方式同样明确属于本发明范围内。
采用阿达玛变换的编码方法
阿达马变换(Hadamard Transform)，也称沃尔什-阿达玛转换(Walsh-HadamardTransform)，是由元素+1和-1组成的所有行和所有列均设置为相互正交的方阵。阿达马矩阵以其所有的2N大小的形式以及其他选取大小的形式著称。本申请的描述尤其着重于2×2以及4×4阿达马矩阵。
2阶阿达马矩阵为：
(等式1)
对一个比特A进行传统方式差分编码时，可将A与阿达马矩阵H2相乘，以获得生成的输出信号W和X的值。对于熟悉本领域的技术人员容易理解的是，与所述矩阵上端向量相乘的结果相当于在W和X中引入了一个正或负的共模信号，然而在实际中，差分电路通常并不使用此传输模。与所述矩阵下端向量相乘的结果可产生常见的差分信号：当A为正时为{+1,-1}，当A为负时为{-1,+1}。图3A对此进行了图示，其中，表示信号W和X的两条信号线路301和302携带编码后的传输模303，该模表示向量{+1,-1}与编码后的比特A之间的乘积。
4阶阿达马矩阵为：
(等式2)
通过将阿达马矩阵H4与A、B、C三个比特相乘可将此三个比特编码为四个输出信号。与上例相同，最上端的向量对应本申请中并不使用的共模信令，而后三个向量用于分别将比特A、B、C编码为W、X、Y、Z四个输出。图3B对此进行了示意性图示，其中，在每一示意分图中，四条信号线路311、312、313、314均分别表示信号W、X、Y、Z，三个示意分图表示三种不同的传输模：传输模320表示比特A与向量{+1,-1,+1,-1}的乘积，传输模330表示比特B与向量{+1,+1,-1,-1}的乘积，传输模340表示比特C与向量{+1,-1,-1,+1}的乘积。
与图3A所示示例相同，图3B中的椭圆表示携带相反值的信号对。然而，与上例中只有一个传输模303可供使用的情况不同的是，在图3B所示示例中，三种所示模320、330、340中的每一种均可用于同时发送比特A、B、C。因此，在此方式中，W、X、Y、Z的所测信号电平对应于所述三种模的和值。
熟悉本领域的技术人员可注意到的是，按上述方式编码的A、B、C的所有可能取值所产生的W、X、Y、Z的模的和值为平衡值，即相加后等于常数值0。如果将所述W、X、Y、Z的模的和值调整为使得其最大绝对值为1(即为了描述的方便性，所述信号处于-1至1之间)，则需注意的是，所有可得到的值均为值{+1,-1/3,-1/3,-1/3}或值{-1,1/3,1/3,1/3}的各种组合，称为向量信令码H4的码字。
H4码
本申请中使用的“H4”码也称NRZ集码，是指发射器消耗三个比特并在每个符号周期内在四条线路上输出信号的向量信令码以及用于该码的相应逻辑。在一些实施方式中，可使用包括多于一个组的并行结构，每个组均包括在每个符号周期内在四条线路上传输的三个比特，以及为该组配置的H4编码器和H4解码器。H4码使用四条信号线和四个可能坐标值，其在本申请中表示为+1，+1/3，-1/3，-1。H4码字为平衡码字，其中，每个码字为(+1,-1/3,-1/3,-1/3)的四种组合的一种，或为(-1,+1/3,+1/3,+1/3)的四种组合的一种，所有这些组合加和为零值的当量。图8A为H4编码信号的波形图。应当指出的是，虽然包含所有码字的总集采用四个不同信号电平，但是如图8B所示，通过对所有的四种信号波形进行叠加，也可在任何一个码字中仅使用两个信号电平。
在一个具体实施方式中，可使用200mV的偏移量发送表示+1的信号，使用-200mV的偏移量发送表示-1的信号，使用66mV的偏移量发送表示+1/3的信号，使用-66mV的偏移量发送表示-1/3的信号，其中，所述各电压电平为相对于固定参考值的电平。需要注意的是，无论代表何种与电压偏移量对应的码字，在任何单个时间周期内所发送(或接收，不考虑偏斜、串扰和衰减所导致的非对称效应)的所有信号的平均值为“0”。H4中使用八个不同码字，足以在每个发送符号周内编码三个二进制比特。
上述H4编码方案还存在其他变体。以上给出的信号电平作为示例而非限制，其表示相对于某个标称参考电平的信号增量值。
编码及发射器
图4为图1所示本发明系统的H4编码及发射器部件的一种实施方式的框图。此实施方式使用具有低信号摆幅且与源器件及目标器件均端接的电流模逻辑驱动器。
高速通信实施方式的工作性能通常优于单个通信电路的工作性能。作为用于展现可在多大程度上克服限制的一例，图4所示为一种在同等工艺技术水平下线路速率4倍于单个通信电路线路速率的示例性4:1多路复用器结构。处理级420和430中的每一级均实施为四个单独的所示相应器件，每个器件均用于将一个传输周期内的源数据处理成符号数据。下至在单一处理级中实现所有操作的一个处理级，上至16或更多个处理级，上述所使用处理级的数目可以为任何数目，而且这些多个处理级中的每一级在所述传输系统中所占据的部分可在本例的基础上增加或缩减。
在本发明的一种实施方式中，将源数据供于405，该数据可经加扰、加密或封装处理，此不属于本公开内容的范围之内。多路复用器410按顺序将源数据的各个部分相继分配给所述四个编码级，多路复用器440按顺序将生成的四个编码结果合并为一个用于传输的数据流。在本发明的一种实施方式中，以12个比特为单位接收源数据，所接收的数据分成四个3比特部分后分配至所述四个处理级，并在之后合并为高速传输数据流。每个H4编码器420将三个比特的用户数据映射为一个H4码字，生成的结果缓存于触发器430中。在每一符号周期内，选择一个缓存H4码字，并由线路驱动器450将其转换为所选线路信号电平，以通过互连线460实现传输。如此所实现的传输速率数倍于单个编码器或解码器的处理速率。
如下文所述，将3个比特的源数据映射至特定H4码字的具体映射函数可根据实施方便性进行选择。
接收器及解码器
上述H4发射器系统的对应接收器及解码器用于执行若干操作：以阻抗匹配的方式实现所述互连线的端接；可通过传统的放大和过滤方法对信道衰减进行补偿；对与H4码的符号表征相对应的接收信号电平进行测量，并将符号解读为H4码的有效码字；将所检测的码字反向映射为接收数据。
本发明的至少一种实施方式对上述接收器及解码器的至少某些方面进行结合，以实现高的效率。如图5所示，本发明的一种实施方式包括一个多输入差分比较器电路，该电路将两条所选线路上的接收信号值相加，并将剩余两条线路上的接收信号值相加，最后输出这两个和值的比较结果。此类多输入比较器将线路接收器的元件以及H4码字检测操作结合于电路中，从而不需要固定的信号电平参考值，且可实现良好的共模噪声抑制水平。本发明的至少一种实施方式除了所述线路接收器及码字检测操作之外，还包括线路均衡以及放大功能。
使用三个此类多输入比较器电路对相同的四个输入信号的各种组合进行处理时，足以检测出所有的H4码字。也就是说，如果多输入比较器执行以下操作：
R＝(J+L)-(K+M) (等式3)
其中，J、K、L、M为表示所述四个输入信号值的变量，则作为一种非限制性示例，所述输入组合只要通过以下等式
R0＝(W+Y)-(X+Z) (等式4)
R1＝(Y+Z)-(W+X) (等式5)
R2＝(Y+X)-(Z+W) (等式6)
求出R0，R1，R2三个结果，即足以明确识别出接收信号输入值W、X、Y、Z所表示的向量信令码H4的每一码字。如果所述加法和减法函数均以线性方式执行，则值R0，R1，R2可表示模拟信号结果。如果所述减法函数由数字比较器执行，相当于在模拟结果上执行符号函数，则值R0，R1，R2可表示二进制输出。由于已编码H4码字的性质，模拟结果R0，R1，R2中的任何一个均不为0，也就是说，相应数字比较器的结果中的任何一个均不会为非明确的结果。
在编码器的将源数据映射至被传输H4码字的某些映射方法中，上述三个接收比较器的检测结果与接收数据之间存在直接关系，从而无需在接收器中设置额外的解码映射逻辑功能。因此，在本发明的一种优选实施方式中，首先选择期望由所述三个多输入接收比较器中的每一个处理的输入信号组合，然后对所有可得到有效码字的所述三个比较器的输出值进行记录，其后对用于将三个传输数据比特映射为相应码字的四个传输信号值的传输映射函数进行定义。图6所示为上述映射方法的一个示例。
图5A为用于使用H4码的四线组的上述接收器框图。每条接收互连线505均端接于510。在一些实施方式中，线路终端可进一步包括过压保护和隔直电容器，并可引入用于后续处理级的共模或偏置电压。端接接收信号515供于多输入比较器520，所述多输入比较器通过实施加法运算521和减法运算，或比较运算522，执行上述H4检测。本例所示为将比较器输出映射至接收数据525的直接映射方法。
与上述发射器例相同，可通过使用多个处理级实现比现有半导体技术中单电路方案更高的符号信令速率。图5B所示为采用接收比较器子系统524的示例性四级实施方式的多级接收处理方法。为了明确展现所述多级处理技术的特性，图5A中的示例性部分524可由图5B的四级实施方式替代，而两者的输入515及输出525保持相同。
如图5B所示，端接接收信号515由取样保持器530捕获，从而提供稳定的信号电平535，以作为所述四个示例性处理级540中每一个的输入。为使每个处理级540(在此例中由图5A所示接收比较器件520构成)获得最大处理时间，每一级的每一输入信号均设置一个取样保持器(因此，在本例中总数为16)，每个取样保持器的工作速率为所述接收符号速率的四分之一。多路复用器550将所有处理级的检测结果545合并为与图5A所示等同的接收数据流。其它实施方式可包括不同数目的处理级和/或不同数目的具有不同时间限制的取样保持器件，而且可在所述多个处理级中包括更多或更少的所述接收系统。
具有数字反馈均衡功能的H4码
现代的高速串行接收器的设计高度依赖于判定反馈均衡(DFE)法，该方法为解决包括信号反射和串扰在内的传输媒介扰动的公知方法。已有观察发现，此类扰动由之前发送数据的延迟部分(例如表现为源自通信路径阻抗中断处的延迟反射)对随后发送数据的干扰所致。因此，可先将检测到的数据保存于接收器内的DFE系统中，然后从当前输入信号中适当减去延迟和衰减部分，从而抵消此类影响。
此类简单反馈环路式DFE法的限制在于，需要及时且完全地检测当前接收数据比特的值并将其作为下一信号周期内信号的补偿进行反馈。所述时间窗口随传输速率的提高而缩小。此外，将接收处理分布于多个处理级的做法虽然可提高吞吐量，但是其代价在于造成延迟，使得给定接收周期数据的信息无法由多个接收周期共同享有。已知解决方案还可使用“展开”式DFE校正法，其可对DFE过程中关键的初始接收周期实施直线式补偿。
在所述四条信号路径的待补偿信号反射程度类似的情况下，可将传统二进制DFE解决方案在检测出各调制模(表示各数据比特)时与上述H4接收器设计联用。其中，每个调制模作为多个信号在所有的四个信号路径中传输，而且每个调制模的所述各信号的组合均正交，从而使得可通过合适的模补偿组合实现不同信号路径的信号扰动。应当指出的是，虽然线路中编码的各信号可取四值当中的任何一值(虽然每次只能在两个值中选择)，但是每个传输模的各信号始终为二值信号。因此，DFE保存及延迟部分在用于线路信号时的复杂度至少为用于调制模信号时的两倍。
图7A为本发明一种实施方式的框图。接收检测器524(描述于上文图5)内输入四个接收信号输入701，在此例中，所述接收检测器524用于生成与用于传输每个数据比特的传输模相对应的三个模拟输出705。在每个所述模拟输出上均加和710一个DFE校正信号735，该信号源自三个二进制DFE电路730中的一个，以抵消该模拟信号中的信号失真，此外，还由比较器740可选地将所述信号转换为数字值。
为熟悉本领域的技术人员所熟知的是，数字比较器所需的高增益通常由一系列中等增益级实现。外部信号可输入至两个所述增益级之间的互连电路节点内。在一个通例中，所述节点内设置可调节的直流电平，以对所述比较器的输入平衡或偏移进行校正。在另一实施方式中，与图5A中520类似，部件710和740可相应表示多输入比较器内的两个级。熟悉本领域的技术人员可注意到的是，DFE校正信号也可输入其它电路节点，以提供同等功能，例如输入至比较器输入端。
作为一种通常作法，为了实现更高性能，与至少最初的数个早于当前接收周期的比特周期相对应的DFE为“展开”式DFE，或者由所述三个展开式二进制DFE电路720以直线式而非闭环反馈方式与所述数据路径处理一道实施，而与其它待补偿比特周期相对应的DFE在730中通过传统反馈环路式DFE实现。
在所示实施方式中，反馈DFE电路730接收数字比特输入并输出适当缩放和延迟的模拟信号，而展开式DFE电路720接收数字输入并生成数字比特输出。本发明的其它实施方式可在所述DFE部件中采用与上述不同的输入信号和输出结果的组合。在一种实施方式中，所述三个DFE电路730处理模拟值725，而非源自比较器740的同等二进制值745。
本发明已知还有另一种更复杂的DFE实施方式可应用于所述四条线路间的反射差异度较为显著的情形中。在此方式中，如图7B所示，通过将四个DFE校正信号755分别与相应模拟线路信号751而非传输模相加760的方式实施DFE，从而以显著增加复杂性及功耗的代价，分别对每条物理线路路径单独进行均衡。补偿后的线路信号由接收检测器524处理，以生成输出765。在此实施方式中，与上述类似，至少最初的几个比特可由用于处理所述三个不同调制模的展开式二进制DFE770进行均衡。当校正量大于上述值时，使用增强型DFE。其中，所述三个数据输出795被重新编码为线路中所使用的相应四电平符号表征730，其余均衡操作由四个四电平DFE电路790执行，其中，每个所述四电平DFE电路均处理一个线路电平信号并生成补偿信号755。在一些实施方式中，数字比较器782的功能由DFE770执行，从而使得输出775等同于输出795。类似地，在至少一种实施方式中，由展开式DFE770对源自接收检测器524且表示二进制数据比特的数字输出信号进行处理。
上述本发明两种实施方式中的任何一种所采用的DFE补偿方法，即直线“展开”式DFE和传统反馈DFE，所需比特数可根据具体通信系统的需求无限制地加以选择。本发明的至少一种实施方式包括至少若干由所述接收器的多级处理部分实施的DFE操作。
接收方法描述
以下通过图9进行描述，以对以上针对接收器操作及其与接收模DFE和/或接收信号DFE之间的交互所作的描述进行总结和阐明。
在单元910中，对来自通信媒介各信道的信号进行接收，以获得表示每一信道内信号的信道信号值。
在一些实施方式中，作为获得信道信号值的一部分，通常还可对所述各信道的信号实施包括放大、滤波和按照频率放大在内的其它处理。在一些实施方式中，所述其它处理包括从信道的之前活动中获得校正信号，以例如用于抵消之前信号的反射以及其它不良通信信道效应。上述基于之前活动的校正称为判定反馈均衡，此处，所述判定反馈均衡应用于信道信号。
在单元920中，通过检测方法检测向量信令码元，该检测方法包括求得两个被选信道信号值的和值并将其作为第一和值，求得两个剩余信道信号值的和值并将其作为第二和值，以及通过比较所述第一和值和第二和值获得被检测码元。其中，通过为每一码元选择不同的被选信道信号值，可检测出多个码元；对于所述示例性H4向量信令码，可根据信道信号值的用于生成第一和值和第二和值的三种不同组合，检测出三个上述码元。
在一些实施方式中，作为用于抵消之前信号的反射以及其它不良通信信道效应的另一方法的一例，当前向量信令码元的检测还包括从之前检测出的向量信令码中获得校正信号。例如，可在码元检测中引入表示对影响一个或多个特定调制模的之前信号反射以及其它不良通信信道效应的补偿值的校正信号，从而对所述比较运算的输入值进行修正，或使所述比较运算本身发生偏置。上述基于之前活动的校正称为判定反馈均衡，此处，所述判定反馈均衡应用于信道信号调制模。
在单元920中，通过检测方法检测向量信令码元，该检测方法包括求得两个被选信道信号值的和值并将其作为第一和值，求得两个剩余信道信号值的和值并将其作为第二和值，以及通过比较所述第一和值和第二和值获得被检测码元。其中，通过为每一码元选择不同的被选信道信号值，可检测出多个码元；对于所述示例性H4向量信令码，可根据信道信号值的用于生成第一和值和第二和值的三种不同组合，检测出三个上述码元。
在单元930中，输出从所检测出的向量信令码元中获得的接收数据。如前所述，在优选实施方式中，所述传输编码方法选择为使得所检测出的向量信令码元直接对应于接收数据比特。
由此可见，上述方法对物理信号输入进行测量和处理，并且生成接收数据的物理结果，该结果可由较大系统或过程的后续部件进一步处理。
虽然本申请实施例描述了向量信令码在点对点芯片间互连中的应用，然而其不应以任何方式视为对本发明范围构成限制。本申请中所公开的方法还可以同等效果适用于其他互连拓扑结构以及其他通信媒介，包括用于光通信、电容性通信、感应式通信以及无线通信的媒介。因此，“电压”和“信号电平”等描述性词语应视为包括其在其他度量系统中的同等概念，如“光强”、“射频调制”等。本申请所使用的“物理信号”一词包括可传送信息的物理现象的所有适用形态和/或属性。此外，物理信号可以为有形的非暂时性信号。

Claims (11)

1.一种使用基于四阶阿达马矩阵的均衡向量信令码接收传输于多信道通信媒介上的数字信息的方法，其特征在于，所述方法包括：
从所述通信媒介的各个信道接收信号，以获得信道信号值，
使用多个模检测器通过检测方法检测所述向量信令码的码元，该检测方法包括：对于每个检出码元，
求得两个被选信道信号值的第一和值；
求得剩余两个信道信号值的第二和值；以及
通过比较所述第一和值和第二和值获得所述检出码元，
输出从所述向量信令码的检出码元中获得的接收数据；以及
通过一判定反馈均衡器，从之前的检出码元中生成至少一个校正信号，并将所述校正信号引入至所述多个模检测器中的至少一个中。
2.如权利要求1所述方法，其特征在于，所述检测方法还包括：通过在所述第一和值、所述第二和值和所述比较操作的偏移值中的一个或多个值中引入从之前的检出码元中获得的校正信号，实现调制模均衡化。
3.如权利要求1所述方法，其特征在于，所述向量信令码的检出码元表示所述接收数据的比特。
4.如权利要求1所述方法，其特征在于，所述通信媒介的各个信道中的某一信号相对于所述通信媒介的各个信道中的其余信号具有(i)相反的符号以及(ii)三倍的大小。
5.如权利要求4所述方法，其特征在于，所述通信媒介的各个信道中的信号为向量{+1,-1/3,-1/3,-1/3}或向量{-1,1/3,1/3,1/3}的各种组合。
6.如权利要求1所述方法，其特征在于，所述通信媒介的各个信道的信号由多个处理级中的一第一处理级处理。
7.如权利要求6所述方法，其特征在于，所述接收数据代表所述多个处理级中的该第一处理级的输出。
8.如权利要求7所述方法，其特征在于，还包括将所述第一处理级的所述接收数据提供给一多路复用器。
9.如权利要求1所述方法，其特征在于，所述通信媒介的各个信道的信号采用电流模逻辑驱动器端接。
10.如权利要求9所述方法，其特征在于，所述电流模逻辑驱动器为低摆幅电流模逻辑驱动器。
11.一种使用基于四阶阿达马矩阵的均衡向量信令码接收传输于多信道通信媒介的四个信道上的数字信息的系统，其特征在于，所述系统包括：
线路接收器，用于从每个所述信道中接收物理信号，以生成接收信号，其中，所述物理信号中的一个以相反的符号传输，且该物理信号的大小是其他物理信号中的每一个的三倍，
多个模检测器，每个所述模检测器用于对从两个被选信道中接收的信号的第一和值与从剩余两个信道中接收的信号的第二和值进行比较，以生成检出模，
判定反馈均衡器，用于生成从之前的检出模中获得的至少一个校正信号，并将所述校正信号引入至所述多个模检测器中的至少一个中；以及
接收输出，从多个所述检出模中获得。
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