CN105280800A - Semiconductor diode chip - Google Patents

Abstract

A semiconductor diode chip, belonging to the technical field of semiconductor production, the first conductive layer is arranged on the first semiconductor layer, the first conductive layer is in ohmic contact with the first semiconductor layer; the first insulating layer is covered by the second semiconductor layer, the semiconductor light-emitting layer 1, the side wall of the semiconductor layer composed of the first semiconductor layer and the first conductive layer, the first insulating layer also extends to cover part of the transparent carrier, the above two technical solutions of the present invention are all connected to the semiconductor active region by the first metal pad Full coverage, better heat conduction to the semiconductor chip, the design of the first and second metal pads on different platforms is also conducive to different treatments when welding the positive and negative electrodes to improve the qualified rate of welding.

Description

A semiconductor diode chip

technical field

The invention belongs to the technical field of semiconductor production, and in particular relates to a semiconductor diode chip for flip-chip welding.

technical background

In the field of semiconductor diodes, LED is an important photoelectric diode. LED technology is gradually replacing traditional lighting technology and fluorescent technology and entering the lighting field. At the same time, LED chips also have the characteristics of electronic devices. field of application. In the pursuit of higher lumens and the continuous compression of industrial manufacturing costs, the flip-chip application of light-emitting diodes has been generally considered to be an industry trend. Flip-chip light-emitting diode chips are beneficial to large currents to obtain higher lumens, and the heat conduction of the chips is improved by welding the heat sink closer to the active area of the semiconductor. The traditional LED technology of the positive structure is gradually eliminated and replaced by reliable Better performance, higher lumen density flip-chip LED technology.

During the soldering process of the flip-chip diode chip, because the electrode faces downward, the alignment of the chip and the soldering point requires more precise packaging equipment investment. Moreover, the positive and negative electrodes arranged on the same plane and with small intervals are also prone to chip short circuit caused by solder overflow during soldering.

Contents of the invention

The purpose of the present invention is to manufacture a semiconductor diode chip structure for flip-chip welding, so as to facilitate identification of chip electrodes and flip-chip welding; meanwhile, it can better solve the heat dissipation problem of the diode chip.

The first technical solution of the present invention is that the whole semiconductor diode chip is composed of a group of semiconductor units: including the second semiconductor layer, the semiconductor light-emitting layer and the first semiconductor layer arranged on the transparent carrier in sequence; its characteristic is: the first conductive layer Set on the first semiconductor layer, the first conductive layer is in ohmic contact with the first semiconductor layer; the first insulating layer covers the side wall of the semiconductor layer composed of the second semiconductor layer, the semiconductor light emitting layer, the first semiconductor layer and the first conductive layer , the first insulating layer also extends to cover part of the transparent carrier; a second conductive layer is arranged outside the first insulating layer, and the second conductive layer forms an ohmic contact with the second semiconductor layer, and the second conductive layer also extends on the side wall of the semiconductor layer To the exposed transparent carrier; the second insulating layer is arranged outside the second conductive layer; the second metal pad is in ohmic contact with the second conductive layer extending to the transparent carrier; the first metal pad is arranged on the second insulating layer , the first metal pad covers the entire light-emitting layer, and is in ohmic contact with the first conductive layer through the through holes of the second insulating layer and the first insulating layer.

The second technical solution of the present invention is: a semiconductor diode chip is composed of multiple groups of semiconductor units. The semiconductor diode chip includes at least two groups of semiconductor units, and each group of semiconductor units is sequentially provided with a second semiconductor layer, a semiconductor light-emitting layer and a first semiconductor layer on their respective transparent carriers; the feature is: the first conductive layer is arranged on the first semiconductor layer, the first conductive layer is in ohmic contact with the first semiconductor layer; the first insulating layer covers the side wall of one side of the semiconductor layer composed of the second semiconductor layer, the semiconductor light-emitting layer, the first semiconductor layer and the first conductive layer, The first insulating layer also extends to cover part of the transparent carrier; a second conductive layer is arranged outside the first insulating layer, and the second conductive layer forms an ohmic contact with the second semiconductor layer, and one end of the second conductive layer is connected to the semiconductor of the group. The first conductive layer is in ohmic contact, the other end of the second conductive layer is in ohmic contact with the second semiconductor layer of the adjacent semiconductor, and the second conductive layer also extends to the exposed transparent carrier on the side wall of each group of semiconductor units; A second insulating layer is arranged outside the second conductive layer, and the second insulating layer of each group of semiconductor units covers the other side of the semiconductor layer composed of the second semiconductor layer, the semiconductor light-emitting layer, the first semiconductor layer and the first conductive layer. wall; the second metal pad is in ohmic contact with the second conductive layer extending to the transparent carrier; the first metal pad is arranged on the second insulating layer, and the first metal pad covers the entire light-emitting layer and passes through the second insulating layer The through hole of the first insulating layer is in ohmic contact with the first conductive layer.

The above two technical solutions of the present invention are to better improve the heat conduction of the semiconductor chip through the full coverage of the first metal pad on the semiconductor active area, and the design of the first and second metal pads on different platforms is also beneficial to positive and negative Different treatments during electrode welding to improve the qualified rate of welding.

In the second technical solution, a series circuit is formed between adjacent semiconductor units.

The preferred design of the above two technical solutions is:

The total thickness of the second semiconductor layer, the semiconductor light-emitting layer and the first semiconductor layer is greater than 5 μm. Under the premise of ensuring the integrity of the diode structure, the advantages and benefits of the thicker epitaxial structure in the present invention are more obvious.

The thickness of the first insulating layer is greater than 1 μm. It is mainly composed of a dielectric layer with a low dielectric constant to ensure the insulation and electrical breakdown resistance of the insulating layer.

The thickness of the second insulating layer is greater than 2 μm. Ensure the mechanical stability and insulation reliability of the insulating layer in the application.

The height difference between the first metal pad and the second metal pad is greater than 8 μm. The height difference between the first metal pad and the second metal pad can improve welding recognition, and use differentiated process conditions for different metal pads.

The first metal pad includes copper element. Copper-containing electrodes have low cost and good solderability, and the thermal conductivity of common metals is second only to silver.

The thickness of the first metal pad is greater than the thickness of the second metal pad 71b.

The thickness of the first metal pad is 5 μm, and the thickness of the second metal pad is 2 μm. The thicker first metal pad can increase the height difference between the first metal pad and the second metal pad to a greater extent, and reduce the impact of solder overflow on the pad during soldering on reliability.

The surface area of the first metal pad accounts for more than 80% of the total surface area of the semiconductor diode chip, and the larger metal surface is conducive to chip heat dissipation.

Description of drawings

FIG. 1 is a schematic cross-sectional structure diagram of a semiconductor layer of the present invention.

FIG. 2 is a schematic cross-sectional view of Embodiment 1 of the present invention.

FIG. 3 is a schematic top view of FIG. 2 .

Fig. 4 is a schematic cross-sectional view of Embodiment 2 of the present invention.

Fig. 5 is a top view of Fig. 4 .

detailed description

Embodiment 1: An example in which a semiconductor diode chip is composed of a single semiconductor unit.

As shown in FIG. 1 , the second semiconductor layer 11 , the semiconductor light-emitting layer 21 and the first semiconductor layer 31 are sequentially arranged on the transparent carrier 01 , and the total thickness of the manufactured semiconductor layer is greater than 5 μm.

As shown in Figure 2, the first conductive layer (metal layer containing reflective metal elements) 41 is disposed on the first semiconductor layer 31, the second conductive layer 61 is disposed on the first conductive layer 41, and the second conductive layer 61 is also connected with The second semiconductor layer 11 forms an ohmic contact, and a first insulating layer 51 a is disposed between the first conductive layer 41 and the second conductive layer 61 , and the thickness of the first insulating layer 51 a is generally greater than 1 μm.

A part of the second conductive layer 61 extends to the bare transparent carrier 01 , and the extended part or all is in ohmic contact with the second metal pad 71b.

The first metal pad 71a is placed on the top of the light-emitting layer, and the second insulating layer 51b is provided on the overlapping portion of the first metal pad 71a and the second conductive layer 61. The thickness of the second insulating layer 51b is generally greater than 2 μm.

The first metal pad 71a is in ohmic contact with the first conductive layer 41 through the through holes provided on the first insulating layer 51a and the second insulating layer 51b.

The first metal pad 71a and the second metal pad 71b are pads containing gold elements, and the height difference between them is greater than 8 μm; further, the first metal pad 71a and the second metal pad 72b contain different metal elements, More optimally, the first metal pad 71a is a pad containing copper, and its thickness may be greater than that of the second metal pad 71b, for example, the thickness of the first metal pad 71a is 5 μm, and the thickness of the second metal pad 71b is 2 μm.

In Embodiment 1, the height difference between the first metal pad 71 a and the second metal pad 71 b is greater than 11 μm.

The first metal pad 71a and the second metal pad 71b can be shown in Figure 3, the surface area of the first metal pad 71a is much larger than the second metal pad 71b, and the surface area of the first metal pad 71a can be realized to account for the entire chip. 80% of the surface area.

Embodiment 2: An example in which a semiconductor diode chip is composed of several semiconductor units.

As shown in FIG. 4 , the second semiconductor layer 11 , the semiconductor light emitting layer 21 and the first semiconductor layer 31 are sequentially formed on the transparent carrier 01 , and the total thickness of the manufactured semiconductor layer is greater than 5 μm.

After three groups of semiconductor units are formed by electrical isolation, a first conductive layer (a metal layer containing reflective metal elements) 41 is placed on the first semiconductor layer 31 of each group of semiconductor units.

One end of the second conductive layer 61 (a metal layer capable of forming ohmic contact with the second semiconductor layer) is placed on the second semiconductor layer 11 of a group of semiconductor units, and the other end is in ohmic contact with the first conductive layer 41 of the adjacent semiconductor unit .

The side walls between adjacent semiconductor units are covered by the first insulating layer 51a, and a series circuit is formed between two adjacent semiconductor units. One end of the second conductive layer 61 of the negative terminal is in contact with the second semiconductor 11, and one end extends to the exposed On the transparent carrier 01 , part or all of the second metal pad 71 b is in contact with the extended second conductive layer 61 . The thickness of the inserted first insulating layer 51a is generally greater than 1 μm, and it is mainly composed of a dielectric layer with a low dielectric constant; the second conductive layer 61 partially extends to the exposed transparent carrier 01, and part or all of the extension is ohmic with the second metal pad 71b In contact, the thickness of the first conductive layer 41 and the second conductive layer 61 is generally less than 1 μm. The second insulating layer 51b may be an organic insulating layer similar to polyimide, the thickness of which may be greater than 5 μm, covering the entire light emitting region and the second conductive layer interconnecting the semiconductor units.

The first metal pad 71a is placed on the top of the light-emitting layer, and the first metal pad 71a is in ohmic contact with the first conductive layer 41 at the positive end through the through holes of the first insulating layer 51a and the second insulating layer 51b.

As in this embodiment, the first metal pad 71a is a pad containing copper, the second pad 71b is a gold pad, the thickness of the first metal pad 71a is 5 μm, and the thickness of the second metal pad 71b is 2 μm. In this embodiment, the height difference between the first and second metal pads is greater than 14 μm.

The first metal pad 71a and the second metal pad 71b on the metal pad surface can be shown in FIG. The total surface area of the diode chip is more than 80%, and the first metal pad 71a covers the entire active area of each group of semiconductor units.

The above drawings and descriptions are only explanations of specific embodiments to enhance the understanding of the technical solution of the present invention. For example, the distribution of the front side of the metal pad is not limited to the schematic diagram disclosed in this implementation statement. Although the present invention has been described above, it is not used to idle the scope of the present invention, the implementation sequence, or the materials and manufacturing methods used. For the various aspects of the present invention Modifications and changes do not depart from the spirit and scope of the present invention.

Claims (10)

1. a semiconductor diode chip, comprises the second semiconductor layer be successively set on transparent carrier, semiconductor light emitting layer and the first semiconductor layer; It is characterized in that: the first conductive layer is arranged on the first semiconductor layer, the first conductive layer and the first semiconductor layer ohmic contact;

First insulating barrier covers the semiconductor layer sidewall be made up of the second semiconductor layer, semiconductor light emitting layer, the first semiconductor layer and the first conductive layer, and the first insulating barrier also extends cover part transparent carrier;

At the first insulating barrier arranged outside second conductive layer, and the second conductive layer and the second semiconductor layer form ohmic contact, and the second conductive layer also extends on exposed transparent carrier at semiconductor layer sidewall;

Second insulating barrier is set outside the second conductive layer;

Second metal pad and the second conductive layer ohmic contact extended on transparent carrier;

First metal pad is arranged over the second dielectric, and the first metal pad covers whole luminescent layer, and through the through hole of the second insulating barrier and the first insulating barrier and the first conductive layer ohmic contact.

2. a semiconductor diode chip, comprises at least two group semiconductor units, and each group semiconductor unit sets gradually the second semiconductor layer, semiconductor light emitting layer and the first semiconductor layer on respective transparent carrier; It is characterized in that: the first conductive layer is arranged on the first semiconductor layer, the first conductive layer and the first semiconductor layer ohmic contact;

First insulating barrier covers the sidewall of the side of the semiconductor layer be made up of the second semiconductor layer, semiconductor light emitting layer, the first semiconductor layer and the first conductive layer, and the first insulating barrier also extends cover part transparent carrier;

At the first insulating barrier arranged outside second conductive layer, and, second conductive layer and the second semiconductor layer form ohmic contact, first conductive layer ohmic contact of one end of the second conductive layer and the semiconductor of this group, the other end of the second conductive layer and the second semiconductor layer ohmic contact of adjacent semiconductor, the second conductive layer also extends to respectively and is positioned on the exposed transparent carrier of each group of semiconductor unit sidewall;

Outside the second conductive layer, arrange the second insulating barrier, the second insulating barrier of each group semiconductor unit covers the sidewall of the opposite side of the semiconductor layer be made up of the second semiconductor layer, semiconductor light emitting layer, the first semiconductor layer and the first conductive layer;

Second metal pad and the second conductive layer ohmic contact extended on transparent carrier;

First metal pad is arranged over the second dielectric, and the first metal pad covers whole luminescent layer, and through the through hole of the second insulating barrier and the first insulating barrier and the first conductive layer ohmic contact.

3. semiconductor diode chip according to claim 1 or 2, is characterized in that: the gross thickness of described second semiconductor layer, semiconductor light emitting layer and the first semiconductor layer is greater than 5 μm.

4. semiconductor diode chip according to claim 1 or 2, is characterized in that: described first thickness of insulating layer is greater than 1 μm.

5. semiconductor diode chip according to claim 1 or 2, is characterized in that: the thickness of described second insulating barrier is greater than 2 μm.

6. semiconductor diode chip according to claim 1 or 2, is characterized in that: the difference in height of described first metal pad and the second metal pad is greater than 8 μm.

7. semiconductor diode chip according to claim 6, is characterized in that: described first metal pad comprises copper.

8. semiconductor diode chip according to claim 7, is characterized in that: the thickness of described first metal pad is greater than the thickness of the second metal pad 71b.

9. semiconductor diode chip according to claim 8, it is characterized in that: the thickness of described first metal pad is 5 μm, the thickness of the second metal pad 71b is 2 μm.

10. semiconductor diode chip according to claim 1 or 2, is characterized in that: the surface area of described first metal pad accounts for more than 80% of semiconductor diode chip total surface area.