CN105226152A - Graphical sapphire substrate and light-emitting diode - Google Patents
Graphical sapphire substrate and light-emitting diode Download PDFInfo
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- CN105226152A CN105226152A CN201510735204.4A CN201510735204A CN105226152A CN 105226152 A CN105226152 A CN 105226152A CN 201510735204 A CN201510735204 A CN 201510735204A CN 105226152 A CN105226152 A CN 105226152A
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- 239000000758 substrate Substances 0.000 title claims abstract description 105
- 229910052594 sapphire Inorganic materials 0.000 title claims abstract description 85
- 239000010980 sapphire Substances 0.000 title claims abstract description 85
- 238000000034 method Methods 0.000 claims description 16
- 238000000605 extraction Methods 0.000 abstract description 10
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000005530 etching Methods 0.000 description 17
- 239000004065 semiconductor Substances 0.000 description 12
- 238000001039 wet etching Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 8
- 239000013078 crystal Substances 0.000 description 7
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 6
- 239000000243 solution Substances 0.000 description 6
- 229910002601 GaN Inorganic materials 0.000 description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 3
- 230000000994 depressogenic effect Effects 0.000 description 3
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 3
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000002310 reflectometry Methods 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000000149 argon plasma sintering Methods 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000001878 scanning electron micrograph Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/814—Bodies having reflecting means, e.g. semiconductor Bragg reflectors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
- H10H20/82—Roughened surfaces, e.g. at the interface between epitaxial layers
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Abstract
本发明公开了一种图形化蓝宝石衬底、其制作方法以及采用该衬底的发光二极管,其中所述图形化蓝宝石衬底具有相对的第一表面和第二表面,所述衬底第一表面由复数个相互间隔的图案排列而成,其特征在于:所述图案具有一顶面、一底面、复数个侧面、以及至少一个夹置于所述相邻侧面和顶面之间的凹陷区,所述凹陷区的深度和宽度自所述图案的顶部向底部逐渐减小。图形化蓝宝石衬底的图案表面具有的凹陷区增大了其反射光线的面积,从而提高了图形化蓝宝石衬底的出光效率。
The invention discloses a patterned sapphire substrate, its manufacturing method and a light-emitting diode using the substrate, wherein the patterned sapphire substrate has opposite first and second surfaces, and the first surface of the substrate Arranged by a plurality of patterns spaced apart from each other, it is characterized in that: the pattern has a top surface, a bottom surface, a plurality of side surfaces, and at least one recessed area sandwiched between the adjacent side surfaces and the top surface, The depth and width of the recessed area gradually decrease from the top to the bottom of the pattern. The recessed area on the patterned surface of the patterned sapphire substrate increases the area for reflecting light, thereby improving the light extraction efficiency of the patterned sapphire substrate.
Description
技术领域 technical field
本发明属于半导体领域,尤其涉及一种图形化蓝宝石衬底、其制作方法及采用该图形化蓝宝石衬底的发光二极管。 The invention belongs to the field of semiconductors, and in particular relates to a patterned sapphire substrate, a manufacturing method thereof and a light-emitting diode using the patterned sapphire substrate.
背景技术 Background technique
PSS(PatternedSapphireSubstrate,图形化蓝宝石衬底)是在蓝宝石衬底上利用光刻、刻蚀等工艺,形成具有图形化表面的蓝宝石衬底。图形化衬底一方面能够有效降低外延结构层的位错密度,提高外延材料的晶体质量和均匀性,进而能提高发光二极管的内量子发光效率,另一方面,由于图形结构增加了光的散射,改变了发光二极管的光学线路,进而提升了出光几率。 PSS (Patterned Sapphire Substrate, patterned sapphire substrate) is to use photolithography, etching and other processes on the sapphire substrate to form a sapphire substrate with a patterned surface. On the one hand, the patterned substrate can effectively reduce the dislocation density of the epitaxial structure layer, improve the crystal quality and uniformity of the epitaxial material, and then improve the internal quantum luminous efficiency of the light-emitting diode. On the other hand, because the pattern structure increases the light scattering , changing the optical circuit of the light-emitting diode, thereby improving the probability of light emission.
PSS图案底部宽度的大小对衬底的出光效率有一定的影响:底部宽度越大,图案的表面积越大,反光区域越大,出光效率越高。同时,相邻图案的间距对后续外延层的生长具有一定的影响:如果间距太小,则会导致形成的外延层内部缺陷增大,不利于半导体元件的光提取,如果间距太大,则导致相同尺寸的衬底表面排列的衬底图案数目较少,降低衬底的出光效率。因此,如何获得密度适当并且底部宽度较大的衬底图案是提高半导体元件出光效率的关键技术之一。 The width of the bottom of the PSS pattern has a certain influence on the light extraction efficiency of the substrate: the larger the bottom width, the larger the surface area of the pattern, the larger the reflective area, and the higher the light extraction efficiency. At the same time, the spacing of adjacent patterns has a certain influence on the growth of the subsequent epitaxial layer: if the spacing is too small, the internal defects of the formed epitaxial layer will increase, which is not conducive to the light extraction of semiconductor elements; if the spacing is too large, it will cause The number of substrate patterns arranged on the substrate surface of the same size is less, which reduces the light extraction efficiency of the substrate. Therefore, how to obtain a substrate pattern with an appropriate density and a large bottom width is one of the key technologies for improving the light extraction efficiency of semiconductor devices.
发明内容 Contents of the invention
本发明提出一种图形化蓝宝石衬底及采用该衬底的发光二极管,其通过增加图形化衬底的图案表面的反光面积,可以提高衬底对光线的反射,从而提升发光二极管的出光效率。 The invention provides a patterned sapphire substrate and a light-emitting diode using the substrate. By increasing the reflective area of the patterned surface of the patterned substrate, the reflection of light by the substrate can be improved, thereby improving the light extraction efficiency of the light-emitting diode.
本发明的技术方案为:一种图形化蓝宝石衬底,具有相对的第一表面和第二表面,所述衬底第一表面由复数个相互间隔的图案排列而成,所述图案具有复数个侧面和至少一个夹置于所述相邻侧面之间的凹陷区,所述凹陷区的深度和宽度自所述图案的顶部向底部逐渐减小。 The technical solution of the present invention is: a patterned sapphire substrate, which has opposite first surface and second surface, the first surface of the substrate is arranged by a plurality of mutually spaced patterns, and the pattern has a plurality of The sides and at least one recessed region interposed between the adjacent sides, the depth and width of the recessed region gradually decrease from the top to the bottom of the pattern.
优选的,所述图案还包括一顶面和一底面,所述凹陷区夹置于所述相邻侧面和顶面之间。 Preferably, the pattern further includes a top surface and a bottom surface, and the recessed area is interposed between the adjacent side surfaces and the top surface.
优选的,所述凹陷区由两个倾斜面连接而成。更佳的,所述凹陷区在所述图案底面上的投影呈三角形。 Preferably, the recessed area is formed by connecting two inclined surfaces. More preferably, the projection of the recessed area on the bottom surface of the pattern is triangular.
优选的,所述两倾斜面呈轴对称设置。 Preferably, the two inclined surfaces are arranged axially symmetrically.
优选的,所述两倾斜面的夹角范围为90~150°。 Preferably, the range of the included angle between the two inclined surfaces is 90° to 150°.
优选的,所述图案的顶面呈具有凸起的多边形。 Preferably, the top surface of the pattern is a polygon with protrusions.
优选的,所述侧面由倾斜度不同且分别位于所述图案上部和下部的第一侧面和第二侧面组成。 Preferably, the sides are composed of a first side and a second side with different inclinations and located at the upper part and the lower part of the pattern respectively.
优选的,所述第一侧面的倾斜度小于第二侧面的倾斜度。 Preferably, the inclination of the first side is smaller than the inclination of the second side.
优选的,所述第二侧面呈弧状。 Preferably, the second side is arc-shaped.
所述衬底的图案的底部宽度范围为4μm~20μm。 The width of the bottom of the patterns of the substrate ranges from 4 μm to 20 μm.
上述图形化蓝宝石衬底可以通过下面方法制备:S1、提供一蓝宝石平片衬底,具有相对的第一表面和第二表面,在第一表面上形成掩膜层,其具有周期性排列的掩膜图案;S2、采用湿法刻蚀在蓝宝石平片衬底第一表面上形成复数个周期性排列的相互间隔的图案,所述图案具有复数个侧面和至少一个夹置于所述相邻侧面之间的凹陷区,所述凹陷区的深度和宽度自所述图案的顶部向底部逐渐减小。 The above-mentioned patterned sapphire substrate can be prepared by the following method: S1. Provide a sapphire flat plate substrate with opposite first surface and second surface, and form a mask layer on the first surface, which has periodically arranged mask Film pattern; S2, using wet etching to form a plurality of periodically arranged and spaced patterns on the first surface of the sapphire flat substrate, the patterns have a plurality of sides and at least one is sandwiched between the adjacent sides The depth and width of the depressions gradually decrease from the top to the bottom of the pattern.
优选的,所述步骤S1中形成的掩膜图案具有至少一个向外延伸的凹陷,所述凹陷对应于所述蓝宝石衬底的晶格方向。 Preferably, the mask pattern formed in the step S1 has at least one outwardly extending depression, and the depression corresponds to the crystal lattice direction of the sapphire substrate.
优选的,所述步骤S1中形成的掩膜图案具有复数个向外延伸的凸起,所述凸起对应于所述蓝宝石衬底的晶格方向之间。 Preferably, the mask pattern formed in the step S1 has a plurality of protrusions extending outward, and the protrusions correspond to the lattice directions of the sapphire substrate.
优选的,所述凸起和凹陷交替排列,所述凸起和凹陷的数目均为3。 Preferably, the protrusions and the depressions are arranged alternately, and the number of the protrusions and the depressions is three.
优选的,所述相邻凸起之间构成一夹角,夹角的范围为90°~150°。 Preferably, an included angle is formed between the adjacent protrusions, and the included angle ranges from 90° to 150°.
优选的,所述步骤S1中形成的掩膜图案的边缘与中心的距离为0.25μm~10μm,所述掩膜图案的高度为1μm~10μm,所述掩膜图案的间距为0.1μm~10μm。 Preferably, the distance between the edge and the center of the mask pattern formed in the step S1 is 0.25 μm-10 μm, the height of the mask pattern is 1 μm-10 μm, and the pitch of the mask pattern is 0.1 μm-10 μm.
优选的,所述步骤S1中形成的掩膜层的材料为光阻、氧化物或金属。 Preferably, the material of the mask layer formed in the step S1 is photoresist, oxide or metal.
优选的,所述步骤S2中湿法刻蚀采用浓硫酸和磷酸混合液刻蚀蓝宝石衬底第一表面形成图型化蓝宝石衬底,刻蚀时间为500s~3500s,刻蚀温度为150℃~300℃。 Preferably, in the step S2, wet etching uses a mixture of concentrated sulfuric acid and phosphoric acid to etch the first surface of the sapphire substrate to form a patterned sapphire substrate, the etching time is 500s~3500s, and the etching temperature is 150°C~ 300°C.
本发明还提供了一种发光二极管,包括前述任意一种图形化蓝宝石衬底及形成于所述图形化蓝宝石衬底的发光外延层。 The present invention also provides a light-emitting diode, comprising any one of the aforementioned patterned sapphire substrates and a light-emitting epitaxial layer formed on the patterned sapphire substrate.
优选的,所述图形化蓝宝石衬底的表面上具有一层采用PVD法形成的AlN层,所述发光外延层形成于所述AlN层之上。 Preferably, there is an AlN layer formed by PVD on the surface of the patterned sapphire substrate, and the light-emitting epitaxial layer is formed on the AlN layer.
优选的,所述AlN层的厚度为10埃~200埃。 Preferably, the thickness of the AlN layer is 10 angstroms to 200 angstroms.
本发明的再一方面提供了前述发光二极管的制作方法,包括如下步骤:S1、提供一蓝宝石平片衬底,具有相对的第一表面和第二表面,在第一表面上形成掩膜层,其具有周期性排列的掩膜图案;S2、采用湿法刻蚀在蓝宝石平片衬底第一表面上形成复数个周期性排列的相互间隔的图案,所述图案具有复数个侧面和至少一个夹置于所述相邻侧面之间的凹陷区,所述凹陷区的深度和宽度自所述图案的顶部向底部逐渐减小;S3、在所述图形化蓝宝石衬底表面采用PVD法形成一AlN层;S4、在所述AlN层上外延生长发光外延层,其至少包括N型半导体、发光层和P型半导体层。 Another aspect of the present invention provides a method for manufacturing the aforementioned light-emitting diode, including the following steps: S1, providing a sapphire flat substrate with opposite first and second surfaces, forming a mask layer on the first surface, It has a periodically arranged mask pattern; S2, using wet etching to form a plurality of periodically arranged mutually spaced patterns on the first surface of the sapphire flat substrate, the patterns have a plurality of side surfaces and at least one clip A recessed area placed between the adjacent side faces, the depth and width of the recessed area gradually decrease from the top of the pattern to the bottom; S3, forming an AlN on the surface of the patterned sapphire substrate by PVD method layer; S4, epitaxially growing a light-emitting epitaxial layer on the AlN layer, which at least includes an N-type semiconductor, a light-emitting layer and a P-type semiconductor layer.
优选的,所述步骤S2中的所述图案还包括一顶面和一底面,所述凹陷区夹置于所述相邻侧面和顶面之间。 Preferably, the pattern in the step S2 further includes a top surface and a bottom surface, and the recessed area is interposed between the adjacent side surfaces and the top surface.
优选的,所述步骤S1中形成的掩膜图案具有至少一个向外延伸的凹陷,所述凹陷对应于所述蓝宝石衬底的晶格方向。 Preferably, the mask pattern formed in the step S1 has at least one outwardly extending depression, and the depression corresponds to the crystal lattice direction of the sapphire substrate.
优选的,所述步骤S1中形成的掩膜图案还具有复数个向外延伸的凸起,其对应于所述蓝宝石衬底的晶格方向之间。 Preferably, the mask pattern formed in the step S1 also has a plurality of outwardly extending protrusions corresponding to the lattice directions of the sapphire substrate.
优选的,所述步骤S3中AlN层的厚度为10埃~200埃。 Preferably, the thickness of the AlN layer in the step S3 is 10 angstroms to 200 angstroms.
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其它优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。 Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
附图说明 Description of drawings
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。此外,附图数据是描述概要,不是按比例绘制。 The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, and are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention. In addition, the drawing data are descriptive summaries and are not drawn to scale.
图1为蓝宝石晶格结构俯视示意图。 Figure 1 is a schematic top view of the sapphire lattice structure.
图2~图3为现有技术中图形化蓝宝石衬底的图案之SEM侧视图。 2 to 3 are SEM side views of patterns of patterned sapphire substrates in the prior art.
图4~图6显示了根据本发明实施的一种图形化蓝宝石衬底的SEM图。其中,图4为图形化蓝宝石衬底的整体立体图,图5为图形化蓝宝石衬底之单个图案的侧视结构示意图,图6为图形化蓝宝石衬底之单个图案的俯视结构示意图。 4 to 6 show SEM images of a patterned sapphire substrate implemented according to the present invention. 4 is an overall perspective view of a patterned sapphire substrate, FIG. 5 is a schematic side view of a single pattern of a patterned sapphire substrate, and FIG. 6 is a schematic top view of a single pattern of a patterned sapphire substrate.
图7为根据本发明实施的一种用于制作图形化蓝宝石衬底的流程示意图。 FIG. 7 is a schematic flow chart for fabricating a patterned sapphire substrate according to the present invention.
图8为根据本发明实施的一种用于制作图形化蓝宝石衬底的掩膜层图案。 FIG. 8 is a pattern of a mask layer for fabricating a patterned sapphire substrate according to the present invention.
图9为图8所示掩膜层图案的放大图。 FIG. 9 is an enlarged view of the pattern of the mask layer shown in FIG. 8 .
图10为根据本发明实施的一种用于制作发光二极管的流程示意图。 FIG. 10 is a schematic flow chart for manufacturing a light-emitting diode according to the present invention.
图11为根据本发明实施的一种发光二极管结构示意图。 Fig. 11 is a schematic structural diagram of a light emitting diode implemented according to the present invention.
图中标号表示:10.图形化蓝宝石衬底;20.图形化蓝宝石衬底;21.衬底的图案;210.顶面;2101.顶面的凸起结构;2102.顶面的凹陷结构;211.底面;212.侧面;2121.第一侧面;2122.第二侧面;213.凹陷区;2130.倾斜面;30.掩膜图案;31.掩膜图案之凹陷;32.掩膜图案之凸起。 The symbols in the figure indicate: 10. Patterned sapphire substrate; 20. Patterned sapphire substrate; 21. Pattern of the substrate; 210. Top surface; 2101. Protruding structure on the top surface; 211. Bottom surface; 212. Side; 2121. First side; 2122. Second side; 213. Depression; 2130. Inclined surface; 30. Mask pattern; raised.
具体实施方式 detailed description
下面将结合实施例和附图对本发明的具体实施作详细说明。 The specific implementation of the present invention will be described in detail below in conjunction with the embodiments and the accompanying drawings.
PSS一般采用干法刻蚀或湿法刻蚀制备。干法刻蚀主要是采用等离子体(ICP)轰击衬底表面制备图案,具有各向同性的特点,制备出的图形形貌可控,但是容易产生物理损伤,同时表面反射率较差,不利于进一步提高LED出光效率。湿法刻蚀主要是采用化学溶液腐蚀衬底制备图案,具有设备成本低、操作工艺简单、衬底表面反射率较高等优点,适于大规模工业生产使用。 PSS is generally prepared by dry etching or wet etching. Dry etching mainly uses plasma (ICP) to bombard the surface of the substrate to prepare patterns. It has the characteristics of isotropy and the shape of the prepared pattern is controllable, but it is prone to physical damage, and the surface reflectivity is poor, which is not conducive to Further improve the light-emitting efficiency of the LED. Wet etching mainly uses chemical solution to corrode the substrate to prepare patterns. It has the advantages of low equipment cost, simple operation process, and high reflectivity of the substrate surface, and is suitable for large-scale industrial production.
图1示出了蓝宝石晶格结构的俯视示意图,具体为六方晶格结构,其中常被应用的切面有A面、C面及R面。由于蓝宝石C面与Ⅲ-Ⅴ和Ⅱ-Ⅵ族沉积薄膜之间的晶格常数失配率较小,通常使用C面进行外延生长。采用湿法刻蚀蓝宝石衬底时,由于蓝宝石晶格结构的特性,刻蚀溶液仅能沿蓝宝石晶格方向腐蚀,通常形成三角锥型图案。图2~3显示了现有技术中湿法刻蚀获得的图案化蓝宝石衬底10,其工艺一般是在蓝宝石衬底的C面上形成诸如圆柱形的掩膜图案,然后进行湿法刻蚀。在前述刻蚀过程中,刻蚀溶液、刻蚀时间、刻蚀温度是三个主要参数,在刻蚀溶液和刻蚀温度一定时,刻蚀时间越长,所获得的衬底图案底部宽度越大,但是相邻衬底图案的间距会减小。 FIG. 1 shows a schematic top view of a sapphire lattice structure, specifically a hexagonal lattice structure, where A-plane, C-plane and R-plane are commonly used cutting planes. Due to the small lattice constant mismatch between the C-plane of sapphire and the III-V and II-VI deposited films, the C-plane is usually used for epitaxial growth. When wet etching the sapphire substrate, due to the characteristics of the sapphire lattice structure, the etching solution can only etch along the direction of the sapphire lattice, usually forming a triangular pyramid pattern. Figures 2 to 3 show a patterned sapphire substrate 10 obtained by wet etching in the prior art. The process is generally to form a cylindrical mask pattern on the C surface of the sapphire substrate, and then perform wet etching . In the aforementioned etching process, etching solution, etching time, and etching temperature are three main parameters. When the etching solution and etching temperature are constant, the longer the etching time, the wider the bottom width of the substrate pattern obtained. Large, but the spacing of adjacent substrate patterns will be reduced.
下面实施例公开一种图形化蓝宝石衬底,其在保持衬底图案的间距不变的情况下,增大了图案的底部宽度,增多了图案表面反射光线的反射面。 The following embodiment discloses a patterned sapphire substrate, which increases the width of the bottom of the pattern and increases the number of reflection surfaces for reflecting light on the surface of the pattern while keeping the spacing of the substrate pattern unchanged.
参看图4~6,一种图形化蓝宝石衬底20,具有相对的第一表面和第二表面,其中第一表面由一系列相互间隔的图案21排列而成。图案21的高度为0.8μm~3μm,其周期性排列的间距为0.1μm~10μm,相邻3个图案21排列成三角形。图案21具有顶面210、底面211、复数个侧面212和夹置于相邻侧面212和顶面210之间的凹陷区213,凹陷区213的深度和宽度自图案21的顶部向底部逐渐减小。 Referring to FIGS. 4-6 , a patterned sapphire substrate 20 has opposite first and second surfaces, wherein the first surface is formed by a series of mutually spaced patterns 21 . The height of the pattern 21 is 0.8 μm-3 μm, the pitch of the periodic arrangement is 0.1 μm-10 μm, and three adjacent patterns 21 are arranged in a triangle. The pattern 21 has a top surface 210, a bottom surface 211, a plurality of side surfaces 212, and a recessed region 213 sandwiched between adjacent side surfaces 212 and the top surface 210. The depth and width of the recessed region 213 gradually decrease from the top of the pattern 21 to the bottom. .
在本实施例中,图案顶面210为具有三个凸起结构2101的多边形平面,与衬底20的第一表面平行,且均为衬底的C面。具体的,图案顶面210与侧面212对应之处形成凸起结构2101,而与凹陷区213对应之处形成相邻凸起之间的凹陷结构2102。侧面212由倾斜度不同且分别位于图案21上部和下部的第一侧面2121和第二侧面2122组成,第一侧面2121的倾斜度小于第二侧面2122的倾斜度,第二侧面2122呈弧状。图案21的底面211具有三个转角α,转角α的连线呈弧状,使三个第二侧面2122呈弧状,转角α范围为105°~115°,底部宽度d范围为4μm~20μm。凹陷区213由两个倾斜面2130连接而成,更佳的,其于图案底面211上的投影呈三角形,两倾斜面2130呈轴对称设置,其夹角范围为90~150°,在其他变形实施例中,两倾斜面2130的尺寸也可根据需要设置。凹陷区213主要用于增大图案21表面反射光线的面积,其数目可根据需要设计成1~3个,本实施例中设置3个凹陷区213。 In this embodiment, the pattern top surface 210 is a polygonal plane with three protruding structures 2101 , parallel to the first surface of the substrate 20 , and all of them are the C-plane of the substrate. Specifically, the top surface 210 of the pattern corresponds to the side surface 212 to form a raised structure 2101 , and the place corresponding to the depressed area 213 forms a depressed structure 2102 between adjacent protrusions. The side 212 is composed of a first side 2121 and a second side 2122 with different inclinations located on the upper and lower parts of the pattern 21 respectively. The bottom surface 211 of the pattern 21 has three corners α, and the connecting line of the corners α is arc-shaped, so that the three second side surfaces 2122 are arc-shaped, the corner α ranges from 105° to 115°, and the bottom width d ranges from 4 μm to 20 μm. The depressed area 213 is formed by connecting two inclined surfaces 2130. More preferably, its projection on the bottom surface 211 of the pattern is triangular, and the two inclined surfaces 2130 are arranged axisymmetrically. In the embodiment, the size of the two inclined surfaces 2130 can also be set as required. The recessed areas 213 are mainly used to increase the area of the surface of the pattern 21 to reflect light, and the number of them can be designed to be 1-3 as required. In this embodiment, 3 recessed areas 213 are provided.
与图3所示的现有图形化蓝宝石衬底10的图案11相比,本实施例中,衬底20的图案21通过在其表面设置3个凹陷区213,增大其反射光线的面积,另外,图案底面211转角α比现有技术中的衬底图案11中对应的转角角度增大约10°,使图案21的底部宽度d随着增大,以增大图案21表面反射光线的面积,从而实现提高图形化蓝宝石衬底出光效率的效果。 Compared with the pattern 11 of the existing patterned sapphire substrate 10 shown in FIG. 3 , in this embodiment, the pattern 21 of the substrate 20 increases the area of reflected light by setting three recessed regions 213 on its surface, In addition, the rotation angle α of the bottom surface 211 of the pattern is increased by about 10° compared with the corresponding rotation angle of the substrate pattern 11 in the prior art, so that the width d of the bottom of the pattern 21 increases accordingly, so as to increase the area of the surface of the pattern 21 to reflect light. Therefore, the effect of improving the light extraction efficiency of the patterned sapphire substrate is achieved.
下面结合附图7~9对上述图形化蓝宝石衬底的制作方法做简单说明。 The method for fabricating the above-mentioned patterned sapphire substrate will be briefly described below in conjunction with accompanying drawings 7-9.
参看图7,图形化蓝宝石衬底的制作方法,具体包括如下步骤:S1、提供一蓝宝石平片衬底,具有相对的第一表面和第二表面,在第一表面上形成掩膜层,该掩膜层具有周期排列的掩膜图案,其中第一表面为蓝宝石衬底的C面,掩膜层排列于蓝宝石衬底的C面;S2、采用湿法刻蚀在第一表面上形成复数个周期性排列的相互间隔的图案21,如图4所示,其结构参考前面详细描述。其中,湿法刻蚀采用浓硫酸和磷酸混合液刻蚀蓝宝石衬底第一表面形成图型化蓝宝石衬底20,浓硫酸和磷酸的体积比为1:1~10:1,刻蚀时间为500s~3500s,刻蚀温度为150℃~300℃。 Referring to Fig. 7, the method for making a patterned sapphire substrate specifically includes the following steps: S1, providing a sapphire flat substrate, having opposite first surfaces and second surfaces, forming a mask layer on the first surface, the The mask layer has a mask pattern arranged periodically, wherein the first surface is the C surface of the sapphire substrate, and the mask layer is arranged on the C surface of the sapphire substrate; S2, using wet etching to form a plurality of The periodically spaced patterns 21 are shown in FIG. 4 , and its structure refers to the detailed description above. Wherein, the wet etching adopts the mixed solution of concentrated sulfuric acid and phosphoric acid to etch the first surface of the sapphire substrate to form the patterned sapphire substrate 20, the volume ratio of concentrated sulfuric acid and phosphoric acid is 1:1~10:1, and the etching time is 500s~3500s, etching temperature is 150℃~300℃.
在上述方法中,步骤S1形成的掩膜图案为形成图4所示图案的关键。参看图8和图9,掩膜图案30具有至少一个向外延伸的凹陷31,其对应于蓝宝石衬底的晶格方向(a1、a2、a3)。较佳的,该掩膜图案30还具有复数个向外延伸的凸起32,其对应于蓝宝石衬底的晶格方向之间。在本实施例中,凹陷31和凸起32交替排列,与蓝宝石的晶格方向数目一致,凸起31和凹陷32的数目均为3,在其他变形实施例中,凸起31和凹陷32的数目也可设置为1个或者2个。 In the above method, the mask pattern formed in step S1 is the key to forming the pattern shown in FIG. 4 . Referring to FIGS. 8 and 9 , the mask pattern 30 has at least one outwardly extending recess 31 corresponding to the crystal lattice directions ( a1 , a2 , a3 ) of the sapphire substrate. Preferably, the mask pattern 30 also has a plurality of outwardly extending protrusions 32 corresponding to the lattice directions of the sapphire substrate. In this embodiment, the depressions 31 and protrusions 32 are arranged alternately, which is consistent with the number of crystal lattice directions of sapphire, and the number of protrusions 31 and depressions 32 is 3. The number can also be set to 1 or 2.
图4所示的蓝宝石衬底表面图案21之凹陷区213的数目与掩膜图案30之凹陷31的数目对应,且凹陷区213的两倾斜面2130之间的夹角的大小与图案30中两相邻凸起32之间的夹角θ大小对应。相邻凸起32之间的夹角θ值可相同也可不同,范围为90°~150°。掩膜图案30的边缘与中心的距离范围为0.25μm~10μm,具体地,凹陷31边缘与中心的距离R1范围0.25μm~2.5μm,凸起32边缘与中心的距离R2的范围为0.75~10μm;掩膜图案30的高度范围为1μm~10μm,相邻掩膜图案30之间的间距范围为0.5μm~10μm,相邻3个掩膜图案30排列成三角形;掩膜层的材料为光阻、氧化物或金属。 The number of the recessed regions 213 of the sapphire substrate surface pattern 21 shown in FIG. The angle θ between adjacent protrusions 32 corresponds to the size. The angle θ between adjacent protrusions 32 can be the same or different, and the range is 90°~150°. The distance between the edge and the center of the mask pattern 30 ranges from 0.25 μm to 10 μm, specifically, the distance R1 between the edge and the center of the depression 31 ranges from 0.25 μm to 2.5 μm, and the distance R2 between the edge and the center of the protrusion 32 ranges from 0.75 μm to 10 μm The height of the mask pattern 30 ranges from 1 μm to 10 μm, the distance between adjacent mask patterns 30 ranges from 0.5 μm to 10 μm, and three adjacent mask patterns 30 are arranged in a triangle; the material of the mask layer is photoresist , oxides or metals.
本实施例中,掩膜层的图案30大致呈“风车”状,其至少具有一个向外延伸且对应于蓝宝石衬底的晶格方向的凹陷31,以及复数个向外延伸且对应于蓝宝石衬底的晶格方向之间的凸起32,如此,在步骤S2的湿法刻蚀过程中,刻蚀的化学腐蚀溶液沿凹陷31处刻蚀速率较快,而沿凸起32处刻蚀速率较慢,使刻蚀结束后形成的图形化蓝宝石衬底20的图案21具有三个反射光线的凹陷区213,并且图案21的底部宽度d增大,提高图案21的反光面积,提高图形化蓝宝石衬底20的出光效率。 In this embodiment, the pattern 30 of the mask layer is roughly in the shape of a "windmill", which has at least one depression 31 extending outward and corresponding to the crystal lattice direction of the sapphire substrate, and a plurality of depressions 31 extending outward and corresponding to the sapphire substrate. The protrusions 32 between the crystal lattice directions of the bottom, so, in the wet etching process of step S2, the etching rate of the etching chemical etching solution is faster along the recess 31, and the etching rate is faster along the protrusion 32. Slower, so that the pattern 21 of the patterned sapphire substrate 20 formed after the etching has three light-reflecting recessed regions 213, and the bottom width d of the pattern 21 increases to improve the reflective area of the pattern 21 and improve the patterned sapphire pattern. The light extraction efficiency of the substrate 20.
图10显示了根据本发明实施的一种制作发光二极管的流程图,包括步骤S1~S4,其中步骤S1~S2形成图形化蓝宝石衬底,步骤S3为采用PVD法在图形化蓝宝石衬底20上形成AlN层,步骤S4为在AlN层外延生长发光外延层。下面对各步骤进行简单说明,其中步骤S1~S2参考前述说明即可。 Fig. 10 has shown a kind of flow chart of making light-emitting diode according to the present invention, comprises step S1~S4, wherein step S1~S2 forms patterned sapphire substrate, and step S3 is to adopt PVD method on the patterned sapphire substrate 20 Forming an AlN layer, step S4 is to epitaxially grow a light-emitting epitaxial layer on the AlN layer. Each step is briefly described below, and steps S1 to S2 can be referred to the foregoing description.
S3、采用PVD法在步骤S1~S2的方法形成的图形化蓝宝石衬底20的表面上形成一AlN层;该层的厚度为10埃~200埃。 S3. Form an AlN layer on the surface of the patterned sapphire substrate 20 formed by the method in steps S1-S2 by PVD method; the thickness of this layer is 10-200 angstroms.
S4、采用外延生长方式,依次生长缓冲层、N型半导体层、发光层和P型半导体层,其中缓冲层为基于Ⅲ族氮化物的材料,优选采用氮化镓,还可以采用氮化铝材料或者铝镓氮材料;N型半导体层优选为氮化镓,也可采用铝镓氮材料,硅掺杂优选浓度为1×1019cm-3;发光层为优选为具有至少一个量子阱结构,较佳的为具有5~50对量子阱构成;P层半导体层优选为氮化镓,采用镁掺杂,掺杂浓度为1×1019~5×1021cm-3,较佳的P型半导体层为多层结构,包括P型电子阻挡层、P型导电层和P型接触层,其中P型电子阻挡层紧临发光层,用于阻挡电子进入P型层与空穴复合,优选采用铝镓氮材料,厚度可为50nm~200nm。 S4. Using epitaxial growth, sequentially grow a buffer layer, an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer, wherein the buffer layer is a material based on group III nitride, preferably gallium nitride, and aluminum nitride material can also be used Or aluminum gallium nitride material; the N-type semiconductor layer is preferably gallium nitride, and aluminum gallium nitride material can also be used, and the silicon doping concentration is preferably 1×10 19 cm -3 ; the light emitting layer preferably has at least one quantum well structure, Preferably, it has 5-50 pairs of quantum wells; the P-layer semiconductor layer is preferably gallium nitride, doped with magnesium, and the doping concentration is 1×10 19 ~5×10 21 cm -3 , preferably P-type The semiconductor layer is a multilayer structure, including a P-type electron blocking layer, a P-type conductive layer and a P-type contact layer, wherein the P-type electron blocking layer is adjacent to the light-emitting layer, and is used to prevent electrons from entering the P-type layer and recombining holes. AlGaN material, the thickness can be 50nm~200nm.
图11显示了采用图10所示制作方法形成的发光二极管,其结构包括:图形化蓝宝石衬底20、AlN层40、缓冲层50、N型半导体层60、发光层70和P型半导体层80。在该发光二极管中,采用的图形化蓝宝石衬底20的每个图案21的表面增设3个凹陷区213,并且其底部宽度增大,以增大图案21表面反射光线面积,从而提高图形化蓝宝石衬底20的出光效率。 Fig. 11 shows the light-emitting diode formed by the manufacturing method shown in Fig. 10, and its structure includes: patterned sapphire substrate 20, AlN layer 40, buffer layer 50, N-type semiconductor layer 60, light-emitting layer 70 and P-type semiconductor layer 80 . In this light-emitting diode, the surface of each pattern 21 of the patterned sapphire substrate 20 adopted is provided with three recessed areas 213, and the width of the bottom thereof is increased to increase the area of reflected light on the surface of the pattern 21, thereby improving the patterned sapphire The light extraction efficiency of the substrate 20.
应当理解的是,上述具体实施方案为本发明的优选实施例,本发明的范围不限于该实施例,凡依本发明所做的任何变更,皆属本发明的保护范围之内。 It should be understood that the above specific implementation is a preferred embodiment of the present invention, the scope of the present invention is not limited to this embodiment, and any changes made according to the present invention are within the protection scope of the present invention.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101330002A (en) * | 2007-06-20 | 2008-12-24 | 中国科学院半导体研究所 | Fabrication method of patterned sapphire substrate for nitride epitaxial growth |
US8247822B2 (en) * | 2008-09-11 | 2012-08-21 | Huga Optotech Inc. | Semiconductor light-emitting device |
CN103069541A (en) * | 2010-08-06 | 2013-04-24 | 日亚化学工业株式会社 | Sapphire substrate and semiconductor light emitting device |
-
2015
- 2015-11-03 CN CN201510735204.4A patent/CN105226152A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101330002A (en) * | 2007-06-20 | 2008-12-24 | 中国科学院半导体研究所 | Fabrication method of patterned sapphire substrate for nitride epitaxial growth |
US8247822B2 (en) * | 2008-09-11 | 2012-08-21 | Huga Optotech Inc. | Semiconductor light-emitting device |
CN103069541A (en) * | 2010-08-06 | 2013-04-24 | 日亚化学工业株式会社 | Sapphire substrate and semiconductor light emitting device |
Non-Patent Citations (1)
Title |
---|
HAIYONG GAO等: ""Improvement of GaN-based light emitting diodes performance grown on sapphire substrates patterned by wet echching"", 《SOLID STATE LIGHTING AND 《SOLAR ENERGY TECHNOLOGIES》 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017076119A1 (en) * | 2015-11-03 | 2017-05-11 | 厦门市三安光电科技有限公司 | Patterned sapphire substrate, light emitting diode, and manufacturing methods therefor |
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