CN105204251B - A display substrate and its manufacturing method and display device - Google Patents

Abstract

The present invention provides a kind of display base plate and preparation method thereof and display devices, influence display effect because the leaping voltage using pixel electrode caused by COA technology is excessive in the prior art to solve the problems, such as.The display base plate includes underlay substrate, the grid line, data line of arranged crosswise and the pixel unit arranged in arrays marked off by the grid line and the data line on the underlay substrate, and thin film transistor (TFT), pixel electrode, color film layer and public electrode wire are provided in each pixel unit；Wherein, at least one described pixel unit further includes the metal wire with the public electrode wire insulation set, the metal wire on orthographic projection direction at least partly with the public electrode line overlap.

Description

A display substrate and its manufacturing method and display device

technical field

The present invention relates to the field of display technology, and in particular, to a display substrate, a manufacturing method thereof, and a display device.

Background technique

Thin Film Transistor Liquid Crystal Display (TFT-LCD) has the characteristics of small size, low power consumption, and no radiation. It has developed rapidly in recent years and occupies a dominant position in the current flat panel display market. TFT-LCD has been widely used in various large, medium and small size products, almost covering the main electronic products of today's information society, such as LCD TVs, high-definition digital TVs, computers, mobile phones, car displays, projection displays, cameras , digital cameras, electronic watches, calculators, electronic instruments, meters, public displays and unreal displays, etc.

TFT-LCD consists of liquid crystal display panel, driving circuit and backlight module. Liquid crystal display panel is an important part of TFT-LCD. In order to improve the aperture ratio and reduce the difficulty of the cell assembling process, the COA (Color Filter on Array) technology is generally used to prepare the color layer on the array substrate to form the COA substrate including the thin film transistor and the color filter layer, as shown in Figure 1. FIG. 1 is a schematic structural diagram of a COA substrate in the prior art. As shown in FIG. 1 , the conventional COA substrate includes a base substrate 101, a gate line 102, a data line 103, a thin film transistor 104, a color filter layer 105, and a passivation layer. 106 (see Figure 2) and a transparent conductive layer 107 (see Figure 2).

For a display panel with a twisted nematic (TN) liquid crystal display mode, as shown in Figure 2, after the color filter layer is fabricated, in order to ensure the display effect, the color filter layer and the black matrix will partially overlap , the overlapping width is about 7.5 μm, and since the common electrode line 108 is almost flush with the black matrix, the color filter layer will cover part of the common electrode line, so that the distance between the transparent conductive layer and the common electrode line increases. According to the definition of capacitance, when the distance between the transparent conductive layer and the common electrode line increases, the coupling capacitance C _st between the transparent conductive layer and the common electrode line decreases, which in turn leads to the jump variable ΔV of the jump voltage of the pixel electrode. The increase of _p will affect the display effect.

SUMMARY OF THE INVENTION

Embodiments of the present invention provide a display substrate, a manufacturing method thereof, and a display device, which are used to solve the problem in the prior art that the jump voltage of the pixel electrode is too large due to the adoption of the COA technology, which affects the display effect.

An embodiment of the present invention provides a display substrate, the display substrate includes a base substrate, gate lines and data lines that are arranged in a cross manner on the base substrate, and a pattern formed by the gate lines and the data lines. pixel units arranged in a matrix, each pixel unit is provided with a thin film transistor, a pixel electrode, a color filter layer and a common electrode line;

At least one of the pixel units further includes a metal line insulated from the common electrode line, and the metal line at least partially overlaps the common electrode line in the orthographic projection direction.

The display substrate provided by the embodiment of the present invention includes a base substrate, gate lines and data lines arranged in a cross manner on the base substrate, and pixel units arranged in a matrix and divided by the gate lines and the data lines. , each of the pixel units is provided with a thin film transistor, a pixel electrode, a color filter layer and a common electrode line; at least one of the pixel units also includes a metal line insulated from the common electrode line, the metal line is in the positive The projection direction at least partially overlaps with the common electrode line, so that the metal line and the common electrode line form a compensation capacitance for compensating the coupling capacitance C _st between the transparent conductive layer and the common electrode line, which solves the problem of existing Since the coupling capacitance C _st between the transparent conductive layer and the common electrode line decreases, the jump variable ΔV _p of the jump voltage of the pixel electrode increases, which improves the display effect of the display panel.

Preferably, every two adjacent pixel units constitute a pixel unit group, and one pixel unit corresponds to only one pixel unit group; wherein each row of pixel unit groups is provided with a grid above and below the pixel unit group respectively. The gate line of the pole signal;

In each pixel unit group, one pixel unit is driven by the gate line located above the pixel unit group, and the other pixel unit is driven by the gate line located below the pixel unit group.

Preferably, the metal lines are located above the common electrode lines.

When the metal line is located above the common electrode line, the facing area between the metal line and the common electrode line can be increased, so that the compensation capacitance between the metal line and the common electrode line is increased. In addition, when the metal line is located above the common electrode line, it is convenient for the metal line to be electrically connected to the thin film transistor or the pixel electrode, so that the metal line and the pixel electrode have the same potential, and are formed to make the metal line and the pixel electrode have the same potential. The metal line and the common electrode line form a compensation capacitance for compensating for the coupling capacitance C _st between the transparent conductive layer and the common electrode line.

Preferably, the thin film transistor comprises: a gate on the base substrate, a gate insulating layer on the gate, an active layer on the insulating layer, and a gate on the active layer. A source electrode and a drain electrode, the common electrode line is provided in the same layer as the gate electrode, and the metal line is provided in the same layer as the source electrode and the drain electrode.

In the process of manufacturing the display substrate, the common electrode line is arranged in the same layer as the gate electrode, and the metal line is arranged in the same layer as the source electrode and the drain electrode, and the common electrode line can be formed in one process The formation of the metal line and the source electrode and the drain electrode in one process with the gate electrode not only facilitates the simplification of the manufacturing process, but also shortens the manufacturing cycle, improves the production efficiency, and reduces the production cost.

Preferably, the metal wire is electrically connected to the drain.

When the metal line is electrically connected to the drain, the metal line can obtain the same potential as the pixel electrode, form a compensation capacitor together with the common electrode line, and eliminate the influence of COA technology on the jump voltage of the pixel electrode.

Preferably, in each of the pixel unit groups, the metal lines of two adjacent pixel units are insulated and arranged.

In each of the pixel unit groups, the metal lines of two adjacent pixel units are insulated and arranged, so that the compensation capacitance of each pixel unit is only related to the driving voltage of the pixel electrode in the pixel unit, which is beneficial to improve the accuracy of compensation , to improve the display quality.

Based on the same inventive concept, an embodiment of the present invention further provides a display device, the display device comprising the above-mentioned display substrate.

Based on the same inventive concept, an embodiment of the present invention also provides a method for fabricating a display substrate, the method comprising the steps and formation of data lines, scan lines, color filter layers, pixel electrodes and common electrode lines on a base substrate The step of the thin film transistor, the color filter layer, the pixel electrode, the common electrode line and the thin film transistor are all formed in a plurality of pixel units surrounded by the scan line and the data line; The step of electrode line insulating metal lines, the metal lines at least partially overlap with the common electrode lines in the orthographic direction.

A display substrate formed by the method for manufacturing a display substrate provided by an embodiment of the present invention includes a base substrate, gate lines and data lines that are arranged in a cross manner on the base substrate, and divided by the gate lines and the data lines The pixel units are arranged in a matrix, and each pixel unit is provided with a thin film transistor, a pixel electrode, a color filter layer and a common electrode line; the pixel unit also includes a metal line insulated from the common electrode line, The metal line at least partially overlaps the common electrode line in the orthographic projection direction, so that the metal line and the common electrode line form a compensation capacitance for compensating for the coupling between the transparent conductive layer and the common electrode line The capacitance C _st solves the problem that the jump variable ΔV _p of the jump voltage of the pixel electrode increases due to the decrease of the coupling capacitance C _st between the transparent conductive layer and the common electrode line, and improves the display effect of the display panel.

Preferably, every two adjacent pixel units constitute a pixel unit group, and one pixel unit corresponds to only one pixel unit group; wherein each row of pixel unit groups is provided with a grid above and below the pixel unit group respectively. The gate line of the pole signal;

In each pixel unit group, one pixel unit is driven by the gate line located above the pixel unit group, and the other pixel unit is driven by the gate line located below the pixel unit group.

For the display substrate of the double gate structure, there is no data line in the middle area of each pixel unit group, so the metal line can be arranged in the area between the two pixel units, so that the metal line can be connected with the The source electrode and the drain electrode are fabricated at the same time, thereby shortening the fabrication cycle and reducing the production cost.

Preferably, the step of forming the thin film transistor includes:

forming a pattern including a gate on the base substrate;

forming a gate insulating layer on the substrate including the pattern of gate electrodes;

forming a pattern including an active layer on a substrate including the gate insulating layer;

A pattern including a source electrode and a drain electrode is formed on the substrate including the pattern of the active layer.

In the above-mentioned method of forming a thin film transistor, the common electrode line and the gate line are arranged in the same layer, and the metal line is arranged in the same layer as the source electrode and the drain electrode, which is conducive to simplifying the manufacturing process and shortening the production time. cycle, improve production efficiency and reduce production costs.

Preferably, the method specifically includes:

forming a pattern including a gate electrode and a common electrode line on the base substrate;

forming a gate insulating layer on the substrate including the pattern of gate and common electrode lines;

forming a pattern including an active layer on a substrate including the gate insulating layer;

forming the pattern including the source electrode, the drain electrode and the metal line on the substrate including the pattern of the active layer;

forming a pattern including a color filter layer on the substrate including the pattern of the source electrode, the drain electrode and the metal line;

A pattern including pixel electrodes is formed on the substrate including the pattern of the color filter layer.

Preferably, before forming the pattern including the pixel electrode, the method further includes:

A passivation layer is formed on the substrate including the pattern of the color filter layer.

By forming the passivation layer on the substrate including the pattern of the color filter layer, the color filter layer and the thin film transistor can be protected from being damaged in the subsequent preparation process, which is beneficial to improve the display effect.

Description of drawings

1 is a top plan view of a display substrate in the prior art;

Fig. 2 is the sectional structure diagram along the A-A' direction in Fig. 1;

FIG. 3 is a top plan view of a display substrate according to Embodiment 1 of the present invention;

Fig. 4 is the sectional structure diagram along D-D' direction in Fig. 3;

5-9 are schematic flowcharts of manufacturing a display substrate according to Embodiment 2 of the present invention.

Detailed ways

Embodiments of the present invention provide a display substrate, a manufacturing method thereof, and a display device, which are used to solve the problem in the prior art that the jump voltage of the pixel electrode is too large due to the adoption of the COA technology, which affects the display effect.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, but not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

Embodiment 1 of the present invention provides a display substrate, see FIGS. 3 and 4 ; it can be seen from FIG. 3 and FIG. 4 that the display substrate includes a base substrate 31 , grids arranged in a cross on the base substrate 31 . Line 32, data line 33, and pixel units arranged in a matrix divided by the gate line 32 and the data line 33, each pixel unit is provided with a thin film transistor 34, a pixel electrode 35 (see FIG. 4) , color filter layer 36 and common electrode line 37;

At least one of the pixel units further includes a metal line 38 disposed insulated from the common electrode line 37 , and the metal line 38 at least partially overlaps the common electrode line 37 in the orthographic direction.

The display substrate provided by the embodiment of the present invention includes a base substrate, gate lines and data lines arranged in a cross manner on the base substrate, and pixel units arranged in a matrix and divided by the gate lines and the data lines. , each of the pixel units is provided with a thin film transistor, a pixel electrode, a color filter layer and a common electrode line; at least one of the pixel units also includes a metal line insulated from the common electrode line, the metal line is in the positive The projection direction at least partially overlaps with the common electrode line, so that the metal line and the common electrode line form a compensation capacitance for compensating the coupling capacitance C _st between the transparent conductive layer and the common electrode line, which solves the problem of existing Since the coupling capacitance C _st between the transparent conductive layer and the common electrode line decreases, the jump variable ΔV _p of the jump voltage of the pixel electrode increases, which improves the display effect of the display panel.

It can also be seen from FIG. 3 that the display substrate provided by the first embodiment of the present invention is a display substrate with a double gate structure, wherein every two adjacent pixel units constitute a pixel unit group, and one pixel unit corresponds to only one pixel A unit group; wherein a gate line for providing gate signals for the pixel unit group is respectively provided above and below each row of pixel unit groups;

In each pixel unit group, one pixel unit is driven by the gate line located above the pixel unit group, and the other pixel unit is driven by the gate line located below the pixel unit group.

For the display substrate with double gate structure, there is no data line in the middle area of each pixel unit group, so the metal line 38 can be arranged in the area between the two pixel units, so that the metal line can be connected with all the pixel units. The source electrode and the drain electrode are fabricated at the same time, thereby shortening the fabrication cycle and reducing the production cost.

Further, the metal wire 38 is located above the common electrode wire 37 .

When the metal line is located above the common electrode line, the facing area between the metal line and the common electrode line can be increased, so that the compensation capacitance between the metal line and the common electrode line is increased. In addition, when the metal line is located above the common electrode line, it is convenient for the metal line to be electrically connected to the thin film transistor or the pixel electrode, so that the metal line and the pixel electrode have the same potential, and are formed to make the metal line and the pixel electrode have the same potential. The metal line and the common electrode line form a compensation capacitance for compensating for the coupling capacitance C _st between the transparent conductive layer and the common electrode line.

In the embodiment of the present invention, the thin film transistor 34 includes a gate electrode (not shown in the figure) located on the base substrate, a gate insulating layer 42 located above the gate electrode, and a gate insulating layer 42 located above the gate insulating layer 42 . Active layer (not shown in the figure), source electrode (not shown in the figure) and drain electrode (not shown in the figure) above the active layer; wherein, the common electrode line 37 is the same as the gate electrode layer arrangement, the metal line is arranged in the same layer as the source electrode and the drain electrode.

Therefore, in the process of fabricating the display substrate, the common electrode line is arranged in the same layer as the gate electrode, and the metal line is arranged in the same layer as the source electrode and the drain electrode, and the common electrode line can be formed in one process. The electrode line and the gate, and the metal line, the source electrode and the drain electrode are formed by one process, which not only facilitates simplifying the manufacturing process, but also shortens the manufacturing cycle, improves the production efficiency, and reduces the production cost. In addition, when the common electrode line is arranged in the same layer as the gate, and the metal line is arranged in the same layer as the source and drain electrodes, only a gate insulating layer exists between the metal line and the common electrode line. , the spacing is small, so when there is a small overlap area between the two, a larger capacitance can be obtained. Therefore, the common electrode line in the embodiment of the present invention can adopt a thin line design, and because the display substrate adopts the COA technology, there is no need to consider the problem of cell offset, and the black matrix can be narrowed with the thinning of the common electrode line. The aperture ratio can be further improved without affecting the display effect.

Further, the metal wire 38 is made of the same material as the source electrode and the drain electrode, and the materials generally selected in the current process are non-transparent metals such as Cr, W, Ti, Ta, Mo, Al, Cu and their alloys. .

Further, the metal wire 38 is electrically connected to the drain.

When the metal line 38 is electrically connected to the drain, the metal line 38 can obtain the same potential as the pixel electrode 35, and form a compensation capacitor together with the common electrode line 37, eliminating the jump of the COA technology on the pixel electrode influence of voltage.

Further, in each of the pixel unit groups, the metal lines 38 of two adjacent pixel units are provided in isolation.

By insulating the metal lines of two adjacent pixel units in each pixel unit group, the compensation capacitance of each pixel unit is only related to the driving voltage of the pixel electrode in the pixel unit, which is beneficial to improve the accuracy of compensation to improve display quality.

Further, in order to protect the color filter layer from being damaged in the subsequent preparation process and improve the display effect of the display substrate, the display substrate further includes a passivation disposed above the color filter layer for protecting it from damage. Layer 39. In addition, in order to provide a driving signal for the pixel electrode 35 through a thin film transistor, a via hole (not shown in the figure) is provided in the passivation layer 39 at a position corresponding to the pixel electrode 35 and the drain electrode, so that the The pixel electrode 35 is electrically connected to the drain of the thin film transistor; in addition, the passivation layer 39 can also protect the thin film transistor from damage.

Based on the same inventive concept, the second embodiment of the present invention further provides a method for manufacturing a display substrate, the method comprising:

Steps of forming data lines, scan lines, pixel electrodes and common electrode lines on the base substrate and steps of forming thin film transistors, wherein the pixel electrodes, common electrode lines and thin film transistors are all formed around the scan lines and data lines forming a plurality of pixel units; the method further includes the step of forming a metal line insulated from the common electrode line, the metal line at least partially overlapping the common electrode line in the orthographic direction.

Further, every two adjacent pixel units constitute a pixel unit group, and one pixel unit corresponds to only one pixel unit group; wherein each row of pixel unit groups is provided with a grid above and below the pixel unit group respectively. signal gate lines;

In each pixel unit group, one pixel unit is driven by the gate line located above the pixel unit group, and the other pixel unit is driven by the gate line located below the pixel unit group.

For the display substrate of the double gate structure, there is no data line in the middle area of each pixel unit group, so the metal line can be arranged in the area between the two pixel units, so that the metal line can be connected with the The source electrode and the drain electrode are fabricated at the same time, thereby shortening the fabrication cycle and reducing the production cost.

Wherein, the step of forming the thin film transistor specifically includes:

forming a pattern including a gate on the base substrate;

forming a gate insulating layer on the substrate including the pattern of gate electrodes;

forming a pattern including an active layer on a substrate including the gate insulating layer;

A pattern including a source electrode and a drain electrode is formed on the substrate including the pattern of the active layer.

In the above-mentioned method of forming a thin film transistor, the common electrode line and the gate line are arranged in the same layer, and the metal line is arranged in the same layer as the source electrode and the drain electrode, which is conducive to simplifying the manufacturing process and shortening the production time. cycle, improve production efficiency and reduce production costs. In addition, when the common electrode line is arranged in the same layer as the gate, and the metal line is arranged in the same layer as the source and drain electrodes, only a gate insulating layer exists between the metal line and the common electrode line. , the spacing is small, so when there is a small overlap area between the two, a larger capacitance can be obtained. Therefore, the common electrode line in the embodiment of the present invention can adopt a thin line design, and because the display substrate adopts the COA technology, there is no need to consider the problem of cell offset, and the black matrix can be narrowed with the thinning of the common electrode line. The aperture ratio can be further improved without affecting the display effect.

Further, before forming the pattern including the pixel electrode, the method further includes:

A passivation layer is formed on the substrate including the pattern of the color filter layer.

By forming the passivation layer on the substrate including the pattern of the color filter layer, the color filter layer can be protected from being damaged in the subsequent preparation process, which is beneficial to improve the display effect.

Taking the display substrate provided in the first embodiment of the present invention as an example, the method for manufacturing the display substrate by using the method provided by the present invention specifically includes:

The first step, referring to FIG. 5 , is to form a pattern including gate electrodes (not shown in FIG. 5 ), gate lines (not shown in FIG. 5 ) and common electrode lines 37 on the base substrate 31 ; this step specifically includes:

On the base substrate 31, form (such as sputtering or coating, etc.) a layer of metal film for forming gate electrodes, gate lines and common electrode lines 37; then, coat a layer of photoresist on the metal film; then and exposing the photoresist with a mask plate provided with patterns including gates, gate lines and common electrode lines; finally, after developing and etching, a pattern including gates, gate lines and common electrode lines is formed. In the manufacturing method of the display substrate in this embodiment, the manufacturing process involving the film layer formed by the patterning process is the same, and will not be described in detail hereafter.

In the present invention, the patterning process may only include a photolithography process, or may include a photolithography process and an etching step, and may also include other processes for forming predetermined patterns such as printing and inkjet; the photolithography process refers to The process of forming patterns using photoresist, mask, exposure machine, etc., including film formation, exposure, development and other processes. Corresponding patterning processes can be selected according to the structures formed in the present invention.

In the second step, referring to FIG. 6 , a silicon nitride (SiN _x ) or silicon oxide (SiO _x ) layer is deposited on the substrate including the pattern of the gate electrode and the common electrode line 37 to form a gate insulating layer 42 .

The third step is to form a pattern including the active layer on the substrate including the gate insulating layer 42; this step specifically includes:

An amorphous silicon thin film layer is formed over the gate insulating layer 42 by plasma enhanced chemical vapor deposition or other similar methods, and then the amorphous silicon is crystallized through a laser annealing process or a solid phase crystallization process to form polycrystalline silicon A thin film layer is formed, and a pattern including a low temperature polysilicon active layer is formed by a patterning process; the pattern of the active layer is formed on the gate insulating layer 42 .

The fourth step, referring to FIG. 7 , is to deposit a metal layer on the substrate including the pattern of the active layer, and then process it through a patterning process to form a pattern including the source electrode, the drain electrode and the metal line 38 .

The fifth step, referring to FIG. 8 , forms a pattern including the color filter layer 36 on the substrate including the pattern of the source electrode, the drain electrode and the metal line 38 .

In the sixth step, referring to FIG. 9 , a passivation layer 39 is formed on the substrate including the pattern of the color filter layer 36 , and a via hole is formed at the position corresponding to the pixel electrode 35 and the drain through a patterning process, so that The pixel electrode 35 is electrically connected to the drain electrode.

In the seventh step, referring to FIG. 4 , a layer of indium tin oxide (ITO) transparent conductive film is deposited on the passivation layer 39 by the magnetron sputtering method, and the patterning process is performed, that is, after the photoresist is coated and exposed and developed, the After wet etching and stripping, a pattern including the pixel electrode 35 is formed; the via hole is filled with conductive material for forming the pixel electrode, and the pixel electrode 35 is electrically connected to the drain through the via hole.

Based on the same inventive concept described above, an embodiment of the present invention further provides a display device including the above-mentioned display substrate.

To sum up, the embodiments of the present invention provide a display substrate and a display device, the display substrate includes a base substrate, gate lines and data lines that are arranged crosswise on the base substrate, and the gate lines and The pixel units divided by the data lines are arranged in a matrix, and each of the pixel units is provided with a thin film transistor, a pixel electrode, a color filter layer and a common electrode line; the pixel unit also includes a line insulated from the common electrode line. set metal lines, the metal lines at least partially overlap with the common electrode lines in the orthographic projection direction, so that the metal lines and the common electrode lines form a compensation capacitance for compensation, the transparent conductive layer and the common electrode The coupling capacitance C _st between the lines solves the problem that the jump variable ΔV _p of the jump voltage of the pixel electrode increases due to the decrease of the coupling capacitance C _st between the transparent conductive layer and the common electrode line, and improves the display The display effect of the panel.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention. Thus, provided that these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims (5)

1. a kind of display base plate, the display base plate include underlay substrate, on the underlay substrate arranged crosswise grid line, number According to line and the pixel unit arranged in arrays marked off by the grid line and the data line, which is characterized in that the picture Plain unit is provided with thin film transistor (TFT), pixel electrode, color film layer and public electrode wire；

At least one described pixel unit further includes the metal wire with the public electrode wire insulation set, and the metal wire is just On projecting direction at least partly with the public electrode line overlap；

Every two adjacent pixel unit constitutes a pixel unit group, and a pixel unit only corresponds to a pixel unit group； It is wherein respectively arranged with one above and below every one-row pixels unit group and provides the grid of grid signal for the pixel unit group Line；

In each pixel unit group, a pixel unit is driven by being located at the grid line above the pixel unit group, one other pixel Unit is driven by being located at the grid line below the pixel group；

In each pixel unit group, the wire insulation of two adjacent pixel units is arranged.

2. display base plate as described in claim 1, which is characterized in that the metal wire is located at the upper of the public electrode wire Side.

3. display base plate as described in claim 1, the thin film transistor (TFT) includes: the grid on the underlay substrate, The gate insulation layer above the grid, the active layer above the insulating layer, the source electrode above the active layer And drain electrode, which is characterized in that

The public electrode wire and the grid same layer are arranged, and the metal wire and the source electrode and drain electrode same layer are arranged.

4. display base plate as claimed in claim 3, which is characterized in that the metal wire is electrically connected with the drain electrode.

5. a kind of display device, which is characterized in that the display device includes aobvious as described in any claim of Claims 1 to 4 Show substrate.