CN104993701B - PWM/PFM control circuit - Google Patents
PWM/PFM control circuit Download PDFInfo
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- CN104993701B CN104993701B CN201510436076.3A CN201510436076A CN104993701B CN 104993701 B CN104993701 B CN 104993701B CN 201510436076 A CN201510436076 A CN 201510436076A CN 104993701 B CN104993701 B CN 104993701B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a PWM/PFM control circuit comprising a feedback circuit, an error amplifier, a PWM comparator, an oscillator, and an oscillator frequency control circuit. The feedback circuit samples an output voltage of a power conversion circuit, and generates a feedback voltage reflecting the output voltage. The error amplifier obtains an error amplification voltage based on the error between a reference voltage and the feedback voltage. The oscillator generates a triangular wave oscillation signal. The PWM comparator is used for comparing the triangular wave oscillation signal and the error amplification voltage to output a control signal. The oscillator frequency control circuit outputs a corresponding current signal to the oscillator based on the error amplification voltage. The oscillator adjusts the magnitude of the charging current of the oscillator based on the current signal in order to change the frequency of the triangular wave oscillation signal output by the oscillator. Compared with the prior art, the PWM/PFM control circuit of the invention not only can realize continuous switching transition from PFM to PWM, but also can further reduce the minimum value of frequency under a PFM mode.
Description
【Technical field】
The present invention relates to electric power management circuit field, the PWM/PFM in more particularly to a kind of switch power converter circuit
Control circuit.
【Background technology】
Present many switch power converters (such as, voltage descending DC-DC converter) all include two kinds of mode of operations：
PWM (Pulse Width Modulation) patterns and PFM (Pulse Frequency Modulation) pattern.General load
When heavier, switch power converter works in a PWM mode, so that it is operated under fixed upper frequency, maintains relatively low
Output voltage ripple.But due to controlling the switching loss of circuit generally large in a PWM mode, therefore, generally when load compared with
When light, switch power converter works under being switched to PFM patterns, as load lightens, its working frequency step-down, control circuit
The average value of switching loss step-down with frequency reduction.Because the control circuit of traditional compatible PWM mode and PFM patterns exists
It is mutation process when both of which switches, therefore, when load current is near switching point, system is easily unstable, causes to cut
The output voltage ripple changed near a little is significantly increased.U.S. Patent application US2009/0033305A1 discloses a kind of improved
PWM/PFM controls circuit, and its operation principle is to produce a PFM control signal A for minimum ON time, and electricity is controlled by PWM
Road produces pwm control signal B, and a time difference signal is produced by signal A and B, then right within the time period of this time difference
Oscillator suspension charges, so that the cycle of delay generator, the cycle oscillator after delay is equal to oscillator under original PWM mode
Cycle, plus the time span of this time difference, can realize the seamless continuous switching transition of PFM to PWM in this way, so that
Make that output is more stable, output voltage ripple is smaller in switching.But, it can be seen from this principle, maximum time difference length
High level time (i.e. minimum ON time) equal to PFM control signals A, this time most long being usually no more than under PWM mode is shaken
The half of device cycle time is swung, therefore, frequency reducing is to greatest extent the cycle oscillator under 1.5 times of PWM modes, that is, be downconverted to 1/
Frequency of oscillation under 1.5=2/3 times of PWM mode, so causes the average value to the lower switching loss of relatively light load still larger, most
Limiting case is unloaded, the stand-by power consumption in order to further reduce under lighter load or under zero load, it is necessary to further reduce PFM
Frequency minimum under pattern.
Therefore, it is necessary to propose a kind of improved technical scheme to solve the above problems.
【The content of the invention】
It is an object of the invention to provide a kind of PWM/PFM control circuits, it can not only realize that PFM to PWM's is continuous
Switching transition, but also the frequency minimum under PFM patterns can be further reduced, so as to reduce the power consumption under lighter load
And/or the stand-by power consumption under zero load.
To achieve these goals, the present invention proposes a kind of PWM/PFM controls circuit, and it has pwm pattern and PFM
Control model, the PWM/PFM controls circuit includes feedback circuit, error amplifier, PWM comparators, oscillator and oscillator
Frequency control circuit.The output voltage VO of one power-switching circuit of the feedback circuit sampling simultaneously forms the reflection output voltage
The feedback voltage of VO, the control signal that the power-switching circuit is based on PWM/PFM control circuit outputs turns an input voltage
Change the output voltage VO into；Error of the error amplifier based on a reference voltage V REF and feedback voltage obtains error and puts
Big voltage；The oscillator produces triangular wave oscillation signal；The PWM comparators be used for compare the triangular wave oscillation signal and
The error amplifies voltage to export the control signal；The oscillator frequency control circuit is based on the error and amplifies voltage
Corresponding current signal is exported to the oscillator, the oscillator is based on the charging that the current signal adjusts the oscillator
The size of electric current, to change the frequency of the triangular wave oscillation signal that the oscillator is exported.
Further, the oscillator frequency control circuit includes the first reference voltage VRH and the second reference voltage VRL,
Wherein, 0 ＜ VRL ＜ VRH ＜ VP, VP is the crest voltage of the triangular wave oscillation signal of the oscillator output, and VEAO is described
Error amplifies the magnitude of voltage of voltage.As VEAO ＞ VRH, the first current signal of oscillator frequency control circuit output IA gives
The oscillator, and (VEAO-VRH) is bigger, the first current signal IA of the oscillator frequency control circuit output is bigger, leads
Cause the charging current of the oscillator smaller, and then make the frequency of the triangular wave oscillation signal of the oscillator output lower；When
During VEAO ＜ VRL, the second current signal of oscillator frequency control circuit output IB gives the oscillator, and (VRL-VEAO)
Bigger, the second current signal IB of the oscillator frequency control circuit output is bigger, causes the charging current of the oscillator
It is smaller, and then make the frequency of the triangular wave oscillation signal of the oscillator output lower, it is described to shake as VRL ＜ VEAO ＜ VRH
The the first current signal IA and the electric current of the second current signal for swinging the output of device frequency control circuit be zero, now the oscillator
Charging current is fixed, and fixes the frequency of the triangular wave oscillation signal of the oscillator output.
Further, the oscillator frequency control circuit includes the first trsanscondutance amplifier and the second trsanscondutance amplifier, institute
The first input end and the error for stating the first trsanscondutance amplifier amplify voltage and are connected, its second input and the first reference voltage
VRH is connected, and first trsanscondutance amplifier is used to compare error amplification voltage and the first reference voltage VRH, produces simultaneously defeated
Go out the first current signal IA, as VEAO ＜ VRH, the electric current of the first current signal IA is zero；As VEAO ＞ VRH, and
(VEAO-VRH) bigger, the electric current of the first current signal IA is bigger；Second input of second trsanscondutance amplifier with it is described
Error is amplified voltage and is connected, and its first input end is connected with the second reference voltage VRL, and second trsanscondutance amplifier is used to compare
The error amplifies voltage and the second reference voltage VRL, produces and export the second current signal IB, as VEAO ＞ VRL, second
The electric current of current signal IB is zero；As the VEAO ＜ VRL, and (VRL-VEAO) is bigger, the electric current of the second current signal IB
It is bigger.
Further, the first input end and the second input of first trsanscondutance amplifier are respectively the first mutual conductance amplification
The positive input and negative input of device；The first input end and the second input of second trsanscondutance amplifier are respectively
The positive input and negative input of two trsanscondutance amplifiers.
Further, the oscillator frequency control circuit includes the first trsanscondutance amplifier, and the first trsanscondutance amplifier includes
First current source I1, PMOS transistor MP1, MP2, MP3 and MP4, nmos pass transistor MN1, MN2 and MN3.First current source
The negative pole of I1 is connected with a power end, the positive pole of the first current source I1 and the source electrode and PMOS crystal of PMOS transistor MP1
Connecting node between the source electrode of pipe MP2 is connected；The grid of PMOS transistor MP1 is used as the first of first trsanscondutance amplifier
Input amplifies voltage and is connected with the error, and the grid of PMOS transistor MP2 is used as the second of first trsanscondutance amplifier
Input is connected with the first reference voltage VRH, and the drain electrode of nmos pass transistor MN1 is connected with the drain electrode of PMOS transistor MP1, NMOS
The grid of transistor MN1 is connected with the drain electrode of its own, the source ground of nmos pass transistor MN1；The drain electrode of nmos pass transistor MN2
Drain electrode with PMOS transistor MP2 is connected, and the grid of nmos pass transistor MN2 is connected with the grid of nmos pass transistor MN1, and NMOS is brilliant
The source ground of body pipe MN2；The source electrode of PMOS transistor MP3 and the source electrode of PMOS transistor MP4 with first current source
The negative pole of I1 is connected, and the grid of PMOS transistor MP3 is connected with the drain electrode of its own, the grid and PMOS of PMOS transistor MP4
The grid of transistor MP3 is connected, and the drain electrode of PMOS transistor MP4 exports first as the output end of first trsanscondutance amplifier
Current signal IA gives the oscillator；The drain electrode of nmos pass transistor MN3 is connected with the drain electrode of PMOS transistor MP3, NMOS crystal
The grid of pipe MN3 is connected with the drain electrode of nmos pass transistor MN2, the source ground of nmos pass transistor MN3.
Further, the oscillator frequency control circuit also includes the second trsanscondutance amplifier, and second mutual conductance is amplified
Device includes the second current source I2, PMOS transistor MP5, MP6, MP7 and MP8, nmos pass transistor MN5, MN6 and MN7.Described second
The negative pole of current source I2 is connected with a power end, the positive pole of the second current source I2 and the source electrode of PMOS transistor MP5 and
Connecting node between the source electrode of PMOS transistor MP6 is connected；The grid of PMOS transistor MP5 amplifies as second mutual conductance
The first input end of device is connected with the second reference voltage VRL, and the grid of PMOS transistor MP6 is used as second trsanscondutance amplifier
The second input and the error amplify voltage and be connected；The drain electrode phase of the drain electrode of nmos pass transistor MN5 and PMOS transistor MP5
Even, the grid of nmos pass transistor MN5 is connected with the drain electrode of its own, the source ground of nmos pass transistor MN5；Nmos pass transistor
The drain electrode of MN6 is connected with the drain electrode of PMOS transistor MP6, the grid of nmos pass transistor MN6 and the grid phase of nmos pass transistor MN5
Even, the source ground of nmos pass transistor MN6；The source electrode of PMOS transistor MP7 and the source electrode of PMOS transistor MP8 are with described
The negative pole of two current source I2 is connected, and the grid of PMOS transistor MP7 is connected with the drain electrode of its own, the grid of PMOS transistor MP8
Pole is connected with the grid of PMOS transistor MP7, the drain electrode of PMOS transistor MP8 as second trsanscondutance amplifier output end
The second current signal IB is exported to the oscillator；The drain electrode of nmos pass transistor MN7 is connected with the drain electrode of PMOS transistor MP7,
The grid of nmos pass transistor MN7 is connected with the drain electrode of nmos pass transistor MN6, the source ground of nmos pass transistor MN7, wherein, 0 ＜
VRL ＜ VRH ＜ VP, VP are the crest voltage of the triangular wave oscillation signal of the oscillator output.
The further oscillator includes electric capacity C1, charging circuit, discharge circuit and comparison circuit.The charging circuit
Including the 3rd current source I3, the charging circuit is based on the 3rd current source I3 and the first current signal IA and the second current signal IB
Difference produce charging current Ic, charging current Ic to electric capacity C1 charge；The comparison circuit compares a reference voltage V 1 and described
The voltage of electric capacity C1, and when the voltage of the electric capacity C1 is more than the reference voltage V 1, the discharge circuit is controlled to described
Electric capacity C1 carries out repid discharge, and the voltage signal of the electric capacity C1 is formed the triangular wave oscillation signal.
Further, the charging circuit also includes PMOS transistor MP9 and MP10, and the discharge circuit includes an electric discharge
Controlling switch, the comparison circuit includes comparator com1.The input of the oscillator receives the first current signal IA and the
Two current signal IB, the negative pole of the 3rd current source I3 is connected with the input of the oscillator, and the positive pole of the 3rd current source I3 connects
Ground；The source electrode of PMOS transistor MP9 and the source electrode of MP10 are connected with a power end, and the grid of PMOS transistor MP9 is with it certainly
The drain electrode of body is connected, and the drain electrode of PMOS transistor MP9 is connected with the input of the oscillator；The grid of PMOS transistor MP10
Grid with PMOS transistor MP9 is connected, and the drain electrode of PMOS transistor MP10 is connected with described electric capacity C1 one end, and electric capacity C1's is another
One end is grounded；The discharge control switch is in parallel with the electric capacity C1；The first input end and PMOS transistor of comparator com1
Connecting node between the drain electrode of MP10 and electric capacity C1 is connected, and second input of comparator com1 is connected with reference voltage V 1,
The output end of comparator com1 is connected with the control end of discharge control switch, between the drain electrode of PMOS transistor MP10 and electric capacity C1
Connecting node as oscillator output end export triangular wave oscillation signal.
Further, the first input end and the second input of the comparator com1 are respectively the forward direction of comparator com1
Input and negative-phase input；The discharge control switch is nmos pass transistor MN9, nmos pass transistor MN9 drain electrodes and the electricity
The one end for holding C1 is connected, and its source electrode is connected with the other end of the electric capacity C1, the output end of its grid and the comparator com1
It is connected.
Further, the peak value of the triangular wave oscillation signal is fixed value, and its valley is fixed value.
Compared with prior art, the present invention is additionally arranged oscillator frequency control circuit in existing pwm control circuit, and this shakes
Device frequency control circuit is swung in the case of underloading or zero load, voltage is amplified based on the error and produces corresponding current signal to give
Oscillator, to reduce the charging current of oscillator, so as to reduce the frequency of the triangular wave oscillation signal of oscillator output.So,
The continuous switching transition of PFM to PWM can be not only realized, but also can further reduce the frequency minimum under PFM patterns,
So as to the stand-by power consumption under reducing the power consumption under lighter load and/or zero load.
【Brief description of the drawings】
Technical scheme in order to illustrate more clearly the embodiments of the present invention, below will be to that will use needed for embodiment description
Accompanying drawing be briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for this
For the those of ordinary skill of field, without having to pay creative labor, other can also be obtained according to these accompanying drawings
Accompanying drawing.Wherein：
Fig. 1 is that the PWM/PFM in the present invention controls circuit system circuit diagram in one embodiment；
Circuit diagrams of the Fig. 2 for the first trsanscondutance amplifier in Fig. 1 in one embodiment；
Circuit diagrams of the Fig. 3 for the second trsanscondutance amplifier in Fig. 1 in one embodiment；
Circuit diagrams of the Fig. 4 for the oscillator OSC in Fig. 1 in one embodiment；
Fig. 5 is the oscillogram of the triangular wave oscillation signal Ramp of the oscillator output in Fig. 4.
【Specific embodiment】
It is of the invention to describe in detail mainly by program, step, logical block, process or other symbolistic descriptions come directly
Or the running of simulation technical solution of the present invention indirectly.It is the thorough explanation present invention, is set forth very in following description
Many specific details.And when without these specific details, it is of the invention then can still may realize.Technical staff in art makes
With herein these describe and state to the others skilled in the art in art effectively introduce they work essence.Change sentence
Talk about, be the purpose of the present invention of avoiding confusion, because well known methods and procedures has been readily appreciated that, therefore they are not detailed
Thin description.
" one embodiment " or " embodiment " referred to herein refers in may be included at least one implementation of the invention
Special characteristic, structure or characteristic." in one embodiment " that different places occur in this manual not refers both to same
Individual embodiment, nor the single or selective embodiment mutually exclusive with other embodiment.
Fig. 1 is that the PWM/PFM in the present invention controls the circuit diagram in one embodiment of circuit system 100.It is described
PWM/PFM control circuit system include power-switching circuit 110, feedback circuit 120, error amplifier EA, PWM comparator com,
Logic control element Control Logic, drive circuit Driver, oscillator OSC and oscillator frequency control circuit 130.
In some embodiments, the power-switching circuit 110 can be not belonging to PWM/PFM control circuit system 100, but with institute
State PWM/PFM controls circuit system 100 circuit arranged side by side.
One input voltage VIN is converted into an output voltage VO by the power-switching circuit 110.In the implementation shown in Fig. 1
In example, the power-switching circuit 110 is buck DC-DC voltage conversion circuit, and it includes inductance L1, electric capacity C0, is connected on
Output transistor MPX and MNX between input voltage VIN and ground, the output of their grid and the drive circuit Driver
End is connected, and the connecting node LX between output transistor MPX and MNX is by inductance L1 and electric capacity C0 ground connection, inductance L1 and electric capacity
The voltage of the connecting node between C0 is used as output voltage VO.
The feedback circuit 120 is sampled the output voltage VO, and forms the feedback voltage for reflecting the output voltage VO,
In the embodiment shown in fig. 1, the feedback circuit 120 include being sequentially connected in series resistance R1 between output voltage VO and ground and
R2, wherein, the voltage of the connecting node FB between resistance R1 and resistance R2 is the feedback voltage of the feedback circuit 120.It is described
Oscillator OSC is generated and is exported triangular signal Ramp (it is alternatively referred to as triangular wave oscillation signal Ramp).The error is amplified
The error that device EA amplifies a reference voltage V REF and feedback voltage FB obtains error amplification voltage EAO.The PWM comparators com
Amplify voltage EAO for comparing the triangular signal Ramp and institute's error, to export corresponding control signal PC.Control signal
PC produces the first drive signal PDRV to defeated after sequentially passing through logic control element Control Logic and drive circuit Driver
Go out the grid of transistor MPX, produce the second drive signal to the grid of output transistor MNX, with drive output transistor MPX and
MNX alternate conductions；The voltage of connecting node LX is by after the filter circuit that inductance L1 and electric capacity C0 is constituted, forming output voltage
VO。
The input of the oscillator frequency control circuit 130 is connected with the output end of the error amplifier EA, described
The output end of oscillator frequency control circuit 130 is connected with the input of the oscillator OSC.The oscillator frequency control electricity
Voltage OEA is amplified based on the error that the error amplifier EA is exported and exports corresponding current signal to the oscillator in road 130
OSC, the oscillator OSC adjusts the size of charging current based on the current signal, so that it is defeated to change the oscillator OSC
The frequency (or changing the frequency of the oscillator OSC) of the triangular signal Ramp for going out.
In the embodiment shown in fig. 1, oscillator frequency control circuit 130 include the first trsanscondutance amplifier Gm1 and
Second trsanscondutance amplifier Gm2, the first input end of the first trsanscondutance amplifier Gm1 and the output end of the error amplifier EA
It is connected, its second input is connected with the first reference voltage VRH, the first trsanscondutance amplifier Gm1 is used to compare the error
Amplify voltage EAO and the first reference voltage VRH, produce and export inputs of the first current signal IA to the oscillator OSC；
Second input of the second trsanscondutance amplifier Gm2 is connected with the output end of the error amplifier EA, its first input end
It is connected with the second reference voltage VRL, the second trsanscondutance amplifier Gm2 is used to compare the error amplification voltage EAO and second
Reference voltage VRL, produces and exports inputs of the second current signal IB to the oscillator OSC.The oscillator OSC according to
First current signal IA and the second current signal IB adjusts charging current, and based on the charging current after adjustment produces triangular wave
Signal Ramp, the first current signal IA and the second current signal IB can change the frequency of triangular signal Ramp.Wherein, 0 ＜ VRL
＜ VRH ＜ VP, VRH are the magnitude of voltage of the first reference voltage VRH, and VRL is the magnitude of voltage of the second reference voltage VRL, and VP is vibration
The crest voltage of the triangular signal Ramp of device OSC outputs, specifically refers to Fig. 5.
Specifically, when the error is amplified voltage EAO and is much larger than the second reference voltage VRL, the second trsanscondutance amplifier Gm2
Output current is zero；When the error amplifies voltage EAO is close to or smaller than the second reference voltage VRL, described second across
Lead amplifier Gm2 and produce the second current signal IB, and (VRL-VEAO) is bigger, the electric current of the second current signal IB of its output is got over
Greatly, wherein, VRL is the magnitude of voltage of the second reference voltage VRL, and VEAO is the magnitude of voltage that error amplifies voltage EAO.
When the error amplifies voltage EAO is much smaller than the first reference voltage VRH, the first trsanscondutance amplifier Gm1 is defeated
It is zero to go out electric current；When the error amplifies voltage EAO is close or larger than the first reference voltage VRH, first mutual conductance
Amplifier Gm1 produces the first current signal IA, and (VEAO-VRH) is bigger, and the electric current of the first current signal IA of its output is got over
Greatly, wherein, VRH is the magnitude of voltage of the first reference voltage VRH, and VEAO is the magnitude of voltage that error amplifies voltage EAO.
Because when error is amplified voltage EAO and is close to or smaller than the second reference voltage VRL, the second trsanscondutance amplifier Gm2 is defeated
Go out the second current signal IB, when error is amplified voltage EAO and is close or larger than the first reference voltage VRH, the first trsanscondutance amplifier
Gm1 exports the first current signal IA, and second reference voltage VRL ＜ the first reference voltage VRH, therefore, the first current signal
IA and the second current signal IB can't be produced simultaneously.
The oscillator OSC is based on the regulation current IB signal regulation charging currents of the first current signal IA or second
Size, so that change the frequency of the triangular signal Ramp of the oscillator OSC outputs, for example, the peak of triangular signal Ramp
It is fixed value VP to be worth, and valley is fixed value (such as, 0V), and the first current signal IA is bigger, and charging current is smaller, causes oscillator
The frequency of OSC is lower；Second current signal IB is bigger, and charging current is smaller, causes the frequency of oscillator OSC lower.
Based on the above-mentioned description to the first trsanscondutance amplifier Gm1 and the course of work of the second trsanscondutance amplifier Gm2, below have
The PWM/PFM that body is introduced in Fig. 1 controls the operation principle of circuit.
As VEAO ＞ VRH, the oscillator frequency control circuit 130 exports the first current signal IA to the oscillator
OSC, and (VEAO-VRH) is bigger, the electric current of the first current signal IA of the oscillator frequency control output of circuit 130 is bigger,
Make the charging current of the oscillator OSC smaller, cause the frequency of the oscillator OSC lower, so that PWM comparators com
The frequency-adjustable of the control signal PC of output.Now, the PWM/PFM control circuits in Fig. 1 are practically at PFM control moulds
Formula, i.e., as VEAO ＞ VRH, show the difference very little of input voltage VIN and output voltage VO and load be very heavy, by reducing frequency
More big space rate can be realized, it is ensured that dc-dc steady operation.
As VRL ＜ VEAO ＜ VRH, it is zero that the oscillator frequency controls the electric current of the current signal of the output of circuit 130,
The charging current of the oscillator OSC is fixed, and causes the frequency of oscillator OSC to be fixed, so that PWM comparators com outputs
The frequency of control signal PC is fixed.Now, the PWM/PFM control circuits in Fig. 1 are practically at pwm pattern.
As VEAO ＜ VRL, the oscillator frequency control circuit 130 exports the second current signal IB to the oscillator
OSC, and (VRL-VEAO) is bigger, the electric current of the second current signal IB of the oscillator frequency control output of circuit 130 is bigger,
Make the charging current of the oscillator OSC smaller, cause the frequency of the oscillator OSC lower, so that PWM comparators com
The frequency-adjustable of the control signal PC of output.Now, the PWM/PFM control circuits in Fig. 1 are practically at the 2nd PFM control moulds
Formula, i.e., as VEAO ＜ VRL, show that load is very light, by reducing frequency, realizes lower power usage.Wherein, VRH is first
The magnitude of voltage of reference voltage VRH, VRL is the magnitude of voltage of the second reference voltage VRL, and VEAO is the voltage that error amplifies voltage EAO
Value.
In sum, the present invention is additionally arranged oscillator frequency control circuit 130, the vibration in existing pwm control circuit
Device frequency control circuit 130 produces corresponding electricity when the error amplification voltage EAO that error amplifier EA is exported is excessive or too small
Stream signal gives oscillator OSC, when error amplifies voltage EAO more than the first reference voltage VRH (i.e. error amplification voltage EAO is excessive)
When, oscillator frequency control circuit 130 exports the first current signal IA, and error amplification voltage EAO is bigger, the first circuit signal
The electric current of IA is bigger, and the frequency of oscillator OSC is lower；When error amplifies voltage EAO less than the second reference voltage VRL (i.e. errors
Amplify voltage EAO too small) when, oscillator frequency control circuit 130 exports the second current signal IB, and error amplifies voltage EAO
Smaller, the electric current of second circuit signal IB is bigger, and the frequency of oscillator OSC is lower.So, can not only realize PFM to PWM's
Continuous switching transition, but also the frequency minimum under PFM patterns can be further reduced, so as to reduce the work(under lighter load
Stand-by power consumption under consumption and/or zero load.
It is clear that the PWM/PFM control circuits in the present invention are readily adaptable for use in other kinds of dc-dc
Control, e.g., booster type, buck converter, it only needs to replace with the power-switching circuit 110 in Fig. 1 other kinds of
Switching Power Supply change-over circuit.
Refer to shown in Fig. 2, it is the first trsanscondutance amplifier Gm1 in Fig. 1 circuit diagram in one embodiment.
The first trsanscondutance amplifier shown in Fig. 2 includes the first current source I1, PMOS transistor MP1, MP2, MP3 and MP4, nmos pass transistor
MN1, MN2 and MN3.
The negative pole of the first current source I1 is connected with a power end, positive pole and the PMOS crystal of the first current source I1
Connecting node between the source electrode of pipe MP1 and the source electrode of PMOS transistor MP2 is connected；The grid of PMOS transistor MP1 is used as institute
The first input end of the first trsanscondutance amplifier is stated, the grid of PMOS transistor MP2 is used as the second of first trsanscondutance amplifier
Input；The drain electrode of nmos pass transistor MN1 is connected with the drain electrode of PMOS transistor MP1, and the grid of nmos pass transistor MN1 is with it certainly
The drain electrode of body is connected, the source ground of nmos pass transistor MN1；The drain electrode of nmos pass transistor MN2 and the drain electrode of PMOS transistor MP2
It is connected, the grid of nmos pass transistor MN2 is connected with the grid of nmos pass transistor MN1, the source ground of nmos pass transistor MN2；
The negative pole of the source electrode of PMOS transistor MP3 and the source electrode of PMOS transistor MP4 with the first current source I1 is connected, and PMOS is brilliant
The grid of body pipe MP3 is connected with the drain electrode of its own, and the grid of PMOS transistor MP4 is connected with the grid of PMOS transistor MP3,
The drain electrode of PMOS transistor MP4 exports the first current signal IA as the output end of first trsanscondutance amplifier；NMOS crystal
The drain electrode of pipe MN3 is connected with the drain electrode of PMOS transistor MP3, the grid of nmos pass transistor MN3 and the drain electrode of nmos pass transistor MN2
It is connected, the source ground of nmos pass transistor MN3.Wherein, the first current source I1, PMOS transistor MP1 and MP2, nmos pass transistor
MN1 and MN2 constitutes differential input stage；Nmos pass transistor MN3, PMOS transistor MP3 and MP4 constitute circuit output stage；NMOS is brilliant
Body pipe MN1 and MN2 constitute current mirror；PMOS transistor MP3 and MP4 constitute current mirror.
When error amplification voltage EAO is more less than the first reference voltage VRH, PMOS transistor MP1 will be than PMOS crystal
Pipe MP2 gets more electric currents from the first current source I1, and (it is equal to and flows through to cause to flow through the electric current of nmos pass transistor MN1
The electric current of PMOS transistor MP1) it is more than the electric current for flowing through PMOS transistor MP2 by the electric current after nmos pass transistor MN2 mirror images,
Then the grid voltage reduction of nmos pass transistor MN3, nmos pass transistor MN3 cut-offs, make on PMOS transistor MP3 and MP4 without electricity
Stream flows through, and the electric current of the first current signal IA is zero, i.e., amplifying voltage EAO when the error is much smaller than the first reference voltage VRH
When, the first trsanscondutance amplifier Gm1 output currents are zero.When it is higher than the first reference voltage VRH that error amplifies voltage EAO,
PMOS transistor MP2 will get more electric currents than PMOS transistor MP1 from the first current source I1, cause to flow through NMOS crystal
The electric current (it is equal to the electric current for flowing through PMOS transistor MP1) of pipe MN1 is by the electric current after nmos pass transistor MN2 mirror images less than stream
Through the electric current of PMOS transistor MP2, then the grid voltage of nmos pass transistor MN3 is uprised, the electric current increase of nmos pass transistor MN3,
Increase the electric current on PMOS transistor MP3, the electric current on PMOS transistor MP4 mirror image PMOS transistors MP3 causes PMOS brilliant
The output current IA of body pipe MP4 increases, and (VEAO-VRH) is bigger, and the electric current of the first current signal IA is bigger.
Refer to shown in Fig. 3, it is the second trsanscondutance amplifier Gm2 in Fig. 1 circuit diagram in one embodiment.
The second trsanscondutance amplifier shown in Fig. 3 includes the second current source I2, PMOS transistor MP5, MP6, MP7 and MP8, nmos pass transistor
MN5, MN6 and MN7.
The negative pole of the second current source I2 is connected with a power end, positive pole and the PMOS crystal of the second current source I2
Connecting node between the source electrode of pipe MP5 and the source electrode of PMOS transistor MP6 is connected；The grid of PMOS transistor MP5 is used as institute
The first input end of the second trsanscondutance amplifier is stated, the grid of PMOS transistor MP6 is used as the second of second trsanscondutance amplifier
Input；The drain electrode of nmos pass transistor MN5 is connected with the drain electrode of PMOS transistor MP5, and the grid of nmos pass transistor MN5 is with it certainly
The drain electrode of body is connected, the source ground of nmos pass transistor MN5；The drain electrode of nmos pass transistor MN6 and the drain electrode of PMOS transistor MP6
It is connected, the grid of nmos pass transistor MN6 is connected with the grid of nmos pass transistor MN5, the source ground of nmos pass transistor MN6；
The negative pole of the source electrode of PMOS transistor MP7 and the source electrode of PMOS transistor MP8 with the second current source I2 is connected, and PMOS is brilliant
The grid of body pipe MP7 is connected with the drain electrode of its own, and the grid of PMOS transistor MP8 is connected with the grid of PMOS transistor MP7,
The drain electrode of PMOS transistor MP8 exports the second current signal IB as the output end of second trsanscondutance amplifier；NMOS crystal
The drain electrode of pipe MN7 is connected with the drain electrode of PMOS transistor MP7, the grid of nmos pass transistor MN7 and the drain electrode of nmos pass transistor MN6
It is connected, the source ground of nmos pass transistor MN7.Wherein, the second current source I2, PMOS transistor MP5 and MP6, nmos pass transistor
MN5 and MN6 constitutes differential input stage；Nmos pass transistor MN7, PMOS transistor MP7 and MP8 constitute circuit output stage；NMOS is brilliant
Body pipe MN5 and MN6 constitute current mirror；PMOS transistor MP7 and MP8 constitute current mirror.
When it is higher than the second reference voltage VRL more that error amplifies voltage EAO, PMOS transistor MP5 will be than PMOS crystal
Pipe MP6 gets more electric currents from the second current source I2, and (it is equal to and flows through to cause to flow through the electric current of nmos pass transistor MN5
The electric current of PMOS transistor MP5) it is more than the electric current for flowing through PMOS transistor MP6 by the electric current after nmos pass transistor MN6 mirror images,
Then the grid voltage reduction of nmos pass transistor MN7, nmos pass transistor MN7 cut-offs, make on PMOS transistor MP7 and MP8 without electricity
Stream flows through, and the electric current of the second current signal IB is zero, i.e., amplifying voltage EAO when the error is much larger than the second reference voltage VRL
When, the second trsanscondutance amplifier Gm2 output currents are zero.When error amplifies voltage EAO is less than the second reference voltage VRL,
PMOS transistor MP6 will get more electric currents than PMOS transistor MP5 from the first current source I1, cause to flow through NMOS crystal
The electric current (it is equal to the electric current for flowing through PMOS transistor MP1) of pipe MN5 is by the electric current after nmos pass transistor MN6 mirror images less than stream
Through the electric current of PMOS transistor MP6, then the grid voltage of nmos pass transistor MN7 is uprised, the electric current increase of nmos pass transistor MN7,
Increase the electric current on PMOS transistor MP7, the electric current on PMOS transistor MP8 mirror image PMOS transistors MP7 causes PMOS brilliant
The output current IB of body pipe MP8 increases, and (VRL-VEAO) is bigger, and the electric current of the second current signal IB is bigger.
Refer to shown in Fig. 4, it is oscillator OSC in Fig. 1 circuit diagram in one embodiment.In Fig. 4
Oscillator includes electric capacity C1, charging circuit, discharge circuit and comparison circuit.The charging circuit includes the 3rd current source I3, institute
State charging circuit and be based on the 3rd current source I3, and oscillator input the first current signal IA and the second electric current that receive
Signal IB produces charging current Ic, charging current Ic to charge electric capacity C1,.The comparison circuit compares a reference voltage V 1 and institute
The voltage of electric capacity C1 is stated, and when the voltage of the electric capacity C1 is more than the reference voltage V 1, controls the discharge circuit to institute
Stating electric capacity C1 carries out repid discharge, and the voltage signal of the electric capacity C1 is formed triangular signal Ramp.
Charging circuit in Fig. 4 in addition to the 3rd current source I3, also including PMOS transistor MP9 and MP10；Discharge circuit is
The nmos pass transistor MN9 in parallel with electric capacity C1,；In one embodiment, the nmos pass transistor MN9 can also be equivalent for other
Electronic switching device, such as NPN bipolar transistor；Comparison circuit is comparator com1, the reference voltage V 1 of comparator com1
There is provided by voltage source V1.
Specifically, the oscillator shown in Fig. 4 includes the 3rd current source I3, electric capacity C1, PMOS transistor MP9 and MP10,
Nmos pass transistor MN9, voltage source V1 and comparator com1, the input of the oscillator receive the first current signal IA and second
Current signal IB, the negative pole of the 3rd current source I3 is connected with the input of the oscillator, the plus earth of the 3rd current source I3；
The source electrode of PMOS transistor MP9 and the source electrode of MP10 are connected with a power end, the grid of PMOS transistor MP9 with its own
Drain electrode is connected, and the drain electrode of PMOS transistor MP9 is connected with the input of the oscillator；The grid of PMOS transistor MP10 with
The grid of PMOS transistor MP9 is connected, and the drain electrode of PMOS transistor MP10 is connected with described electric capacity C1 one end, and electric capacity C1's is another
End ground connection；The drain electrode of the nmos pass transistor MN9 is connected with one end of the electric capacity C1, and its source electrode is another with the electric capacity C1's
End is connected；Connecting node phase between the positive input of comparator com1 and the drain electrode of PMOS transistor MP10 and electric capacity C1
Even, the negative input of comparator com1 is connected with the positive pole of voltage source V1, the negative pole ground connection of voltage source V1, PMOS transistor
Connecting node between the drain electrode of MP10 and electric capacity C1 as oscillator output end Ramp.
The electric current for flowing through PMOS transistor MP9 is equal to the 3rd current source I3 and the first current signal IA and the second current signal
The difference of IB, charges after the electric current on PMOS transistor MP10 mirror image PMOS transistors MP9 to electric capacity C1, i.e. charging current IC=
I3-IA-IB.When the electric current of the first current signal IA and the second current signal IB is zero, charging current IC is completely by the 3rd electricity
Stream source I3 determines that now, the frequency of oscillator is fixed, and its cycle T 1=VP.C1/I3, wherein VP are the magnitude of voltage of voltage source V1,
C1 is the magnitude of voltage of electric capacity C1, and I3 is the current value of the 3rd current source I3；From the foregoing it will be appreciated that the electricity of the first current signal IA and second
Stream signal IB can not be produced simultaneously, when the electric current of the first current signal IA or the electric current of the second current signal IB increase, be caused
The electric current for flowing through PMOS transistor MP9 reduces, and the electric current (i.e. charging current IC) flowed through on PMOS transistor MP10 also reduces,
So that the cycle of oscillator is elongated, the cycle T A=VP.C1/ (I3-IA) of oscillator when being controlled by the first current signal IA；
The cycle T B=VP.C1/ (I3-IB) of oscillator when being controlled by the second current signal IB.
The course of work of the oscillator shown in Fig. 4 is：The electric current for flowing through PMOS transistor MP10 charges to electric capacity C1, works as electricity
When voltage on appearance C1 rises above reference voltage V 1, the output of comparator com1 is changed into high level, causes nmos pass transistor
MN9 is turned on, and by the tension discharge of electric capacity C1 to zero, the time delay after comparator com1 should be met during design and allows nmos pass transistor enough
Electric capacity C1 is discharged to zero by MN9 conductings completely；After electric capacity C1 is discharged to zero, the output of comparator com1 is changed into low level,
Nmos pass transistor MN9 is turned off, and the electric current on PMOS transistor MP10 charges to electric capacity C1 again, so, goes round and begins again, and is formed
Vibration.Refer to shown in Fig. 5, it is the oscillogram of the Ramp signals of the oscillator output in Fig. 4.Wherein, peak value VP is equal to electricity
The magnitude of voltage of potential source V1, valley is equal to 0V, and Ramp waveforms are triangular wave, because the velocity of discharge is fast, therefore, the decline of Ramp signals
Edge is very steep, and because charging current is smaller, the rising edge of Ramp signals is very slow.
Described above fully discloses specific embodiment of the invention.It is pointed out that being familiar with the field
Scope of any change that technical staff is done to specific embodiment of the invention all without departing from claims of the present invention.
Correspondingly, the scope of claim of the invention is also not limited only to previous embodiment.
Claims (9)
1. a kind of PWM/PFM controls circuit, and it has pwm pattern and PFM control models, it is characterised in that it includes instead
Current feed circuit, error amplifier, PWM comparators, oscillator and oscillator frequency control circuit,
The output voltage VO of one power-switching circuit of the feedback circuit sampling simultaneously forms the feedback for reflecting the output voltage VO
Be converted into for one input voltage described by voltage, control signal of the power-switching circuit based on PWM/PFM control circuit outputs
Output voltage VO；
The error amplifier is based on a reference voltage V REF and the error of feedback voltage obtains error amplification voltage；
The oscillator produces triangular wave oscillation signal；
The PWM comparators are used to compare the triangular wave oscillation signal and the error amplifies voltage to export the control letter
Number；
The oscillator frequency control circuit is based on the error and amplifies the corresponding current signal of voltage output to the oscillator,
The oscillator is based on the size that the current signal adjusts the charging current of the oscillator, is exported with changing the oscillator
Triangular wave oscillation signal frequency,
The oscillator frequency control circuit includes the first reference voltage VRH and the second reference voltage VRL, wherein, 0 ＜ VRL ＜
VRH ＜ VP, VP are the crest voltage of the triangular wave oscillation signal of the oscillator output, and VEAO is that the error amplifies voltage
Magnitude of voltage,
As VEAO ＞ VRH, the first current signal of oscillator frequency control circuit output IA gives the oscillator, and
(VEAO-VRH) bigger, the first current signal IA of the oscillator frequency control circuit output is bigger, causes the oscillator
Charging current it is smaller, and then make the frequency of the triangular wave oscillation signal of oscillator output lower；
As VEAO ＜ VRL, the second current signal of oscillator frequency control circuit output IB gives the oscillator, and
(VRL-VEAO) bigger, the second current signal IB of the oscillator frequency control circuit output is bigger, causes the oscillator
Charging current it is smaller, and then make the frequency of the triangular wave oscillation signal of oscillator output lower,
As VRL ＜ VEAO ＜ VRH, the first current signal IA of the oscillator frequency control circuit output and the second electric current are believed
Number electric current be zero, now the charging current of the oscillator is fixed, and makes the triangular wave oscillation signal of oscillator output
Frequency is fixed.
2. PWM/PFM according to claim 1 controls circuit, it is characterised in that the oscillator frequency controls circuit bag
The first trsanscondutance amplifier and the second trsanscondutance amplifier are included,
The first input end of first trsanscondutance amplifier amplifies voltage and is connected with the error, and its second input and first is joined
Examine voltage VRH to be connected, first trsanscondutance amplifier is used to compare error amplification voltage and the first reference voltage VRH, produces
The first current signal IA is given birth to and exports, as VEAO ＜ VRH, the electric current of the first current signal IA is zero；As VEAO ＞ VRH,
And (VEAO-VRH) is bigger, the electric current of the first current signal IA is bigger；
Second input of second trsanscondutance amplifier amplifies voltage and is connected with the error, and its first input end and second is joined
Examine voltage VRL to be connected, second trsanscondutance amplifier is used to compare error amplification voltage and the second reference voltage VRL, produces
The second current signal IB is given birth to and exports, as VEAO ＞ VRL, the electric current of the second current signal IB is zero；As the VEAO ＜ VRL
When, and (VRL-VEAO) is bigger, the electric current of the second current signal IB is bigger.
3. PWM/PFM according to claim 2 controls circuit, it is characterised in that
The first input end and the second input of first trsanscondutance amplifier are respectively the positive input of the first trsanscondutance amplifier
End and negative input；
The first input end and the second input of second trsanscondutance amplifier are respectively the positive input of the second trsanscondutance amplifier
End and negative input.
4. PWM/PFM according to claim 1 controls circuit, it is characterised in that the oscillator frequency controls circuit bag
The first trsanscondutance amplifier is included, the first trsanscondutance amplifier includes the first current source I1, PMOS transistor MP1, MP2, MP3 and MP4,
Nmos pass transistor MN1, MN2 and MN3,
The negative pole of the first current source I1 is connected with a power end, the positive pole and PMOS transistor of the first current source I1
Connecting node between the source electrode of MP1 and the source electrode of PMOS transistor MP2 is connected；The grid of PMOS transistor MP1 is used as described
The first input end of the first trsanscondutance amplifier amplifies voltage and is connected with the error, and the grid of PMOS transistor MP2 is used as described
Second input of the first trsanscondutance amplifier is connected with the first reference voltage VRH, drain electrode and the PMOS crystal of nmos pass transistor MN1
The drain electrode of pipe MP1 is connected, and the grid of nmos pass transistor MN1 is connected with the drain electrode of its own, and the source electrode of nmos pass transistor MN1 connects
Ground；The drain electrode of nmos pass transistor MN2 is connected with the drain electrode of PMOS transistor MP2, grid and the NMOS crystal of nmos pass transistor MN2
The grid of pipe MN1 is connected, the source ground of nmos pass transistor MN2；The source electrode of PMOS transistor MP3 and PMOS transistor MP4's
Negative pole of the source electrode with the first current source I1 is connected, and the grid of PMOS transistor MP3 is connected with the drain electrode of its own, PMOS
The grid of transistor MP4 is connected with the grid of PMOS transistor MP3, and the drain electrode of PMOS transistor MP4 is used as first mutual conductance
The output end of amplifier exports the first current signal IA to the oscillator；The drain electrode of nmos pass transistor MN3 and PMOS transistor
The drain electrode of MP3 is connected, and the grid of nmos pass transistor MN3 is connected with the drain electrode of nmos pass transistor MN2, the source of nmos pass transistor MN3
Pole is grounded.
5. PWM/PFM according to claim 4 controls circuit, it is characterised in that the oscillator frequency control circuit is also
Including the second trsanscondutance amplifier, second trsanscondutance amplifier includes the second current source I2, PMOS transistor MP5, MP6, MP7 and
MP8, nmos pass transistor MN5, MN6 and MN7,
The negative pole of the second current source I2 is connected with a power end, the positive pole and PMOS transistor of the second current source I2
Connecting node between the source electrode of MP5 and the source electrode of PMOS transistor MP6 is connected；The grid of PMOS transistor MP5 is used as described
The first input end of the second trsanscondutance amplifier is connected with the second reference voltage VRL, and the grid of PMOS transistor MP6 is used as described
Second input of two trsanscondutance amplifiers amplifies voltage and is connected with the error；The drain electrode of nmos pass transistor MN5 and PMOS crystal
The drain electrode of pipe MP5 is connected, and the grid of nmos pass transistor MN5 is connected with the drain electrode of its own, and the source electrode of nmos pass transistor MN5 connects
Ground；The drain electrode of nmos pass transistor MN6 is connected with the drain electrode of PMOS transistor MP6, grid and the NMOS crystal of nmos pass transistor MN6
The grid of pipe MN5 is connected, the source ground of nmos pass transistor MN6；The source electrode of PMOS transistor MP7 and PMOS transistor MP8's
Negative pole of the source electrode with the second current source I2 is connected, and the grid of PMOS transistor MP7 is connected with the drain electrode of its own, PMOS
The grid of transistor MP8 is connected with the grid of PMOS transistor MP7, and the drain electrode of PMOS transistor MP8 is used as second mutual conductance
The output end of amplifier exports the second current signal IB to the oscillator；The drain electrode of nmos pass transistor MN7 and PMOS transistor
The drain electrode of MP7 is connected, and the grid of nmos pass transistor MN7 is connected with the drain electrode of nmos pass transistor MN6, the source of nmos pass transistor MN7
Pole is grounded,
Wherein, 0 ＜ VRL ＜ VRH ＜ VP, VP is the crest voltage of the triangular wave oscillation signal of the oscillator output.
6. circuit is controlled according to any described PWM/PFM of claim 1-5, it is characterised in that the oscillator includes electric capacity
C1, charging circuit, discharge circuit and comparison circuit,
The charging circuit includes the 3rd current source I3, and the charging circuit is based on the 3rd current source I3 and the first current signal IA
Charging current Ic, charging current Ic is produced to charge electric capacity C1 with the difference of the second current signal IB；
The comparison circuit compares the voltage of a reference voltage V 1 and the electric capacity C1, and voltage in the electric capacity C1 is more than institute
When stating reference voltage V 1, control the discharge circuit that repid discharge, the voltage signal of the electric capacity C1 are carried out to the electric capacity C1
It is formed the triangular wave oscillation signal.
7. PWM/PFM according to claim 6 controls circuit, it is characterised in that
The charging circuit also includes PMOS transistor MP9 and MP10, and the discharge circuit includes a discharge control switch, described
Comparison circuit includes comparator com1,
The input of the oscillator receives the first current signal IA and the second current signal IB, the negative pole of the 3rd current source I3 with
The input of the oscillator is connected, the plus earth of the 3rd current source I3；The source electrode of PMOS transistor MP9 and the source electrode of MP10
Be connected with a power end, the grid of PMOS transistor MP9 is connected with the drain electrode of its own, the drain electrode of PMOS transistor MP9 with
The input of the oscillator is connected；The grid of PMOS transistor MP10 is connected with the grid of PMOS transistor MP9, PMOS crystal
The drain electrode of pipe MP10 is connected with described electric capacity C1 one end, the other end ground connection of electric capacity C1；The discharge control switch and the electricity
Hold C1 in parallel；Connecting node phase between the first input end of comparator com1 and the drain electrode of PMOS transistor MP10 and electric capacity C1
Even, second input of comparator com1 is connected with reference voltage V 1, output end and the discharge control switch of comparator com1
Control end is connected, and the connecting node between the drain electrode of PMOS transistor MP10 and electric capacity C1 exports three as the output end of oscillator
Angle ripple oscillator signal.
8. PWM/PFM according to claim 7 controls circuit, it is characterised in that
The first input end and the second input of the comparator com1 are respectively the positive input and negative of comparator com1
Input；
The discharge control switch is nmos pass transistor MN9, and nmos pass transistor MN9 drain electrodes are connected with one end of the electric capacity C1,
Its source electrode is connected with the other end of the electric capacity C1, and its grid is connected with the output end of the comparator com1.
9. PWM/PFM according to claim 1 controls circuit, it is characterised in that
The peak value of the triangular wave oscillation signal is fixed value, and its valley is fixed value.
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| CN101667774A (en) * | 2008-09-02 | 2010-03-10 | 北京芯技佳易微电子科技有限公司 | Closed-loop control charge pump circuit |
| CN102684491A (en) * | 2011-05-10 | 2012-09-19 | 成都芯源系统有限公司 | Switching regulator and control circuit and control method thereof |
| CN102290970A (en) * | 2011-08-08 | 2011-12-21 | 无锡中星微电子有限公司 | Mode selecting and controlling circuit in voltage converter |
| CN102324837A (en) * | 2011-09-26 | 2012-01-18 | 无锡中星微电子有限公司 | PWM/PFM (Pulse Width Modulation/ Pulse Frequency Modulation) control circuit |
| CN102684503A (en) * | 2012-05-03 | 2012-09-19 | 香港应用科技研究院有限公司 | Flyback Converter with Variable Switching Frequency Control and Duty Cycle Adjustment |
| CN103475338A (en) * | 2013-09-25 | 2013-12-25 | 无锡中星微电子有限公司 | High-precision low-voltage oscillator |
| CN103532347A (en) * | 2013-10-09 | 2014-01-22 | 无锡华润矽科微电子有限公司 | PWM (pulse width modulation)-type switching power circuit |
| CN104348359A (en) * | 2014-10-31 | 2015-02-11 | 无锡中星微电子有限公司 | DC (Direct Current)-DC adjuster |
| CN204835923U (en) * | 2015-07-22 | 2015-12-02 | 无锡中星微电子有限公司 | PWMPFM control circuit |
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