CN104835894B - Semiconductor diode chip and manufacturing method thereof - Google Patents

Abstract

A semiconductor diode chip and a manufacturing method thereof, the manufacturing method comprises the following steps: providing a wafer; forming a protective film on the front and back surfaces of the wafer; cutting the wafer to form a plurality of chips; flattening a peripheral surface of each chip; arranging the chips at intervals on a jig; filling a protective sealant into the jig and filling the protective sealant between the chips; soft baking the protective sealing agent to form a protective sealing film; cutting the protective sealing film to form a plurality of chip units; sintering and curing the protective sealing film of each chip unit into a protective sealing body; removing the protective film of each chip unit; and respectively forming a positive metal film and a negative metal film on the upper surface and the lower surface of each chip body to form a semiconductor diode chip with a protective package body.

Description

Semiconductor diode chip and manufacturing method thereof

technical field

The invention relates to a semiconductor diode chip and a manufacturing method thereof, in particular to a semiconductor diode chip with a sheathing body and a manufacturing method thereof.

Background technique

In the manufacture of silicon semiconductor rectifier diodes, the industry has always adopted the most cost-effective standard diffusion method to make rectifier diode chips. The general method is to diffuse and dope pentavalent element impurities (such as phosphorus, arsenic, etc.) and trivalent element impurities (such as boron, aluminum, gallium, etc.) etc.) to make a positive and negative electrode surface with P-N junction surface and low surface resistance. Afterwards, a metal film (such as nickel, aluminum, etc.) with Ohmic Contact (such as nickel, aluminum, etc.) is formed on the surface of the wafer, which is suitable for different welding processes, such as tin-lead soldering materials processed by soft soldering, or soldering materials with Aluminum fusion processing by brazing to connect with conductive parts.

The silicon wafer is cut into chips of a certain size and shape according to the required specifications of the rectifier diode chip, and the cut surface is chemically etched to remove the mechanical damage and pollution caused by cutting. At the same time, a silicon dioxide film is formed on the surface of the silicon crystal to obtain good reverse electrical characteristics. Apply JunctionPassivation and Coating to the cut surface after processing, that is to say, complete the construction of the chip part.

In terms of the preparation of diode chips, there are three main known design and construction methods:

(1) Cut the diode wafer into chips, weld the chips and electrical conductors to form welded semi-finished products, and then carry out chemical treatment and passivation sheathing on the cut surface of the chips. For example, the wafer electrode rectifier diode chip package (Sandwich Cell Construction) and the axial lead plastic molded package (Axial LeadPlastic Molded Package) developed by Westinghouse in the early days belong to it.

(2) Cut the aluminum-coated rectifier diode wafer into truncated conical chips by means of sandblasting and grinding. This type of chip is then chemically etched with a mixture of hydrofluoric acid and nitric acid at low temperature to form a silicon dioxide film on the silicon chip. The chemically processed chip is welded with electrical conductors to make a semi-finished product. For the welding of electrical conductors, if the electrodes are made of tungsten or molybdenum and other materials that match the thermal expansion coefficient, the aluminum film is used as the welding material for brazing connection; and the electrical conductors that are generally made of copper can be welded through copper. , silver, phosphorus alloy welding consumables and electrodes for brazing connection. Afterwards, carry out secondary chemical treatment on the cut surface of the chip, and coat it with a passivating glass sealant, and burn the seal layer. This design is a technology developed and patented by General Electric.

(3) After the wafer diffusion is completed, it is coated with a photoresist resist, and selectively local chemical etching is performed to make a cut groove with an opening on the P surface, so that the P-N junction is etched and exposed to form a half-cut of an individual chip. type of semi-fabricated wafer components. Passivation treatment and glass sheathing are continued on the half-cut wafer to complete the construction of the half-cut chip. Finally, the electrode surface is coated with a metal film and the chip is separated and cut to make a glass-encapsulated rectifier diode chip (Glass Passivated Pellet referred to as GPP).

GPP has better performance than diode chip packages, so GPP is still widely used in various types of rectifier diode components (Rectifier Circuit Moldules). Such as rectifier bridge (Bridge Rectifiers) and so on. In addition, small outline diodes (Small Outline Diode referred to as SOD) rectifier diodes are mostly produced by this method.

Although the known GPP manufacturing method is currently the most excellent silicon rectifier diode chip with sheath, it still has many shortcomings. For example, because the cut surface of GPP is a half-cut shape opened by the P surface, the cut angle of the P-N joint surface is a negative cut angle (Negative Beveld Cut). Under the reverse voltage load of this structure, the formed depletion region (Depletion Region) will cause the reverse electric field at the junction of the N-type cut surface and the sheath layer to expand in the direction of the junction. In chip design, it is necessary to reserve the position of the depletion region of sufficient size. As a result, chips with a larger area must be used, and their forward load power can be equivalent to chips made by vertical or positive cut methods. This will increase the production cost of the chip.

Secondly, chips made by the GPP method are not easy to obtain high reverse voltage withstand performance, which is also a defect of this method. Furthermore, the process of the GPP method requires high equipment investment and high operating costs, so that its indirect manufacturing costs are also high. Finally, when the chip made by this method is separated and cut, it will inevitably cause mechanical damage to the glass film, form micro-cracks and cause stress concentration. This phenomenon has become a very serious failure source (Operation Failure Source) in application operations. Although the industry has worked hard for many years, the improvement of the above shortcomings is still very limited. Therefore, the inventor of the present invention feels that the above-mentioned problems can be improved, so he devotes himself to research and cooperates with the application of theories, and proposes an invention with reasonable design and effective improvement of the above-mentioned problems.

Contents of the invention

The main purpose of the present invention is to provide a method for manufacturing a semiconductor diode chip and the semiconductor diode chip made with a sheath body, which can carry out a full-surround surface sheath on the silicon semiconductor diode, thereby obtaining better electrical performance. And can comprehensively solve the defects of the GPP law.

In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor diode chip, which includes the following steps: providing a wafer; forming a protective film on the front and back of the wafer; cutting the wafer to form a plurality of chips, each chip It includes a chip body, the chip body includes an upper surface, a lower surface and a surrounding surface adjacent to the upper surface and the lower surface, and the upper surface and the lower surface have protective films; the surrounding surfaces of each chip are flattened; each chip is spaced arrange in a jig; fill a sealing agent in the jig, and fill between each chip; soft bake the sealing agent in the jig, so that the sealing agent between each chip forms a protective film; Cutting the sheath film to form a plurality of chip units, the upper surface and lower surface of the chip body of each chip unit has a protective film, and the surrounding surface of the chip body has a sheath film; the sheath film of each chip unit is sintered and solidified as A sheath body; removing the protective film of each chip unit to expose the upper surface and lower surface of the chip body of each chip unit; forming a positive electrode metal film and a negative electrode on the upper surface and lower surface of the chip body of each chip unit respectively metal film to form a semiconductor diode chip with a sheath.

In order to achieve the above object, the present invention provides a semiconductor diode chip with an encapsulation, which includes a chip body and an encapsulation. The chip includes an upper surface, a lower surface and a surrounding surface adjacent to the upper surface and the lower surface; a positive metal film and a negative metal film are respectively formed on the upper surface and the lower surface. The encapsulation body is formed on the peripheral surface of the chip to cover the peripheral surface.

The beneficial effects of the semiconductor diode chip with the protective seal and the manufacturing method thereof of the present invention are:

1. The manufacturing method of the semiconductor diode chip of the present invention can be to utilize simple and cheap equipment, and effectively forms the sheath body on the peripheral surface of each chip, thereby can effectively reduce the production cost of prior art, and can Effectively simplify the complicated process steps of the prior art.

2. The manufacturing method of the semiconductor diode chip of the present invention can produce the semiconductor diode chip with the sheath body with good electrical properties, higher reverse withstand voltage performance and lower leakage current, and can be widely used in making Various rectifier diodes and various rectifier diode modules (Rectifier Circuit Modules), such as bridge rectifiers (Bridge Rectifiers), can also be applied to small outline diodes (Small Outline Diode, SOD).

3. In the manufacturing method of the semiconductor diode chip of the present invention, the sheath body of each chip is independently sintered and formed, and does not need to be cut again in the subsequent steps, so as to effectively solve the problem in the prior art that the sheath body needs to be cut again. Therefore, mechanical damage and micro-cracks may occur on the sheath; and the present invention can obtain a semiconductor diode chip with relatively little residual stress.

In order to further understand the techniques, methods and effects adopted to achieve the intended purpose, please refer to the following detailed descriptions and drawings of the present invention. It is believed that the purpose, characteristics and characteristics of the present invention can be deeply and specifically understood from this It is understood that the accompanying drawings are only for reference and illustration, and are not intended to limit the present invention.

Description of drawings

FIG. 1 is a schematic flowchart of a first embodiment of a method for manufacturing a semiconductor diode chip of the present invention.

FIG. 2 is a cross-sectional view of a wafer with a protective film in the first embodiment of the manufacturing method of the semiconductor diode chip of the present invention.

FIG. 3 is a schematic cross-sectional view of a chip cut from a wafer according to the first embodiment of the manufacturing method of the semiconductor diode chip of the present invention.

FIG. 4 is a schematic cross-sectional view of the planarized surface of the chip in the first embodiment of the manufacturing method of the semiconductor diode chip of the present invention.

5 is a top view of a plurality of chips disposed in a jig according to the first embodiment of the manufacturing method of semiconductor diode chips of the present invention.

6 is a schematic cross-sectional view of a plurality of chips disposed in a jig and surrounded by a protective film in the first embodiment of the method for manufacturing a semiconductor diode chip of the present invention.

FIG. 7 is a schematic cross-sectional view of a protective seal formed on the peripheral surface of the chip body in the first embodiment of the manufacturing method of the semiconductor diode chip of the present invention.

FIG. 8 is a cross-sectional view of a first embodiment of a semiconductor diode chip with an encapsulation according to the present invention.

9 is a cross-sectional view of a second embodiment of the manufacturing method of a semiconductor diode chip of the present invention, in which a sheath body is formed on the peripheral surface of the chip body and nickel layers are formed on the upper and lower surfaces.

FIG. 10 is a cross-sectional view of a second embodiment of the manufacturing method of a semiconductor diode chip of the present invention, in which a protective seal is formed on the peripheral surface of the chip body and nickel silicide layers are formed on the upper and lower surfaces.

FIG. 11 is a cross-sectional view of a second embodiment of a semiconductor diode chip with an encapsulation according to the present invention.

【Symbol Description】

1: chip

2: Chip unit with a sheath

3: Semiconductor diode chip with sheath

10: Wafer

100: chip body

101: upper surface

102: lower surface

103: surrounding surface

20: Protective film

30: fixture

40: Sealant

41: Sheath film

42: Enclosure

51: positive metal film

52: Negative electrode metal film

60: nickel layer

61: Nickel silicide layer

a-a, b-b: cutting line

S1～S11: Process steps

detailed description

[First embodiment]

Please refer to FIG. 1 to FIG. 8 together, which are schematic flow charts and schematic cross-sectional views of the semiconductor diode chip manufacturing method of the present invention. As shown in Figure 1, the semiconductor diode chip manufacturing method includes the following steps:

Step S1 : providing a wafer 10 ; for example, the wafer is a rectifier diode wafer in which the P-N layer is diffused through a standard diffusion process (Standard Diffusion Process).

Step S2: As shown in FIG. 2 , a protective film 20 is formed on the front and back of the wafer 10 . For example, the protective film can be a photoresist film, which is used to protect the crystal grains on the surface of the wafer 10 from being damaged or corroded in subsequent steps; preferably, the protective film 20 can be made by spin coating. Coating evenly on the front and back of the wafer 10 can also be done by appropriately coordinating the steps of soft baking, exposure and hard baking, so that the protective film 20 can be firmly formed on the front and back of the wafer 10 .

Step S3: As shown in FIG. 2 , cut the wafer 10 along an appropriate pitch (the dotted line a-a in the figure is the cutting line) to form a plurality of chips 1 (as shown in FIG. 3 ); each chip 1 includes a chip body 100, which It includes an upper surface 101, a lower surface 102, and a peripheral surface 103 adjacent to the upper surface and the lower surface; wherein, the upper surface 101 and the lower surface 102 are respectively covered by the protective film 20 and are not exposed, and the peripheral surface 103 is the wafer 10 The cut surface is exposed and not protected by any structure. In practical applications, the cutting method can be selected according to the material of the chip and the shape to be formed after cutting the chip (such as a truncated cone, a square truncated cone with rounded corners, or a hexagonal truncated cone with rounded corners); for example, it can be It is carried out by chemical etching or sandblasting cutting, and the shape of the chip after cutting can be naturally formed into a truncated cone shape, and if it is constructed by the N surface of the wafer 10, a tangent angle can be naturally obtained. Wherein, according to the different cutting methods selected, the peripheral surface 103 of the chip body 100 has different degrees of roughness.

Step S4: As shown in FIG. 4 , planarize the surrounding surface 103 of the chip body 100 of each chip 1 . For example, it can be carried out by means of chemical etching or sandblasting; preferably, it can be carried out by means of pickling. Specifically, when the wafer 10 is cut in step S3, each cutting surface of the wafer 10 (that is, the surrounding surface 103 of each chip body 100) may have roughness, fine cracks, and poor alignment of the crystal lattice. , and through the planarization (such as pickling) process of this step, these roughness, fine cracks, and poor alignment of the crystal lattice can be eliminated, so that the surrounding surface 103 of each chip body 100 is a smooth flat surface, and then It can ensure that the encapsulation body formed on the surrounding surface in the subsequent steps can closely bond with the surrounding surface of the chip body. For example, a chemical erosion cutting operation can be performed using a mixture of hydrofluoric acid and nitric acid as the main agent, and a silicon dioxide film can be formed on the peripheral surface 103 of each chip body 100 at the same time during the planarization process; Alternatively, the chemical etching can be performed with a mixture of potassium hydroxide as the main agent, and a silicon dioxide film can also be formed on the peripheral surface 103 of each chip body 100 during the planarization process. Wherein, during the planarization process, the crystal grains on the upper surface 101 and the lower surface 102 of each chip body 100 can be protected by the protective film 20 from being damaged by the relevant chemical etching solution.

Step S5 : arrange the chips 1 at intervals on a jig 30 . For example, the jig 30 can be a receiving groove, and there can be a plurality of positioning parts for fixing the chips 1 correspondingly inside, for example, it can be vacuum suctioned or glued.

Step S6 : as shown in FIG. 5 , fill a sealing agent 40 between each chip 1 in the jig 30 . Wherein, the sealing agent 40 may be a paste mixed with passivation glass powder and water or a vehicle agent (Vehicle Agent), or may be selected according to requirements. In practical applications, in order to completely fill the sealing agent 40 between each chip 1, too much sealing agent 40 may be filled in before the jig 30, and then cooperate with the operation of a scraper to scrape off the upper surface of each chip 1 The excess encapsulant 40 is used to ensure that the encapsulant 40 is completely filled between the chips 1 .

Step S7 : As shown in FIG. 6 , soft-bake the encapsulant (not shown) filled in the peripheral surface 103 of each chip 1 , so that the encapsulant is preliminarily cured into the encapsulant film 41 for subsequent cutting operations.

Step S8: As shown in FIG. 6 , cut the sheath film 41 according to an appropriate interval (for example, b-b shown in the figure is a cutting line) to form a plurality of chip units (not shown); so that each chip body 100 except the upper The protective film 20 is formed on the surface 101 and the lower surface 102 respectively, and the surrounding surface 103 is also protected by the protective film 41 , that is, all surfaces of each chip body 100 are covered and protected by the film body.

Step S9: As shown in FIG. 7 , sinter and solidify the jacket film of each chip unit having a jacket film on the surrounding surface to form a jacket body 42, so as to become a chip unit 2 with a jacket body, that is, each chip body 100 The upper surface 101 and the lower surface 102 of the upper surface 101 and the lower surface 102 are respectively formed with a protective film 20 , and the surrounding surface 103 is formed with a protective seal 42 . Among them, through high temperature sintering, the fillers or impurities in the original encapsulant (film) can be removed at the same time, and the passivation glass can be recombined to be more closely combined with the surrounding surface 103 of the chip body 100 . In practical applications, each chip unit 2 with a protective seal can also be cleaned by vibration to make the surface of the protective seal 42 smoother.

Step S10 : removing the protective film 20 of each chip unit 2 with the encapsulation body, so as to expose the upper surface 101 and the lower surface 102 of the chip body 100 of each chip unit 2 .

Step S11: As shown in FIG. 8 , form an anode metal film 51 and a cathode metal film 52 on the upper surface 101 and the lower surface 102 of the chip body 100 of each chip unit, respectively, to form a semiconductor diode chip with a sheath 3. Wherein, the positive electrode metal film 51 and the negative electrode metal film 52 may be metal films with Ohmic contact, such as aluminum plating, nickel, silver plating or gold secondary plating.

Wherein, the semiconductor diode chip 3 with a protective seal manufactured through the above process steps can be subsequently tested, sorted and graded, and packaged to become an industrial standard product. Its shape can be circular, truncated conical, hexagonal truncated with rounded corners, square with rounded corners, hexagonal with rounded corners or other applicable shapes. The finished product has a smooth glass envelope, which is beneficial for subsequent construction, such as automatic feeding, fixture positioning, etc.

As shown in FIG. 8 , it is a semiconductor diode chip 3 with an encapsulation body according to the present invention, which includes: a chip body 100 and an encapsulation body 42 . The chip body 100 includes an upper surface 101, a lower surface 102, and a surrounding surface 103 adjacent to the upper surface and the lower surface; wherein, the upper surface 101 and the lower surface 102 are respectively formed with a positive electrode metal film 51 and a negative electrode metal film 52, and A sheath 42 is formed on the surrounding surface 103 .

[Second Embodiment]

Please refer to FIGS. 9 to 11 together. In practical applications, when gold is used as the positive electrode metal film 51 and the negative electrode metal film 52, since gold and silicon have relatively poor bonding, it can be used on the chip body 100. The surface 101 and the lower surface 102 form a nickel layer 60 for bonding with gold, so as to facilitate the bonding between the metal film and the chip body 100. The relevant steps can be carried out after step S10 in the foregoing embodiment, and the steps are as follows:

Step S101: As shown in FIG. 9, a nickel layer 60 is formed on the exposed upper surface 101 and lower surface 102 of the chip body 100, respectively;

Step S102: As shown in FIG. 10, a nickel silicide layer 61 is formed between the upper surface 101 of the chip body 100 and the nickel layer 60 by high temperature sintering, and a nickel silicide layer 61 is formed between the lower surface 102 of the chip body 100 and the nickel layer 60. A nickel silicide layer 61 . Therefore, the nickel layer 60 can be combined more closely with the upper surface 101 and the lower surface 102 of the chip body 100 .

As shown in FIG. 11 , subsequently in step S11, an anode metal film 51 (especially a metal film containing gold element) is directly formed on the nickel layer 60 on the upper surface 101 of the chip body 100, and the chip body 100 The negative electrode metal film 52 is formed on the nickel layer 60 on the lower surface 102 of the battery.

[Possible effects of the implementation of the present invention]

1. The semiconductor diode chip with a sheath made by the semiconductor diode chip manufacturing method of the present invention has excellent electrical and mechanical properties.

2. The semiconductor diode chip with the sheath made by the semiconductor diode chip manufacturing method of the present invention has remarkable effects on the improvement of reverse withstand voltage and the reduction of leakage current.

3. Compared with the known that a plurality of chips form the sheath body at the same time, and then respectively carry out the cutting of the sheath body of the chip, the manufacturing method of the semiconductor diode chip of the present invention, the sheath body formed on the surrounding surface of each chip, Each chip is sintered separately, so after each chip is formed with a sheath body, no cutting operation is required, so that problems such as mechanical damage or micro cracks that may be caused by cutting the sheath body can be avoided, and can be obtained Chips with very little residual stress.

4. The manufacturing method of the semiconductor diode chip of the present invention can be mass-produced using simple and cheap equipment, which is enough to reduce the cost of raw materials and can effectively simplify the complicated steps of the conventional manufacturing method.

5. The manufacturing method of the semiconductor diode chip of the present invention and the semiconductor diode chip with a sheath made thereof can be widely used in various types of rectifier diodes and various types of rectifier diode modules (Rectifier Circuit Modules), For example, bridge rectifiers (Bridge Rectifiers), etc.; can also be applied to small outline diodes (Small Outline Diode, SOD).

However, the above descriptions are only preferred embodiments of the present invention, and are not intended to limit the scope of patent protection of the present invention. Therefore, all equivalent changes made by using the description and drawings of the present invention are all included in the scope of the present invention. Within the protection scope of the claims, I agree with Chen Ming.

Claims (5)

1. a method for making a semiconductor diode chip, characterized in that, the method for making a semiconductor diode chip comprises the following steps: providing a wafer; forming a protective film on the front and back of the wafer; dicing the wafer to form a plurality of chips, each of the chips comprising a chip body, the chip body comprising an upper surface, a lower surface, and a peripheral surface adjacent to the upper surface and the lower surface, and The upper surface and the lower surface have the protective film; planarizing said surrounding surfaces of each of said chips; arranging each of the chips at intervals on a jig; filling a sealing compound on the jig, and filling between each of the chips; soft-baking the encapsulant in the jig, so that the encapsulant between each of the chips forms a sheath film; cutting the protective film to form a plurality of chip units, the upper surface and the lower surface of the chip body of each of the chip units have the protective film, and the surrounding surface of the chip body having said protective film; sintering and curing the covering film of each of the chip units into a covering body; removing the protective film of each of the chip units to expose the upper surface and the lower surface of the chip body of each of the chip units; and An anode metal film and a cathode metal film are respectively formed on the upper surface and the lower surface of the chip body of each of the chip units to form a semiconductor diode chip with a sheath. 2. The method for manufacturing a semiconductor diode chip according to claim 1, wherein the encapsulant is made of passivated glass frit. 3 . The method for manufacturing a semiconductor diode chip according to claim 1 , wherein the shape of the chip is a circle, a square with rounded corners or a hexagon with rounded corners. 4 . 4. the manufacture method of semiconductor diode chip according to claim 1 is characterized in that, described anode metal film and described negative electrode metal film are aluminum coating, nickel, silver coating or gold secondary coating, and described protection film is Photoresist film. 5. the manufacture method of semiconductor diode chip according to claim 1, is characterized in that, after removing the described protective film step of each described chip unit, also further comprises the following steps: plating a nickel layer on the upper surface and the lower surface of the chip body of each of the chip units; and Using high temperature sintering, a nickel silicon layer is formed between each nickel layer and the upper surface and the lower surface respectively.