CN104572382A - I2C (inter-integrated circuit) bus test jig - Google Patents
I2C (inter-integrated circuit) bus test jig Download PDFInfo
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- CN104572382A CN104572382A CN201310477035.XA CN201310477035A CN104572382A CN 104572382 A CN104572382 A CN 104572382A CN 201310477035 A CN201310477035 A CN 201310477035A CN 104572382 A CN104572382 A CN 104572382A
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- 238000012360 testing method Methods 0.000 title claims abstract description 70
- 230000005540 biological transmission Effects 0.000 claims abstract description 7
- 230000008054 signal transmission Effects 0.000 abstract description 2
- 238000011161 development Methods 0.000 description 4
- 238000012806 monitoring device Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003340 mental effect Effects 0.000 description 1
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- 208000024891 symptom Diseases 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
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Abstract
The invention provides an I2C (inter-integrated circuit)bus test jig. On one hand, the I2C bus test jig is connected with a test-end computer provided with a test software control platform, and on the other hand, the I2C bus test jig is connected with an I2C bus interface of a to-be-tested circuit board; the I2C bus interface of the to-be-tested circuit board is connected with an I2C bus in the to-be-tested circuit board. The I2C bus test jig comprises a microprocessor which is connected with the test software control platform of the test-end computer through a USB (universal serial bus) transmission line and used for executing a test command generated by the test software control platform according to set test parameters, and an I2C bus extension device which is connected between the microprocessor and the to-be-tested circuit board and used for I2C signal transmission. Through the arrangement, the I2C bus test jig is capable of testing whether the I2C bus of the to-be-tested circuit board meets I2C standards or not.
Description
[technical field]
The present invention relates to a kind of I2C bus test tool.
[background technology]
At present, often can run into because voltage sensor (voltage sensor) and temperature sensor (tempreature sensor) read that value is abnormal to be caused client and company's constituent parts to drop into many manpowers and mental and physical efforts and time to find question classification, but due to the value of reading of these sensors be by iBMC(integrated backplane Management Controller) through I2C(Inter-Integrated Circuit) and the data of bus reading device again after iBMC understands the result reporting out, but because bad phenomenon (failed symptom) bad copying causes the cost much time in stage of makeing mistakes finding the direction of problem, finally confirm to be that certain I2C bus does not have the mechanism of time-out (timeout) and the overtime driver of I2C do not added by the firmware (firmware) of iBMC itself yet, thus cause iBMC to read I2C bus read value misjudgment. also because do not have for the test in I2C sequential timeout feature in the development phase, just do not find out the problem potential when the development and Design time in time, cause the follow-up problem run at system end.
In view of this, the invention provides a kind of I2C bus test tool, whether its I2C bus can testing a circuit board under test meets I2C specification.
[summary of the invention]
Fundamental purpose of the present invention is to provide a kind of I2C bus test tool, and whether its I2C bus can testing a circuit board under test meets I2C specification, gets rid of the bad problem that I2C bus causes in development.
For reaching above-mentioned purpose, the invention provides a kind of I2C bus test tool, the test lead computer of its one side connection one containing testing software parametric controller connects, be connected with the I2C bus interface of circuit board under test on the other hand, the I2C bus interface of described circuit board under test connects the I2C bus of described circuit under test intralamellar part, and described I2C bus test tool comprises:
One microprocessor, it is connected through the testing software parametric controller of USB transmission line with described test lead computer, for performing the test command of described testing software parametric controller according to the test parameter generation of setting; And
One I2C bus extension device is connected between described microprocessor and circuit board under test for the transmission carrying out I2C signal.
Preferably, described I2C bus has an I2C bus input interface and several I2C bus output interfaces, the I2C bus input interface of described I2C bus extension device connects described microprocessor by I2C bus, and the I2C bus output interface of described I2C bus is connected with the I2C bus interface of described circuit board under test.
Preferably, described I2C bus extension device is 4 passage I2C bus switchs with interrupt logic and reset.
Compared with prior art, the test command that the test parameter that I2C bus test tool of the present invention performs the setting of described test lead computer foundation by microprocessor produces, and be connected between described microprocessor and circuit board under test by I2C bus extension device, when starting to test, microprocessor stops sending I2C signal to the I2C bus interface of circuit board under test, now whether tester has meet I2C specification by the I2C bus of signal monitoring device monitoring circuit board under test, thus can circuit board development get rid of due to I2C bus cause bad.
[accompanying drawing explanation]
Fig. 1 is a kind of I2C bus test of the present invention tool block schematic diagram.
[embodiment]
Refer to shown in Fig. 1, a kind of I2C bus test of the present invention tool 1, it connects a test lead computer 2 being loaded with I2C test software programs 21 on the one hand and connects, be connected with the circuit board under test 3 with I2C bus interface 31 on the other hand, the I2C bus interface 31 of described circuit board is for connecting the I2C bus (not shown) of described measurement jig 1 and described circuit board under test 3 inside, and I2C bus test tool 1 of the present invention comprises:
One microprocessor 10, it is connected with described test lead computer 2 through USB transmission line, for performing the test command that described test lead computer 2 produces according to the test parameter set;
One I2C bus extension device 11 is connected to described microprocessor 10 and is connected with the I2C bus interface 31 of described circuit board under test 3 for carrying out I2C Signal transmissions between described microprocessor 10 and described circuit board under test 3, in the present embodiment, described I2C bus extension device 11 has an I2C bus input interface 111 and several I2C bus output interfaces 112, the I2C bus input interface 111 of described I2C bus extension device 11 connects described microprocessor 10 by I2C bus, for the I2C signal receiving described microprocessor 10, the I2C bus output interface 112 of several I2C buses described is connected with the I2C bus interface 31 of described circuit board under test 3, for being connected with the different I 2C interface 31 of circuit board under test 3 simultaneously, to test multiple I2C bus simultaneously, in the present embodiment, described I2C bus extension device 11 is 4 passage I2C bus switchs with interrupt logic and reset, certainly also to can be other form, such as there are 8 passage I2C bus switchs of interrupt logic and reset, only illustrate at this, and it is unrestricted.
In order to monitor circuit board under test 3 state in testing, a signal monitoring device 4 can be connected so that tester judges whether tested I2C bus meets specification at the tested I2C bus interface place of described circuit board under test 3, described signal monitoring device 4 can be oscillograph or PC, observes tested I2C bus whether meet specification by PC.
When tested, tester starts test procedure by test lead computer 2, in the present embodiment, the order of I2C signal one special time is interrupted to send, described microprocessor 10 stops sending I2C signal after receiving the order of interruption I2C signal one special time, meanwhile, described I2C bus extension device 11 stops transmission I2C signal to described circuit board under test 3, and whether tester the signal monitoring device 4 I2C bus of monitoring I2C bus interface 31 correspondence of circuit-under-test plate 3 can meet specification.
In sum, the various embodiments described above and diagram are only the preferred embodiment of the present invention, when can not with the scope of restriction the invention process, the equalization change namely generally done according to the present patent application the scope of the claims with modify, all should be covered by the present invention within the scope of the patent.
Claims (3)
1. an I2C bus test tool, the test lead computer of its one side connection one containing testing software parametric controller connects, be connected with the I2C bus interface of circuit board under test on the other hand, the I2C bus interface of described circuit board under test connects the I2C bus of described circuit under test intralamellar part, it is characterized in that, comprising:
One microprocessor, it is connected through the testing software parametric controller of USB transmission line with described test lead computer, for performing the test command of described testing software parametric controller according to the test parameter generation of setting; And
One I2C bus extension device is connected between described microprocessor and circuit board under test for the transmission carrying out I2C signal.
。
2. I2C bus test tool according to claim 1, it is characterized in that, described I2C bus has an I2C bus input interface and several I2C bus output interfaces, the I2C bus input interface of described I2C bus extension device connects described microprocessor by I2C bus, and the I2C bus output interface of described I2C bus is connected with the I2C bus interface of described circuit board under test.
3. I2C bus test tool according to claim 1, is characterized in that, described I2C bus extension device is 4 passage I2C bus switchs with interrupt logic and reset.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310477035.XA CN104572382A (en) | 2013-10-14 | 2013-10-14 | I2C (inter-integrated circuit) bus test jig |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310477035.XA CN104572382A (en) | 2013-10-14 | 2013-10-14 | I2C (inter-integrated circuit) bus test jig |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104572382A true CN104572382A (en) | 2015-04-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201310477035.XA Pending CN104572382A (en) | 2013-10-14 | 2013-10-14 | I2C (inter-integrated circuit) bus test jig |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106371954A (en) * | 2016-08-19 | 2017-02-01 | 浪潮(北京)电子信息产业有限公司 | 10-bit slave address-based I2C bus verification method and system |
| CN106649093A (en) * | 2016-10-21 | 2017-05-10 | 广州爱九游信息技术有限公司 | Application testing method and system used for external test platform |
| CN107590034A (en) * | 2016-07-08 | 2018-01-16 | 佛山市顺德区顺达电脑厂有限公司 | I2C host adapter systems |
| CN109387766A (en) * | 2017-08-08 | 2019-02-26 | 许继集团有限公司 | Relay protection cpu motherboard method for testing performance and system |
| CN109388529A (en) * | 2017-08-08 | 2019-02-26 | 许继集团有限公司 | A kind of relay protection cpu motherboard method for testing performance and system |
| CN110347139A (en) * | 2019-05-22 | 2019-10-18 | 苏州浪潮智能科技有限公司 | A kind of test fixture of I2C bus |
| CN111258828A (en) * | 2020-01-15 | 2020-06-09 | 深圳宝龙达信创科技股份有限公司 | I2C bus test method, test device and computer readable storage medium |
| CN112000533A (en) * | 2020-08-14 | 2020-11-27 | 北京浪潮数据技术有限公司 | PCIE equipment bus test method and test tool |
-
2013
- 2013-10-14 CN CN201310477035.XA patent/CN104572382A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107590034A (en) * | 2016-07-08 | 2018-01-16 | 佛山市顺德区顺达电脑厂有限公司 | I2C host adapter systems |
| CN106371954A (en) * | 2016-08-19 | 2017-02-01 | 浪潮(北京)电子信息产业有限公司 | 10-bit slave address-based I2C bus verification method and system |
| CN106371954B (en) * | 2016-08-19 | 2020-02-04 | 苏州浪潮智能科技有限公司 | I2C bus verification method and system based on 10-bit slave address |
| CN106649093A (en) * | 2016-10-21 | 2017-05-10 | 广州爱九游信息技术有限公司 | Application testing method and system used for external test platform |
| CN109387766A (en) * | 2017-08-08 | 2019-02-26 | 许继集团有限公司 | Relay protection cpu motherboard method for testing performance and system |
| CN109388529A (en) * | 2017-08-08 | 2019-02-26 | 许继集团有限公司 | A kind of relay protection cpu motherboard method for testing performance and system |
| CN109388529B (en) * | 2017-08-08 | 2023-10-20 | 许继集团有限公司 | Relay protection CPU (Central processing Unit) mainboard performance detection method and system |
| CN110347139A (en) * | 2019-05-22 | 2019-10-18 | 苏州浪潮智能科技有限公司 | A kind of test fixture of I2C bus |
| CN111258828A (en) * | 2020-01-15 | 2020-06-09 | 深圳宝龙达信创科技股份有限公司 | I2C bus test method, test device and computer readable storage medium |
| CN112000533A (en) * | 2020-08-14 | 2020-11-27 | 北京浪潮数据技术有限公司 | PCIE equipment bus test method and test tool |
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| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150429 |
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| WD01 | Invention patent application deemed withdrawn after publication |