CN104571240B - A kind of High Precision Bandgap Reference - Google Patents

Abstract

A high precision bandgap voltage reference. It consists of an operational amplifier OP, a plurality of PMOS transistors PM connected with a plurality of NMOS transistors NM, a plurality of PNP transistors Q, and several resistors R. It adopts the method of implementing temperature compensation in the positive and negative temperature ranges respectively. The NMOS tube is used to shunt the current to achieve this purpose, and the voltage rejection ratio of the bandgap reference voltage source is improved by introducing negative feedback between the operational amplifier OP and the power supply VCC, so that the bandgap reference voltage source can obtain a high-precision reference voltage; in It has a temperature coefficient below 8.20ppm/℃ in the temperature range of ‑40‑120℃ and a power supply voltage rejection ratio of 83.0dB at low frequencies. It can be widely used in civilian or military integrated circuits that require high-precision reference potentials.

Description

A High Precision Bandgap Reference Voltage Source

Technical field:

The invention belongs to the field of bandgap reference voltage sources in integrated circuits.

Background technique:

The bandgap reference voltage source is one of the important components of many chips. It has many applications where high-precision reference potentials are required, such as comparators, ADCs, and DACs. Its performance has a great impact on chip performance. The main indicators to measure the performance of the bandgap reference voltage source are the temperature coefficient and the power supply voltage rejection ratio. With the development of technology and more stringent applications, the high-precision performance indicators of the bandgap reference voltage source are getting higher and higher.

The circuit structure of the existing traditional bandgap reference voltage source is shown in Figure 2. It mostly adopts the first-order temperature compensation method. It is composed of the eighth PMOS transistor PM8, the ninth PMOS transistor PM9, the tenth PMOS transistor PM10, and the operational amplifier. OP1, the fifth PNP triode Q5, the sixth PNP triode Q6, the seventh PNP triode Q7, the fifth resistor R5, the sixth resistor R6, the power supply VCC1, the ground terminal GND1, and the reference voltage output terminal Vref1 are connected to form Band Gap Voltage Reference. This structure is difficult to achieve a temperature coefficient below 10ppm/°C in civil (-20-85°C) and military (-40-120°C) applications, and its power supply voltage rejection ratio is not ideal.

Invention content:

In order to overcome the shortcomings that the temperature coefficient and power supply voltage rejection ratio of the existing traditional bandgap reference voltage source cannot meet the requirements of high-precision applications, the present invention proposes a high-precision bandgap quasi-voltage source, see accompanying drawing 1, it It consists of a positive temperature coefficient generation circuit 1, a positive temperature coefficient compensation voltage generation circuit 2, and a reference voltage output circuit 3; it consists of an operational amplifier OP, a first PMOS transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, and a first The NMOS transistor NM1, the first PNP triode Q1, the second PNP triode Q2, the first resistor R1, the second resistor R2, the power supply VCC, and the ground GND are connected to form a positive temperature coefficient current generation circuit 1; the fourth PMOS transistor PM4, The fifth PMOS transistor PM5, the second NMOS transistor NM2, the third NMOS transistor NM3, the third PNP transistor Q3, and the third resistor R3 are connected to form a positive temperature coefficient compensation current generating circuit 2; the sixth PMOS transistor PM6, the seventh PMOS transistor The tube PM7, the fourth NMOS tube NM4, the fifth NMOS tube NM5, the fourth PNP triode Q4, the fourth resistor R4, and the reference voltage output terminal Vref are connected to form a reference voltage output circuit; the connection between the above three circuits Yes: the power supply of the first PMOS transistor PM1 to the seventh PMOS transistor PM7 is connected to the power supply VCC; the gates of the third PMOS transistor PM3 to the seventh PMOS transistor PM7 are connected in common; the first PNP transistor Q1 to the fourth The base and emitter of the PNP transistor Q4 are connected in common; the drain of the fifth PMOS transistor PM5 in the positive temperature coefficient compensation current generating circuit is connected to the common point of the gate of the second NMOS transistor NM2 and the second resistor R2 To the gate of the fourth NMOS transistor NM4 in the output circuit 3 of the reference circuit.

The advantages of the high-precision bandgap reference voltage source of the present invention are that the power supply voltage rejection ratio is improved, the temperature coefficient is improved, and it is suitable for occasions requiring high precision.

Description of drawings:

Fig. 1 is a kind of high precision bandgap reference voltage source circuit structural diagram of the present invention

Fig. 2 is a circuit structure diagram of a conventional bandgap reference voltage source in the prior art

Specific embodiments: the invention is further described as follows with reference to the accompanying drawings in conjunction with specific embodiments:

A circuit structure of a high-precision bandgap reference voltage source is shown in Figure 1. It consists of the following parts: a positive temperature coefficient current generation circuit 1, a positive temperature coefficient compensation voltage generation circuit 2, and a reference output branch circuit 3.

The positive temperature coefficient current generating circuit 1 is composed of an operational amplifier OP, a first PMOS transistor PM1, a second PMOS transistor PM2, a first NMOS transistor NM1, a first PNP transistor Q1, a second PNP transistor Q2, a first resistor R1, and a second resistor R2 is connected; the base stages of the first PNP transistor Q1 and the second PNP transistor Q2 are both grounded and connected in a diode manner. The operational amplifier makes the potentials of A and B points equal through negative feedback, and a positive voltage is generated on the first resistor R1. The temperature coefficient voltage, and then the positive temperature coefficient current is copied to other branches through the PMOS current mirror for temperature compensation; in order to improve the deficiency of the power supply voltage rejection ratio of the traditional bandgap reference source, the first NMOS transistor NM1 and the first PMOS are introduced. The active load inverting amplifier composed of tube PM1 and the negative feedback loop formed by the second resistor R2 suppress the influence of fluctuations in the power supply voltage; the gate of the first NMOS transistor NM1 is connected to the output terminal of the operational amplifier OP, and the drain is connected to At the drain of the first PMOS transistor PM1, the gate and drain of the first PMOS transistor PM1 are connected to the gates of the PMOS transistor current mirror pair PM2 and PM3, and the second resistor R2 is connected between the first resistor R1 and the second PMOS transistor. Between tube PM2; the working mechanism of this feedback loop is as follows: when the power supply voltage changes, for example, when the power supply voltage increases, this will cause the current of the PMOS current mirror branch to increase, and the potential change at point A will Due to the existence of the first resistor R1, it is greater than point B, and the output of the operational amplifier will therefore drop. The inverting amplifier composed of the first NMOS transistor NM1 and the first PMOS transistor PM1 will then make the gates of the first PM1 and the third PM3 transistor The potential rises accordingly, and the drop of the gate-source voltage reduces the branch current, realizing the negative feedback process of the power supply voltage fluctuation. At the same time, its strength can be flexibly adjusted due to the introduction of the second resistor R2, avoiding the occurrence of For the problem that the negative feedback strength is too strong or too weak, the above measures greatly improve the power supply voltage rejection ratio of the bandgap reference source.

The positive temperature coefficient compensation voltage generation circuit 2 and the reference output branch circuit 3 constitute the temperature compensation core part of the bandgap reference voltage source. The positive temperature coefficient compensation voltage generating circuit is composed of the fourth and fifth PMOS transistors PM4 and PM5, the second to third NMOS transistors NM2 and NM3, the third resistor R3, and the third PNP transistor Q3; wherein, the second NMOS transistor NM2 The drain and the source are respectively connected to both ends of the second resistor R3, the gate is connected between the fifth PMOS transistor PM5 and the third resistor R3, and the function of the second NMOS transistor NM2 is to shunt the PMOS flowing through the third resistor R3 The positive temperature coefficient current copied from the current mirror, the drain and source of the third NMOS transistor NM3 are respectively connected to the two ends of the third PNP transistor Q3, and the gate is connected between the fifth PMOS transistor PM5 and the third resistor R3 , the function of the NMOS transistor NM3 is to shunt the positive temperature coefficient current flowing through the PNP transistor Q3; the reference output branch circuit is composed of the sixth and seventh PMOS transistors PM6 and PM7, the fourth and fifth NMOS transistors NM4 and NM5, and the fourth The resistor R4 is connected to the fourth PNP transistor Q4; wherein, the drain and the source of the fourth NMOS transistor NM4 are respectively connected to both ends of the fourth resistor R4, and the gate is connected to the fifth PMOS transistor PM5 and the third resistor R3. Between, the function of the fourth NMOS transistor NM4 is to shunt the positive temperature coefficient current flowing through the fourth resistor R4, the drain and the source of the fifth NMOS transistor NM5 are respectively connected to both ends of the fourth PNP transistor Q4, and the gate is connected to Between the seventh PMOS transistor PM7 and the fourth resistor R4, the function of the fifth NMOS transistor NM5 is to shunt the positive temperature coefficient current flowing through the fourth PNP transistor Q4; the working principle and mechanism of the core part of the temperature compensation of the bandgap reference source are as follows : In order to realize the piecewise linear compensation of temperature, it is considered that when the bandgap reference source is in a state where the negative temperature coefficient is dominant, the control of the gate voltage of the fifth NMOS transistor NM5 connected across the fourth PNP transistor Q4 at this time A corresponding part of the current will be missed, the current flowing through the fourth PNP transistor Q4 will decrease, and the voltage drop on it will also decrease. Since the voltage drop on it has a negative temperature coefficient, it is equivalent to weakening The influence of its negative temperature coefficient makes the change of the output voltage of the bandgap reference source more gentle in the temperature range (low temperature section) where the negative temperature coefficient is dominant, thus realizing the temperature piecewise linear compensation in the negative temperature coefficient range. Considering that when the bandgap reference source is in a state where the positive temperature coefficient is dominant, the fourth NMOS transistor NM4 connected across the fourth resistor R4 will also shunt a part of the current under the control of the gate voltage, and flow through the first The positive temperature coefficient current of the four resistors R4 will decrease, so the positive temperature coefficient voltage on the fourth resistor R4 will also decrease, which is equivalent to weakening the dominant influence of its positive temperature coefficient, thus making the bandgap reference source The output voltage of the output voltage changes more smoothly in the temperature range (high temperature section) where the positive temperature coefficient is dominant, thus realizing the temperature piecewise linear compensation in the positive temperature coefficient range. The gate voltage of the fourth NMOS transistor NM4 is provided by the positive temperature coefficient compensation voltage generating circuit. This is because the four NMOS transistors NM4 are shunt NMOS transistors that compensate for the high-temperature section when the positive temperature coefficient is dominant. When the temperature is high, due to the NMOS transistor As the threshold voltage decreases, the current flowing through the four NMOS transistors NM4 will increase a lot. In order to avoid the negative temperature coefficient of the high temperature section introduced thereby, the gate control voltage of the fourth NMOS transistor NM4 must meet the following conditions: a) When the circuit When entering the temperature range where the positive temperature coefficient current is dominant, the gate of the fourth NMOS transistor NM4 must have sufficient voltage to ensure that considerable current can be leaked at this time to reduce the positive temperature coefficient voltage on the fourth resistor R4; b) After entering a higher temperature, the gate voltage of the fourth NMOS transistor NM4 must drop to ensure that too much current will not be leaked so that the bandgap reference source has a negative temperature coefficient. For this reason, the positive temperature coefficient compensation voltage generating circuit is used to provide the gate voltage of the fourth NMOS transistor NM4, wherein the resistance of the third resistor R3 is relatively large to ensure that the positive temperature coefficient compensation voltage is sufficient in the low temperature section, while the second NMOS The larger width-to-length ratio of the tube will cause its output control voltage to drop in the high temperature section, so as to meet condition b. The bandgap reference source adopting the above subsection temperature compensation measures has very good temperature characteristics.

The method designed above using negative feedback to improve the power supply voltage rejection ratio of the bandgap reference source and realizing segmental temperature linear compensation through the NMOS tube shunt can effectively improve the current bandgap reference source power supply voltage rejection ratio and its temperature coefficient. The advantage is that the circuit is simple and clear, and the performance is excellent, and the second is that the improvement effect is obvious. With reference to the CSMC0.5μm standard, this bandgap reference source has a power supply voltage rejection ratio of 83.0dB at low frequencies and a temperature coefficient of 8.20ppm/℃ in the temperature range of -40-120℃ under the Cadence Specter simulator. These simulation results have well verified the effectiveness of the above measures.

Claims (1)

1. a High Precision Bandgap Reference, it is characterised in that it is by positive temperature coefficient current generating module (1), positive temperature Compensating coefficient voltage generating module (2), benchmark output branch road module (3) connect and compose；By operational amplifier OP, a PMOS Pipe PM1, the second PMOS PM2, the 3rd PMOS PM3, the first NMOS tube NM1, a PNP triode Q1, the 2nd PNP triode Q2, the first resistance R1, the second resistance R2, power supply VCC, ground connection GND connect into positive temperature Degree coefficient current generation module (1)；By the 4th PMOS PM4, the 5th PMOS PM5, the second NMOS tube NM2, 3rd NMOS tube NM3, the 3rd PNP triode Q3, the 3rd resistance R3 connect into positive temperature coefficient and compensate voltage generation mould Block (2)；By the 6th PMOS PM6, the 7th PMOS PM7, the 4th NMOS tube NM4, the 5th NMOS tube NM5, the 4th PNP triode Q4, the 4th resistance R4, reference voltage output end Vref connect into benchmark output branch road module (3)； Connection between above three module is: the first PMOS PM1 is connected to power supply altogether to the source class of the 7th PMOS PM7 VCC；First PMOS PM1 connects the most altogether to the grid of the 7th PMOS PM7；Oneth PNP triode Q1 to the 4th The base stage of PNP triode Q4, colelctor electrode are connected to ground connection GND altogether；Positive temperature coefficient compensates in voltage generating module (2) The drain electrode of the 5th PMOS PM5 is connected to the grid of the second NMOS tube NM2 and the common contact of the 3rd resistance R3 one end The grid of the 4th NMOS tube NM4 in benchmark output branch road module (3).