CN103513689A - Lower-power-consumption reference source circuit - Google Patents
Lower-power-consumption reference source circuit Download PDFInfo
- Publication number
- CN103513689A CN103513689A CN201310478331.1A CN201310478331A CN103513689A CN 103513689 A CN103513689 A CN 103513689A CN 201310478331 A CN201310478331 A CN 201310478331A CN 103513689 A CN103513689 A CN 103513689A
- Authority
- CN
- China
- Prior art keywords
- circuit unit
- drain
- source
- gate
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 230000007423 decrease Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Images
Landscapes
- Control Of Electrical Variables (AREA)
Abstract
Description
技术领域 technical field
本发明涉及一种低功耗、低温度系数、较宽工作范围和面积小的基准源电路,更具体地,涉及一种低功耗基准原电路。 The invention relates to a reference source circuit with low power consumption, low temperature coefficient, wide working range and small area, more specifically, a reference source circuit with low power consumption.
背景技术 Background technique
基准源电路模块广泛的应用于模拟和混合电路中,如A/D、D/A转换器,电压调谐器,电压表,电流表的测试仪器以及偏置电路。其输出的基准信号稳定,与电源电压,温度以及工艺的变化无关。在SOC(system on chip)芯片中,基准源电路是必不可少的一部分,芯片的很多模块都需要基准源来提供稳定的电压或电流,因此基准源的设计成了整个芯片设计的关键。 Reference source circuit modules are widely used in analog and mixed circuits, such as A/D, D/A converters, voltage tuners, voltmeters, ammeter test instruments and bias circuits. The output reference signal is stable and has nothing to do with power supply voltage, temperature and process changes. In the SOC (system on chip) chip, the reference source circuit is an essential part. Many modules of the chip need a reference source to provide stable voltage or current, so the design of the reference source becomes the key to the entire chip design.
基准源电路设计时主要考虑以下几个性能指标:温度系数、工作电压范围、电源抑制比以及功耗。温度系数越低即基准源电路的输出电压受温度影响越小,电压越稳定。较大的工作范围可使基准源电路更容易达到目标的输出电压值。为了能够满足现在对电源管理芯片低功耗的要求,基准源电路设计要尽量降低其工作电流,从而减少其功耗,使电池工作寿命变得更长久。 The following performance indicators are mainly considered in the design of the reference source circuit: temperature coefficient, operating voltage range, power supply rejection ratio and power consumption. The lower the temperature coefficient is, the less the output voltage of the reference source circuit is affected by the temperature, the more stable the voltage is. A larger operating range can make it easier for the reference source circuit to reach the target output voltage value. In order to meet the current requirements for low power consumption of power management chips, the design of the reference source circuit should minimize its operating current, thereby reducing its power consumption and making the battery's working life longer.
对于传统的基准源电路通常是利用两个不同温度系数的电流模块来实现零温度系数的电压输出。设计者要设计一个正温度系数电流(电流随温度的增加而增加)和一个负温度系数电流(电流随温度的减少而减少)然后将这两个电流模块相叠加,从而减少温度对电流的影响,电流经过电阻最后可得到低温度系数的电压输出。 For the traditional reference source circuit, two current modules with different temperature coefficients are usually used to realize the voltage output with zero temperature coefficient. The designer needs to design a positive temperature coefficient current (the current increases with the increase of temperature) and a negative temperature coefficient current (the current decreases with the decrease of temperature) and then superimpose these two current modules to reduce the influence of temperature on the current , the current through the resistor can finally get a voltage output with a low temperature coefficient.
图1是一个传统的带隙基准源电路结构。通过运算放大器OP形成的负反馈,使得节点电压VA=VB,从而使得流过M1和M2的电流相等,即I1=I2=I,在电阻R1上的电压降等于Q1和Q2的基-射电压差,值为VBE=VTlnN,VT表示与温度变化相关的电压值,N是Q1和Q2发射区面积之比。在这个电路结构中,基准输出电压是双极型晶体管Q3的基极-发射极电压VBE3和电阻R2上的电压降之和。而基准输出电压是双极晶体管Q3的基极-发射极电压VBE3和电阻R2上的电压降之和,所以有VREF的表达式如下: Figure 1 is a traditional bandgap reference circuit structure. The negative feedback formed by the operational amplifier OP makes the node voltage VA=VB, so that the currents flowing through M1 and M2 are equal, that is, I1=I2=I, and the voltage drop on the resistor R1 is equal to the base-emitter voltage of Q1 and Q2 Difference, the value is VBE=VTlnN, VT represents the voltage value related to temperature changes, and N is the ratio of the emission area of Q1 and Q2. In this circuit configuration, the reference output voltage is the sum of the base-emitter voltage VBE3 of bipolar transistor Q3 and the voltage drop across resistor R2. The reference output voltage is the sum of the base-emitter voltage VBE3 of the bipolar transistor Q3 and the voltage drop across the resistor R2, so the expression for VREF is as follows:
(1) (1)
式中的第二项与绝对温度成正比,用于补偿VBE3的负温度系数。通过选择合适的R1和R2之比,基准电压的温度系数在某一特定温度下可以达到零,在该值附近基准电压随温度的变化很小。 The second term in the formula is proportional to the absolute temperature and is used to compensate the negative temperature coefficient of VBE3. By choosing an appropriate ratio of R1 and R2, the temperature coefficient of the reference voltage can reach zero at a certain temperature, and the reference voltage changes little with temperature around this value.
但这种结构存在一定的不足。首先,该结构所能到达的温度系数比较高,一般在20—100ppm/°C之间,其次,该电路的输出电压为1.2伏左右,不适用于低压的场合。该电路使用到三极管和电阻,电路的面积比较大。再次,这种电路的启动速度慢,带隙基准电压源的基准电压即使在过高时也不会关断,不能实现电路的自保护。而且,电路的电源抑制比通常不够理想,尤其在电源噪声比较恶劣的环境下,基准输出电压会受到较大的噪声干扰。 But there are certain deficiencies in this structure. First of all, the temperature coefficient that this structure can reach is relatively high, generally between 20-100ppm/°C. Secondly, the output voltage of this circuit is about 1.2 volts, which is not suitable for low-voltage occasions. The circuit uses triodes and resistors, and the area of the circuit is relatively large. Again, the start-up speed of this kind of circuit is slow, and the reference voltage of the bandgap reference voltage source will not be turned off even when it is too high, so the self-protection of the circuit cannot be realized. Moreover, the power supply rejection ratio of the circuit is usually not ideal, especially in an environment with relatively harsh power supply noise, the reference output voltage will be greatly disturbed by noise.
发明内容 Contents of the invention
针对上述问题,本发明的目的在于利用CMOS管在亚阈值区的工作特性,提出一种功耗低、工作范围宽、面积小和温度系数低的CMOS低功耗基准源电路。 In view of the above problems, the object of the present invention is to propose a CMOS low power consumption reference source circuit with low power consumption, wide working range, small area and low temperature coefficient by utilizing the operating characteristics of CMOS transistors in the subthreshold region.
为了实现上述目的,本发明的技术方案为: In order to achieve the above object, the technical solution of the present invention is:
一种低功耗基准源电路,包括顺次连接启动电路单元、电流产生电路单元和输出负载电路单元; A low-power reference source circuit, comprising sequentially connecting a starting circuit unit, a current generating circuit unit and an output load circuit unit;
所述启动电路单元用于提供启动电压,避免工作在零状态区; The starting circuit unit is used to provide a starting voltage to avoid working in a zero state area;
所述电流产生电路单元用于为输出负载电路单元产生微电流,同时使低功耗基准源电路的功耗降低; The current generation circuit unit is used to generate a micro current for the output load circuit unit, and at the same time reduce the power consumption of the low power consumption reference source circuit;
所述输出负载电路单元用于实现输出零温度系数和低输出电压。 The output load circuit unit is used to realize output zero temperature coefficient and low output voltage.
启动电路单元在电路启动的时候为基准源电路和其他电路单元提供启动信号,使基准源电路和其他电路单元摆脱工作在“简并点”,并能在基准源电路正常工作后能使启动电路关断以实现低功耗。 The start-up circuit unit provides a start-up signal for the reference source circuit and other circuit units when the circuit is started, so that the reference source circuit and other circuit units can get rid of working at the "degenerate point", and can enable the start-up circuit after the reference source circuit works normally. Shutdown for low power consumption.
上述输出负载电路单元是由两个不同的门阈值电压MOS管组成的输出机构。 The above-mentioned output load circuit unit is an output mechanism composed of two MOS transistors with different gate threshold voltages.
优选地,所述的启动电路单元包括MOS管MS0、MS1、MS2、MS3和 MC;所述MS1和MS2以电流镜对连接,MS1的源极和MS2的源极接地,MS2的漏极与MS3的源极连接,MS1的漏极与MS0栅极连接,MS0的栅极与MC的栅极连接,MS0的漏极与MS3的栅极相连接,MC的漏极和MS3的漏极与电源连接,MC漏极与源极连接,MS0的漏极和MS0的源极分别为第一、第二启动信号输出端,向电流产生电路单元提供启动信号;所述MS3、MC为PMOS管。 Preferably, the start-up circuit unit includes MOS transistors MS0, MS1, MS2, MS3 and MC; the MS1 and MS2 are connected with a current mirror pair, the source of MS1 and the source of MS2 are grounded, and the drain of MS2 is connected to MS3 The source of MS1 is connected to the gate of MS0, the gate of MS0 is connected to the gate of MC, the drain of MS0 is connected to the gate of MS3, the drain of MC and the drain of MS3 are connected to the power supply , the drain of MC is connected to the source, the drain of MS0 and the source of MS0 are respectively the first and second start signal output terminals, which provide the start signal to the current generation circuit unit; the MS3 and MC are PMOS transistors.
MC的漏极与电源连接,MC栅极、漏极与源极连接在一起,在启动电路中起电容的作用从而减少了电路结构的面积。 The drain of the MC is connected to the power supply, and the grid, drain and source of the MC are connected together, which acts as a capacitor in the start-up circuit to reduce the area of the circuit structure.
优选地,所述的电流产生电路单元包括MOS管M1、M2、M3、PM1和PM2,MOS管PM1和PM2以电流镜结构连接使两支路的电流相等,PM1的漏极与PM2的漏极接电源,PM1的栅极、PM2的栅极和PM2的源极连接,PM2的源极为产生电流输出端,并与启动电路单元的第一启动信号输出端连接;M1的栅极、M2的漏极和M3的源极连接,PM1的源极、M3的栅极、M3的漏极和M2的栅极连接,M2的栅极与启动电路单元的第二启动信号输出端连接。电流产生电路单元使用了一组联级结构的MOS,根据各个MOS的电压关系,来确定输出微电流。根据M1、M2和M3连接点的电压电流关系可得到电流的表达式,该电流与M1、M2和M3的宽长比有关,通过调节其宽长比可以就得到较低的输出电流。 Preferably, the current generation circuit unit includes MOS transistors M1, M2, M3, PM1 and PM2, and the MOS transistors PM1 and PM2 are connected in a current mirror structure so that the currents of the two branches are equal, and the drain of PM1 is connected to the drain of PM2 Connected to the power supply, the gate of PM1, the gate of PM2 are connected to the source of PM2, the source of PM2 is the current output terminal, and connected to the first start signal output terminal of the starting circuit unit; the gate of M1, the drain of M2 The pole is connected to the source of M3, the source of PM1, the gate of M3, the drain of M3 are connected to the gate of M2, and the gate of M2 is connected to the second start signal output terminal of the start circuit unit. The current generation circuit unit uses a group of cascaded MOSs to determine the output micro-current according to the voltage relationship of each MOS. According to the voltage-current relationship of the connection points of M1, M2 and M3, the expression of the current can be obtained. The current is related to the width-to-length ratio of M1, M2 and M3. By adjusting the width-to-length ratio, a lower output current can be obtained.
电流产生电路单元与所述启动电路单元相连接,以确保电路能正常启动,同时当电路正常工作后作为反馈信号使启动电路单元断开,从而减少功耗,所述的启动电路单元在电路启动时为基准源和芯片及其他电路模块提供启动信号,使基准源电路和其他电路单元摆脱工作在“简并点”,并能在基准源电路正常工作后使启动电路关断以实现低功耗。 The current generation circuit unit is connected with the starting circuit unit to ensure that the circuit can be started normally, and at the same time, when the circuit works normally, the starting circuit unit is disconnected as a feedback signal, thereby reducing power consumption. Provide start-up signals for the reference source, chip and other circuit modules at any time, so that the reference source circuit and other circuit units can get rid of working at the "degenerate point", and can turn off the start-up circuit after the reference source circuit works normally to achieve low power consumption .
优选地,所述的输出负载电路单元包括MOS管M4、M5和PM3,PM3的栅极作为输出负载电路单元的输入端,与启动电路单元的第一启动信号输出端连接,PM3的漏极接电源,PM3与电流产生电路单元中的PM2组成电流镜,把电流产生电路单元所产生的电流镜像到输出负载电路单元;M4的漏极、M4的栅极和M5的栅极连接,M4的源极与M5的漏极连接,M5的源极接地,M4和M5联级为输出负载,以M4的源极和M5的漏极的连接点为输出节点VREF。 Preferably, the output load circuit unit includes MOS transistors M4, M5 and PM3, the gate of PM3 is used as the input end of the output load circuit unit, and is connected to the first start signal output end of the start circuit unit, and the drain of PM3 is connected to Power supply, PM3 and PM2 in the current generation circuit unit form a current mirror, mirroring the current generated by the current generation circuit unit to the output load circuit unit; the drain of M4, the gate of M4 and the gate of M5 are connected, and the source of M4 The pole is connected to the drain of M5, the source of M5 is grounded, M4 and M5 are cascaded as an output load, and the connection point between the source of M4 and the drain of M5 is the output node VREF.
整个低功耗基准源电路只使用了MOS管并未使用电容和电阻,从而减小了电路的面积,且电路工作在亚阈值区从而只产生较小的功耗。 The entire low-power reference source circuit only uses MOS transistors instead of capacitors and resistors, thereby reducing the area of the circuit, and the circuit works in the sub-threshold region to generate less power consumption.
优选地,所述输出负载电路单元中的M4是nmvt3.3管,具有较低的门阈值电压,M5是n3.3管,具有较高的门阈值电压, M5的门阈值大于M4的门阈值,输出电压值约为两者差值。由于nmvt3.3管具有与其他管不同的门阈值电压和温度系数,从而实现零温度系数。 Preferably, M4 in the output load circuit unit is an nmvt3.3 tube with a lower gate threshold voltage, M5 is an n3.3 tube with a higher gate threshold voltage, and the gate threshold of M5 is greater than that of M4 , the output voltage value is about the difference between the two. Since the nmvt3.3 tube has a different gate threshold voltage and temperature coefficient from other tubes, it achieves zero temperature coefficient.
优选地,低功耗基准源电路中MOS管的电源电压均为3.3V,从而使低功耗基准源电路得到较宽的工作范围。 Preferably, the power supply voltage of the MOS transistors in the low-power reference source circuit is 3.3V, so that the low-power reference source circuit has a wider working range.
与现有技术相比,本发明的有益效果在于:本发明具有结构简单、实现面积小、温度系数低、功耗低、输出电压低和工作范围宽的特点。 Compared with the prior art, the beneficial effect of the present invention lies in that the present invention has the characteristics of simple structure, small realization area, low temperature coefficient, low power consumption, low output voltage and wide working range.
附图说明 Description of drawings
图1为传统的基准源电路连接图。 Figure 1 is a connection diagram of a traditional reference source circuit.
图2为本发明启动电路连接图。 Fig. 2 is a connection diagram of the startup circuit of the present invention.
图3为本发明输出负载电路连接图。 Fig. 3 is a connection diagram of the output load circuit of the present invention.
图4为本发明电流产生电路连接图。 Fig. 4 is a connection diagram of the current generating circuit of the present invention.
图5为本发明基准源电路连接图。 Fig. 5 is a connection diagram of the reference source circuit of the present invention.
具体实施方式 Detailed ways
下面结合附图对本发明做进一步的描述,但本发明的实施方式并不限于此。 The present invention will be further described below in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.
本发明所是利用CMOS管在亚阈值区的工作特性,设计了一款低功耗、低温度系数和面积小的基准源电路。通过利用不同的门阈值的CMOS实现稳定的电压输出,实现低温度系数的稳定电压输出。工作在亚阈值区的CMOS管的电压电流特性如下表达式所示: The present invention utilizes the operating characteristics of CMOS transistors in the sub-threshold region to design a reference source circuit with low power consumption, low temperature coefficient and small area. By using CMOS with different gate thresholds to realize stable voltage output, stable voltage output with low temperature coefficient is realized. The voltage and current characteristics of a CMOS transistor working in the subthreshold region are shown in the following expression:
(2) (2)
其中V TH 是门阈值电压具有正温度系数和V T 为热电压(V T =k B T/q)具有负温度系数。K为CMOS管的宽长比,I D 是其漏极电流,u为载流子迁移率,C OX 为栅氧层电容。 where V TH is the gate threshold voltage with a positive temperature coefficient and V T is the thermal voltage ( V T =k BT /q ) with a negative temperature coefficient. K is the width-to-length ratio of the CMOS tube, ID is the drain current, u is the carrier mobility, and C OX is the capacitance of the gate oxide layer.
如图5,一种低功耗基准源电路,包括顺次连接启动电路单元1、电流产生电路单元2和输出负载电路单元3; As shown in Fig. 5, a low power consumption reference source circuit includes sequentially connecting a starting circuit unit 1, a current generating circuit unit 2 and an output load circuit unit 3;
所述启动电路单元1用于提供启动电压,避免工作在零状态区,确保电路正常工作; The starting circuit unit 1 is used to provide a starting voltage, avoid working in a zero state area, and ensure the normal operation of the circuit;
所述电流产生电路单元2用于为输出负载电路单元产生微电流,同时使低功耗基准源电路的功耗降低; The current generation circuit unit 2 is used to generate a micro current for the output load circuit unit, while reducing the power consumption of the low power consumption reference source circuit;
所述输出负载电路单元3利用不同的门阈值的CMOS管nmvt而实现输出零温度系数和低输出电压。 The output load circuit unit 3 utilizes CMOS transistors nmvt with different gate thresholds to realize output with zero temperature coefficient and low output voltage.
在本实施例中,低功耗基准源电路中所有的CMOS管均是3.3V,3.3V的CMOS管具有较宽的工作范围,从而增大了基准源电路结构的工作范围。基准源电路结构仅仅使用了CMOS一种元器件,并未使用电容、电阻和三极管,可以减少其失调对电路的影响,并且能有效的降低的电路的实现面积。 In this embodiment, all the CMOS transistors in the low-power reference source circuit are 3.3V, and the 3.3V CMOS transistors have a wider working range, thereby increasing the working range of the reference source circuit structure. The reference source circuit structure only uses CMOS components, and does not use capacitors, resistors and triodes, which can reduce the impact of its offset on the circuit, and can effectively reduce the implementation area of the circuit.
如图2所示,启动电路单元1包括MOS管MS0、MS1、MS2、MS3和 MC;所述MS1和MS2以电流镜对连接,MS1的源极和MS2的源极接地,MS2的漏极与MS3的源极连接,MS1的漏极与MS0栅极连接,MS0的栅极与MC的栅极连接,MS0的漏极与MS3的栅极相连接,MC的漏极和MS3的漏极与电源连接,MC漏极与源极连接,MS0的漏极和MS0的源极分别为第一、第二启动信号输出端,向电流产生电路单元提供启动信号;所述MS3、MC为PMOS管。MC的漏极与电源连接,MC栅极、漏极与源极连接在一起,在启动电路中起电容的作用从而减少了电路结构的面积。 As shown in Figure 2, the starting circuit unit 1 includes MOS transistors MS0, MS1, MS2, MS3 and MC; the MS1 and MS2 are connected with a current mirror pair, the source of MS1 and the source of MS2 are grounded, and the drain of MS2 and The source of MS3 is connected, the drain of MS1 is connected to the gate of MS0, the gate of MS0 is connected to the gate of MC, the drain of MS0 is connected to the gate of MS3, the drain of MC and the drain of MS3 are connected to the power supply connection, the MC drain is connected to the source, the drain of MS0 and the source of MS0 are respectively the first and second start signal output terminals, which provide the start signal to the current generation circuit unit; the MS3 and MC are PMOS transistors. The drain of the MC is connected to the power supply, and the grid, drain and source of the MC are connected together, which acts as a capacitor in the start-up circuit to reduce the area of the circuit structure.
如图3所示,所述的输出负载电路单元包括MOS管M4、M5和PM3,PM3的栅极作为输出负载电路单元的输入端,与启动电路单元的第一启动信号输出端连接,PM3的漏极接电源,PM3与电流产生电路单元中的PM2组成电流镜,把电流产生电路单元所产生的电流镜像到输出负载电路单元;M4的漏极、M4的栅极和M5的栅极连接,M4的源极与M5的漏极连接,M5的源极接地,M4和M5联级为输出负载,以M4的源极和M5的漏极的连接点为输出节点Vref。有输出电压表达式如下: As shown in Figure 3, the described output load circuit unit includes MOS transistors M4, M5 and PM3, the gate of PM3 is used as the input end of the output load circuit unit, and is connected with the first start signal output end of the start circuit unit, and the PM3 The drain is connected to the power supply, PM3 and PM2 in the current generating circuit unit form a current mirror, mirroring the current generated by the current generating circuit unit to the output load circuit unit; the drain of M4, the gate of M4 and the gate of M5 are connected, The source of M4 is connected to the drain of M5, the source of M5 is grounded, M4 and M5 are cascaded as an output load, and the connection point between the source of M4 and the drain of M5 is the output node V ref . The output voltage expression is as follows:
(3) (3)
所述MOS管M4使用了nmvt3.3管(Medium V TH CMOS),其门阈值电压V TH4 =487mV,比其它CMOS的门阈值电压低(V TH5 =695mV)。同时,所述nmvt3.3管具有与n3.3管不同的温度系数,两者的差值能够更有效的降低基准源电路结构的温度系数。根据MOS管工作在亚阈值区的电压电流特性,可进一步的得到输出电压的表达式: The MOS tube M4 uses nmvt3.3 tube (Medium V TH CMOS), and its gate threshold voltage V TH4 =487mV is lower than that of other CMOS ( V TH5 =695mV). At the same time, the nmvt3.3 tube has a temperature coefficient different from that of the n3.3 tube, and the difference between the two can more effectively reduce the temperature coefficient of the reference source circuit structure. According to the voltage and current characteristics of the MOS tube working in the sub-threshold region, the expression of the output voltage can be further obtained:
(4) (4)
由上述公式可知道通过调整M4和M5的宽长比K可以消除T对输出电压的影响,从而实现零温度系数。 It can be seen from the above formula that the influence of T on the output voltage can be eliminated by adjusting the width-to-length ratio K of M4 and M5 , thereby achieving zero temperature coefficient.
如图4所示,所述的电流产生电路单元包括MOS管M1、M2、M3、PM1和PM2,MOS管PM1和PM2以电流镜结构连接使两支路的电流相等,PM1的漏极与PM2的漏极接电源,PM1的栅极、PM2的栅极和PM2的源极连接,PM2的源极为产生电流输出端,并与启动电路单元的第一启动信号输出端连接;M1的栅极、M2的漏极和M3的源极连接,M2的栅极与启动电路单元的第二启动信号输出端连接,PM1的源极、M3的栅极、M3的漏极和M2的栅极连接, 得到该连接点的电压关系式如式(4)所示: As shown in Figure 4, described electric current generating circuit unit comprises MOS tube M1, M2, M3, PM1 and PM2, and MOS tube PM1 and PM2 are connected with current mirror structure to make the current of two branches equal, the drain of PM1 and PM2 The drain of PM1 is connected to the power supply, the grid of PM1, the grid of PM2 are connected with the source of PM2, and the source of PM2 generates the current output end, and is connected with the first start signal output end of the startup circuit unit; the grid of M1, The drain of M2 is connected to the source of M3, the gate of M2 is connected to the second starting signal output terminal of the starting circuit unit, the source of PM1, the gate of M3, the drain of M3 are connected to the gate of M2, and The voltage relationship at the connection point is shown in formula (4):
(5) (5)
根据CMOS管工作在亚阈值的电压电流特性,如式(2)所示,可以进一步的到电路产生电路的电流I 1 的表达式: According to the voltage and current characteristics of the CMOS tube working at the sub-threshold, as shown in formula (2), the expression of the current I 1 of the circuit can be further generated by the circuit:
(6) (6)
由上式可知,通过调节M1、M2和M3的宽长比K的大小,就可以得到微小的工作电流。。 It can be seen from the above formula that by adjusting the width-to-length ratio K of M1, M2 and M3, a small working current can be obtained. .
电流产生电路单元与所述启动电路单元相连接,以确保电路能正常启动,同时当电路正常工作后作为反馈信号使启动电路单元断开,从而减少功耗,启动电路单元的第一启动信号输出端与所述输出负载电路单元相连接,MOS管PM3与PM2组成电流镜,通过该电流镜输出负载电路得到与I1成比例的电流I3,该比例由PM2和PM3的宽长比决定。 The current generating circuit unit is connected with the starting circuit unit to ensure that the circuit can start normally, and at the same time, when the circuit works normally, the starting circuit unit is disconnected as a feedback signal, thereby reducing power consumption, and the first starting signal of the starting circuit unit is output The terminal is connected with the output load circuit unit, and the MOS transistors PM3 and PM2 form a current mirror, through which the output load circuit of the current mirror can obtain a current I3 proportional to I1, and the ratio is determined by the width-to-length ratio of PM2 and PM3.
以上所述的本发明的实施方式,并不构成对本发明保护范围的限定。任何在本发明的精神原则之内所作出的修改、等同替换和改进等,均应包含在本发明的权利要求保护范围之内。 The embodiments of the present invention described above are not intended to limit the protection scope of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310478331.1A CN103513689B (en) | 2013-10-14 | 2013-10-14 | A kind of low-power reference source circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310478331.1A CN103513689B (en) | 2013-10-14 | 2013-10-14 | A kind of low-power reference source circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103513689A true CN103513689A (en) | 2014-01-15 |
CN103513689B CN103513689B (en) | 2015-08-19 |
Family
ID=49896585
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310478331.1A Expired - Fee Related CN103513689B (en) | 2013-10-14 | 2013-10-14 | A kind of low-power reference source circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103513689B (en) |
Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104656732A (en) * | 2014-12-31 | 2015-05-27 | 格科微电子(上海)有限公司 | Voltage reference circuit |
CN105676938A (en) * | 2016-03-04 | 2016-06-15 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | Voltage reference source circuit with ultra-low power consumption and high power supply rejection ratio |
CN105739586A (en) * | 2016-04-01 | 2016-07-06 | 深圳还是威健康科技有限公司 | Current reference source circuit |
CN105974989A (en) * | 2016-06-15 | 2016-09-28 | 中山大学 | Low-power-consumption full-CMOS reference source circuit based on subthreshold value |
CN106484018A (en) * | 2016-09-29 | 2017-03-08 | 广州智慧城市发展研究院 | A kind of reference voltage source circuit system and supply unit |
CN106855732A (en) * | 2016-12-26 | 2017-06-16 | 中山大学 | A kind of super low-power consumption reference voltage source circuit system |
CN107272819A (en) * | 2017-08-09 | 2017-10-20 | 电子科技大学 | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits |
CN107291146A (en) * | 2017-08-16 | 2017-10-24 | 何金昌 | A kind of band-gap voltage source and chip system applied to microchip |
CN107450652A (en) * | 2017-08-02 | 2017-12-08 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | A kind of voltage reference source circuit |
CN108205353A (en) * | 2018-01-09 | 2018-06-26 | 电子科技大学 | A kind of CMOS subthreshold values reference voltage source |
CN109343652A (en) * | 2018-10-12 | 2019-02-15 | 中国电子科技集团公司第七研究所 | It is a kind of that the reference voltage source of two output voltages is provided |
CN110377090A (en) * | 2019-07-29 | 2019-10-25 | 北方民族大学 | A kind of reference voltage source circuit |
CN110794909A (en) * | 2019-11-05 | 2020-02-14 | 安徽大学 | An ultra-low power consumption voltage reference circuit with adjustable output voltage |
CN111290459A (en) * | 2020-02-11 | 2020-06-16 | 浙江省北大信息技术高等研究院 | Voltage reference source circuit |
CN112416044A (en) * | 2020-12-03 | 2021-02-26 | 电子科技大学 | Voltage reference circuit with high power supply rejection ratio |
CN113672022A (en) * | 2021-09-24 | 2021-11-19 | 广东华芯微特集成电路有限公司 | Low-power-consumption high-precision reference source |
CN117074767A (en) * | 2023-10-18 | 2023-11-17 | 苏州锴威特半导体股份有限公司 | Voltage detection circuit |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010152510A (en) * | 2008-12-24 | 2010-07-08 | Seiko Instruments Inc | Reference voltage circuit |
US20120025801A1 (en) * | 2010-07-30 | 2012-02-02 | Tetsuya Hirose | Reference current source circuit including added bias voltage generator circuit |
US8305068B2 (en) * | 2009-11-25 | 2012-11-06 | Freescale Semiconductor, Inc. | Voltage reference circuit |
US20130076331A1 (en) * | 2011-09-27 | 2013-03-28 | Seiko Instruments Inc. | Voltage reference circuit |
CN103309391A (en) * | 2013-05-24 | 2013-09-18 | 福州大学 | Reference current and reference voltage generation circuit with high power-supply rejection ratio and low power consumption |
-
2013
- 2013-10-14 CN CN201310478331.1A patent/CN103513689B/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010152510A (en) * | 2008-12-24 | 2010-07-08 | Seiko Instruments Inc | Reference voltage circuit |
US8305068B2 (en) * | 2009-11-25 | 2012-11-06 | Freescale Semiconductor, Inc. | Voltage reference circuit |
US20120025801A1 (en) * | 2010-07-30 | 2012-02-02 | Tetsuya Hirose | Reference current source circuit including added bias voltage generator circuit |
US20130076331A1 (en) * | 2011-09-27 | 2013-03-28 | Seiko Instruments Inc. | Voltage reference circuit |
CN103309391A (en) * | 2013-05-24 | 2013-09-18 | 福州大学 | Reference current and reference voltage generation circuit with high power-supply rejection ratio and low power consumption |
Cited By (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104656732A (en) * | 2014-12-31 | 2015-05-27 | 格科微电子(上海)有限公司 | Voltage reference circuit |
CN105676938A (en) * | 2016-03-04 | 2016-06-15 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | Voltage reference source circuit with ultra-low power consumption and high power supply rejection ratio |
CN105739586A (en) * | 2016-04-01 | 2016-07-06 | 深圳还是威健康科技有限公司 | Current reference source circuit |
CN105739586B (en) * | 2016-04-01 | 2017-09-22 | 深圳还是威健康科技有限公司 | A kind of current reference source circuit |
CN105974989A (en) * | 2016-06-15 | 2016-09-28 | 中山大学 | Low-power-consumption full-CMOS reference source circuit based on subthreshold value |
CN105974989B (en) * | 2016-06-15 | 2017-10-24 | 中山大学 | A kind of low-power consumption whole CMOS reference source circuit based on subthreshold value |
CN106484018A (en) * | 2016-09-29 | 2017-03-08 | 广州智慧城市发展研究院 | A kind of reference voltage source circuit system and supply unit |
CN106855732A (en) * | 2016-12-26 | 2017-06-16 | 中山大学 | A kind of super low-power consumption reference voltage source circuit system |
CN106855732B (en) * | 2016-12-26 | 2018-03-16 | 中山大学 | A kind of super low-power consumption reference voltage source circuit system |
CN107450652A (en) * | 2017-08-02 | 2017-12-08 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | A kind of voltage reference source circuit |
CN107272819A (en) * | 2017-08-09 | 2017-10-20 | 电子科技大学 | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits |
CN107291146A (en) * | 2017-08-16 | 2017-10-24 | 何金昌 | A kind of band-gap voltage source and chip system applied to microchip |
CN108205353A (en) * | 2018-01-09 | 2018-06-26 | 电子科技大学 | A kind of CMOS subthreshold values reference voltage source |
CN109343652A (en) * | 2018-10-12 | 2019-02-15 | 中国电子科技集团公司第七研究所 | It is a kind of that the reference voltage source of two output voltages is provided |
CN110377090A (en) * | 2019-07-29 | 2019-10-25 | 北方民族大学 | A kind of reference voltage source circuit |
CN110794909B (en) * | 2019-11-05 | 2021-06-04 | 安徽大学 | An ultra-low power consumption voltage reference circuit with adjustable output voltage |
CN110794909A (en) * | 2019-11-05 | 2020-02-14 | 安徽大学 | An ultra-low power consumption voltage reference circuit with adjustable output voltage |
CN111290459A (en) * | 2020-02-11 | 2020-06-16 | 浙江省北大信息技术高等研究院 | Voltage reference source circuit |
CN111290459B (en) * | 2020-02-11 | 2021-10-22 | 杭州未名信科科技有限公司 | Voltage reference source circuit |
CN112416044A (en) * | 2020-12-03 | 2021-02-26 | 电子科技大学 | Voltage reference circuit with high power supply rejection ratio |
CN113672022A (en) * | 2021-09-24 | 2021-11-19 | 广东华芯微特集成电路有限公司 | Low-power-consumption high-precision reference source |
CN117074767A (en) * | 2023-10-18 | 2023-11-17 | 苏州锴威特半导体股份有限公司 | Voltage detection circuit |
CN117074767B (en) * | 2023-10-18 | 2024-01-30 | 苏州锴威特半导体股份有限公司 | Voltage detection circuit |
Also Published As
Publication number | Publication date |
---|---|
CN103513689B (en) | 2015-08-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103513689B (en) | A kind of low-power reference source circuit | |
CN107340796B (en) | A kind of non-resistance formula high-precision low-power consumption a reference source | |
CN107256062B (en) | A kind of non-resistance formula a reference source | |
CN105974989B (en) | A kind of low-power consumption whole CMOS reference source circuit based on subthreshold value | |
CN107390767B (en) | A kind of full MOS voltage-references of wide temperature with temperature-compensating | |
CN102289243B (en) | Complementary metal oxide semiconductor (CMOS) band gap reference source | |
CN107272819B (en) | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits | |
CN109308091B (en) | A voltage reference circuit | |
CN102096436B (en) | Low-voltage low-power band gap reference voltage source implemented by MOS device | |
CN103399606B (en) | Low-voltage bandgap-free reference voltage source | |
CN104166423B (en) | A kind of reference source with compensation in full temperature range characteristic | |
CN105955384B (en) | Non-band-gap reference voltage source | |
CN108415503A (en) | A kind of low-voltage and low-power dissipation reference circuit | |
CN103412610A (en) | Low power consumption non-resistor full CMOS voltage reference circuit | |
CN108227809B (en) | A kind of high PSRR reference circuit based on subthreshold region MOS partial pressure | |
CN207352505U (en) | A kind of non-resistance formula high-precision low-power consumption a reference source | |
CN103901937A (en) | Band-gap reference voltage source | |
CN107450652A (en) | A kind of voltage reference source circuit | |
CN105739596B (en) | A High-precision Reference Voltage Source Circuit Using Quadratic Positive Temperature Coefficient Compensation | |
CN107272811A (en) | A kind of low-temperature coefficient reference voltage source circuit | |
CN106855732B (en) | A kind of super low-power consumption reference voltage source circuit system | |
CN104820460A (en) | Bandgap voltage reference source circuit | |
CN107422775A (en) | Suitable for the voltage reference circuit of low supply voltage work | |
TWI484316B (en) | Voltage generator and bandgap reference circuit | |
CN207037520U (en) | A Low Temperature Coefficient Reference Voltage Source Circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20151203 Address after: 510275 Xingang West Road, Guangdong, No. 135 Zhongshan University, Patentee after: SUN YAT-SEN University Patentee after: SYSU HUADU INDUSTRIAL SCIENCE AND TECHNOLOGY INSTITUTE Address before: 510275 Xingang West Road, Guangdong, No. 135 Zhongshan University, Patentee before: Sun Yat-sen University Patentee before: Sysung Electronics and Telecomm Research Institute |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150819 |