CN104298034B - A kind of display panel - Google Patents
A kind of display panel Download PDFInfo
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- CN104298034B CN104298034B CN201410487504.0A CN201410487504A CN104298034B CN 104298034 B CN104298034 B CN 104298034B CN 201410487504 A CN201410487504 A CN 201410487504A CN 104298034 B CN104298034 B CN 104298034B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136218—Shield electrodes
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- Microelectronics & Electronic Packaging (AREA)
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- Crystallography & Structural Chemistry (AREA)
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- Optics & Photonics (AREA)
- Power Engineering (AREA)
- Liquid Crystal (AREA)
Abstract
An embodiment of the present invention provides a kind of display panels, are related to display technology field, improve existing display panel and lead to the problem of coupled capacitor with data line to vertical crosstalk occur due to being formed with pixel electrode and data line, pixel electrode in array substrate.A kind of display panel, including：Liquid crystal to the color membrane substrates and array substrate of box, and between color membrane substrates and array substrate and spacer material, spacer material are conductive spacers；Color membrane substrates include：Form the pixel electrode of matrix arrangement on the first substrate；Array substrate includes：Grid line, data line and the thin film transistor (TFT) being formed on the second substrate；The drain electrode of thin film transistor (TFT) is electrically connected by conductive spacer with corresponding pixel electrode；Further include the first storage electrode and the second storage electrode being formed on the first substrate and/or the second substrate, the first storage electrode and the second storage electrode mutually insulated and there are overlapping regions.Display device for display panel, comprising the display panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel.
Background
A TN (Twisted Nematic) type display panel is one of display panels, and is widely used in currently mainstream middle and low-end liquid crystal displays due to low production cost.
As shown in fig. 1 and 2, the conventional TN type display panel includes a color filter substrate 1, an array substrate 2, and a liquid crystal 3 located between the color filter substrate 1 and the array substrate 2. The color film substrate 1 comprises a common electrode 4, the array substrate 2 comprises pixel regions defined by intersecting of gate lines 5 and data lines 6, and each pixel region comprises a thin film transistor 8 and a pixel electrode 7.
Display principle of the TN type display panel: the thin film transistor responds to the gate signals from the gate lines, applies the data signals of the data lines to the pixel electrodes, and simultaneously supplies voltage to the common electrodes, so that the common electrodes on the color film substrate and the pixel electrodes on the array substrate form electric fields, and due to the fact that the voltages of the pixel electrodes are different, the rotation angles of liquid crystals corresponding to the pixel regions are different, light transmittance is different, and therefore display of different gray levels is achieved.
As shown in fig. 2, in the process of implementing the above display, when the gate line 5 inputs a gate signal to the thin film transistor 8 corresponding to the pixel electrode 71, and the data line 6 inputs a first data signal to the thin film transistor 8 corresponding to the pixel electrode 71, the first pixel electrode 71 correspondingly inputs a first voltage. When the gate line 5 scans in the scanning direction 100 to input a gate signal to the thin film transistor 8 corresponding to the pixel electrode 72, and the data line 6 inputs a second data signal to the thin film transistor 8 corresponding to the pixel electrode 72, a second voltage is correspondingly input to the second pixel electrode 72. Since the first data signal and the second data signal are different, a first voltage inputted to the first pixel electrode 71 and a second voltage inputted to the second pixel electrode 72 are different. When the data line 6 inputs the second voltage to the second pixel electrode 72, the data line 6 is coupled to the first pixel electrode 71 to generate a coupling capacitance, which affects the originally input first voltage of the first pixel electrode 71, so that crosstalk occurs along the gate line scanning direction 100.
Disclosure of Invention
The embodiment of the invention provides a display panel, which solves the problem that the display quality is influenced by vertical crosstalk caused by coupling capacitance generated between a pixel electrode and a data line due to the pixel electrode and the data line formed on an array substrate of the conventional display panel.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in one aspect, there is provided a display panel including: the liquid crystal display comprises a color film substrate, an array substrate, a liquid crystal and a spacer, wherein the color film substrate and the array substrate are oppositely arranged, and the liquid crystal and the spacer are positioned between the color film substrate and the array substrate; the color film substrate comprises: the liquid crystal display device comprises a first substrate and pixel electrodes formed on the first substrate in a matrix arrangement; the array substrate includes: the liquid crystal display panel comprises a second substrate, and a grid line, a data line and a thin film transistor which are formed on the second substrate; the grid electrode of the thin film transistor is electrically connected with the grid line, the source electrode of the thin film transistor is electrically connected with the data line, and the drain electrode of the thin film transistor is electrically connected with the corresponding pixel electrode through the conductive spacer; the storage structure further comprises a first storage electrode and a second storage electrode which are formed on the first substrate and/or the second substrate, wherein the first storage electrode and the second storage electrode are insulated from each other and have an overlapping area.
The embodiment of the invention provides a display panel, wherein a pixel electrode is arranged on a color film substrate of the display panel, and the pixel electrode is electrically connected with a drain electrode of a thin film transistor through a conductive spacer on an array substrate, so that the drain electrode charges the pixel electrode; the first storage electrode and the second storage electrode on the color film substrate and/or the array substrate form a storage capacitor so as to ensure that the display of two continuous frames of images is uninterrupted; the pixel electrode is located on the color film substrate, the data line is located on the array substrate, and the liquid crystal is filled between the color film substrate and the array substrate, so that the spacing distance between the pixel electrode on the color film substrate and the data line on the array substrate is at least larger than the box thickness of the liquid crystal, that is, the spacing distance between the data line and the pixel electrode is increased compared with the prior art, and thus, the coupling capacitance between the pixel electrode and the data line is greatly reduced, the vertical crosstalk problem of the display panel is improved, and the display quality of the display panel is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a TN type display panel provided in the prior art;
FIG. 2 is an enlarged schematic view of detail A of FIG. 1;
fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 4 is a schematic top view of the color film substrate shown in fig. 3;
FIG. 5 is a simplified enlarged view of detail B of FIG. 3;
FIG. 6 is a cross-sectional view taken along line C-C' of FIG. 5;
FIG. 7 is a detailed enlarged view of detail B of FIG. 3;
fig. 8 is a schematic view illustrating a gate line, a gate electrode, a common electrode line and a second storage electrode formed on a second substrate according to an embodiment of the present invention;
fig. 9 is a schematic diagram illustrating a data line, a source electrode, and a drain electrode formed on a second substrate according to an embodiment of the present invention;
fig. 10 is a schematic diagram illustrating a common electrode via hole, a second storage electrode via hole, and a drain via hole formed on a second substrate according to an embodiment of the present invention;
fig. 11 is a schematic diagram of forming a common electrode and a first storage electrode on a second substrate according to an embodiment of the present invention.
Reference numerals:
100-scan direction; 1-color film substrate; 101-a first substrate; 2-an array substrate; 201-a second substrate; 3-liquid crystal; 4-a common electrode; 5-a gate line; 6-a data line; 7-pixel electrodes; 71-a first pixel electrode; 72-a second pixel electrode; 8-a thin film transistor; 801-a gate; an 802-source; 803-a drain electrode; 9-a conductive spacer; 10-a first storage electrode; 11-a second storage electrode; 12-a common electrode line; 13-common electrode via hole; 14-a second storage electrode via; 15-a drain via; 16-area of overlap.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the embodiments of the present invention, the "upper" and "lower" are based on the order of forming the thin film or layer structure of the substrate, and the thin film or layer structure formed later is on the upper side, and the thin film or layer structure formed earlier is on the lower side.
The thin film transistor generally includes a gate, a source, and a drain, and may be classified into a top gate thin film transistor and a bottom gate thin film transistor according to a positional relationship between the gate and the source and the drain in the thin film transistor. Wherein, the thin film transistor of the top gate structure, namely the grid electrode, is positioned above the source drain electrode; the thin film transistor with the bottom gate structure, namely the gate electrode, is positioned below the source electrode and the drain electrode. The thin film transistor in the embodiment of the invention can be a thin film transistor with a top gate structure, and can also be a thin film transistor with a bottom gate structure.
An embodiment of the present invention provides a display panel, as shown in fig. 3, including: the liquid crystal display comprises a color film substrate 1 and an array substrate 2 which are oppositely boxed, and further comprises a liquid crystal 3 and a conductive spacer 9 which are positioned between the color film substrate 1 and the array substrate 2; as shown in fig. 4, the color filter substrate 1 includes: a first substrate 101, and pixel electrodes 7 formed on the first substrate 101 in a matrix arrangement.
As shown in fig. 3 and 5, the array substrate 2 includes: a second substrate 201, and a gate line 5, a data line 6 and a thin film transistor 8 formed on the second substrate 201; the gate electrode of the thin film transistor 8 is electrically connected to the gate line 5, the source electrode is electrically connected to the data line 6, and the drain electrode is electrically connected to the corresponding pixel electrode 7 through the conductive spacer 9.
The color film substrate and/or the array substrate further comprise a first storage electrode and a second storage electrode which are formed on the first substrate and/or the second substrate, the first storage electrode and the second storage electrode are insulated from each other and have an overlapping area, and the first storage electrode and the second storage electrode are used for forming a storage capacitor in the overlapping area.
The array substrate comprises a gate line and a data line, the gate line and the data line are crossed to form a plurality of pixel regions, the pixel regions are arranged in a matrix, and each pixel region comprises a thin film transistor. The color film substrate comprises pixel electrodes which are arranged in a matrix mode, the pixel electrodes on the color film substrate correspond to the pixel regions on the array substrate one to one, and the pixel electrodes are electrically connected with drain electrodes of the thin film transistors of the corresponding pixel regions through the conductive spacers.
The color film substrate and/or the array substrate further comprise a first storage electrode and a second storage electrode formed on the first substrate and/or the second substrate, that is, the color film substrate further comprises a first storage electrode and a second storage electrode formed on the first substrate; or the array substrate further comprises a first storage electrode and a second storage electrode formed on the second substrate; or the color film substrate can also comprise a first storage electrode formed on the first substrate, and the array substrate also comprises a second storage electrode formed on the second substrate; or, the color filter substrate may further include a second storage electrode formed on the first substrate, and the array substrate further includes a first storage electrode formed on the second substrate. The embodiments and the drawings of the present invention will be described in detail by taking an example that the array substrate further includes a first storage electrode and a second storage electrode formed on the second substrate.
As shown in fig. 7, the first storage electrode 10 is located above the second storage electrode 11, the first storage electrode 10 and the second storage electrode 11 form an overlap region 16, and the first storage electrode 10 and the second storage electrode 11 form a storage capacitor in the overlap region 16. The first storage electrode and the second storage electrode form a storage capacitor, and the storage capacitor enables the voltage of the pixel electrode to be kept to the next updated picture, namely, the current frame image is kept to the next updated frame image, so that uninterrupted display of two continuous frames of images is ensured.
According to the display panel provided by the embodiment of the invention, the pixel electrode is arranged on the color film substrate and is electrically connected with the drain electrode of the thin film transistor through the conductive spacer on the array substrate, so that the drain electrode charges the pixel electrode; the first storage electrode and the second storage electrode form a storage capacitor to ensure that the display of two continuous frames of images is uninterrupted; the pixel electrode is located on the color film substrate, the data line is located on the array substrate, and the liquid crystal is filled between the color film substrate and the array substrate, so that the spacing distance between the pixel electrode on the color film substrate and the data line on the array substrate is increased (at least larger than the box thickness of the liquid crystal), that is, the spacing distance between the data line and the pixel electrode is increased compared with the prior art, and thus, the coupling capacitance between the pixel electrode and the data line is greatly reduced, the vertical crosstalk problem of the display panel is improved, and the display quality of the display panel is improved.
Optionally, the color filter substrate further includes a common electrode formed on the first substrate; under the condition that the common electrode and the pixel electrode are positioned on different layers, at least one of the common electrode and the pixel electrode far away from the first substrate is a slit electrode; or, in the case where the pixel electrode and the common electrode are located on the same layer, both the pixel electrode and the common electrode are slit electrodes.
Under the condition that the common electrode and the pixel electrode are located on different layers, at least one of the common electrode and the pixel electrode far away from the first substrate is a slit electrode. That is, the pixel electrode may be located above the common electrode, and the pixel electrode is located away from the first substrate, in this case, the pixel electrode is a slit electrode, and the common electrode may be a slit electrode or a flat plate electrode. The common electrode may be located above the pixel electrode, and the common electrode is far away from the first substrate, and the common electrode is a slit electrode, and the pixel electrode may be a slit electrode or a flat electrode. And preferably, in the case where the common electrode and the pixel electrode are located at different layers, both the pixel electrode and the common electrode are slit electrodes.
Note that, in the case that the color filter substrate further includes a common electrode, that is, the pixel electrode and the common electrode are both disposed on the color filter substrate. Taking the pixel electrode on the common electrode as an example, after the color filter substrate and the array substrate are mounted, the pixel electrode is far away from the first substrate, that is, the pixel electrode is close to the liquid crystal, and therefore, in order to form a multi-dimensional electric field for driving the liquid crystal between the pixel electrode and the common electrode, the pixel electrode must be a slit electrode. The case where the common electrode is located above the pixel electrode is the same as the above principle. The public electrode and the pixel electrode form a multi-dimensional electric field on the same substrate, and the display panel has the characteristics of high visual angle, high response speed and the like.
In addition, the color film substrate further comprises a common electrode formed on the first substrate, and the color film substrate can comprise a pixel electrode and a common electrode; or, the color film substrate may further include a pixel electrode, a first storage electrode, a second storage electrode, and a common electrode; alternatively, the color filter substrate may include a pixel electrode, a first storage electrode (or a second storage electrode), and a common electrode.
Optionally, the array substrate further includes a common electrode formed on the second substrate, the color filter substrate includes a pixel electrode formed on the first substrate, and a vertical electric field is formed between the pixel electrode and the common electrode, so that the correspondingly formed display panel is a TN (Twisted Nematic) display panel, and the like, and the display panel has the characteristics of low cost and the like.
In addition, the array substrate further includes a common electrode formed on the second substrate, and it may be that the array substrate includes the common electrode; the array substrate can also comprise a first storage electrode, a second storage electrode and a common electrode; alternatively, the color filter substrate may include a second storage electrode (or a first storage electrode) and a common electrode. In the embodiment of the present invention, the color filter substrate includes the pixel electrode, and the array substrate includes the first storage electrode, the second storage electrode, and the common electrode.
Optionally, as shown in fig. 7, the array substrate further includes a second storage electrode 11 formed on the second substrate 201, and the second storage electrode 11 and the gate line 5 may be formed through a single patterning process. The one-time composition process comprises the processes of masking, exposing, developing, etching, stripping and the like, and the second storage electrode and the grid line are formed through the one-time composition process, so that the times of the composition process are reduced, and the manufacturing cost is reduced.
Optionally, under the condition that the first storage electrode and the common electrode are simultaneously located on the color film substrate or the array substrate, the first storage electrode and the common electrode may be formed through a one-time composition process, so that the number of times of the composition process may be reduced, and the manufacturing cost may be reduced. As shown in fig. 7, taking the example that the first storage electrode 10 and the common electrode 4 are simultaneously located on the array substrate, the first storage electrode 10 and the common electrode 4 may be formed by a single patterning process.
Optionally, as shown in fig. 7, the array substrate further includes a common electrode line 12 electrically connected to the common electrode 4, and the common electrode line 12 and the gate line 5 may be formed through a single patterning process, so that the number of patterning processes may be reduced, thereby reducing the manufacturing cost.
The first storage electrode and the second storage electrode form a storage capacitor in various ways. The first storage electrode and the second storage electrode can be respectively charged through the pixel electrode and the grid line to form a storage capacitor; the storage capacitor may also be formed by charging through the pixel electrode and the common electrode line, respectively.
Specifically, in the embodiment of the present invention, since the pixel electrode is electrically connected to the drain electrode, the first storage electrode and the second storage electrode are charged through the pixel electrode and the gate line, respectively, to form the storage capacitor. The first storage electrode may be electrically connected to the drain electrode to charge the first storage electrode through the drain electrode, and the second storage electrode may be electrically connected to the gate line to charge the second storage electrode through the gate line, such that a storage capacitor is formed at an overlapping region of the first storage electrode and the second storage electrode. Alternatively, the first storage electrode may be electrically connected to the gate line, and the first storage electrode may be charged through the gate line, and the second storage electrode may be electrically connected to the drain electrode, and the second storage electrode may be charged through the drain electrode, such that a storage capacitor is formed at an overlapping region of the first storage electrode and the second storage electrode.
In the case where the first storage electrode and the second storage electrode are charged by the pixel electrode and the common electrode line, respectively, to form a storage capacitor. The first storage electrode may be electrically connected to the drain electrode through which the first storage electrode is charged, and the second storage electrode may be electrically connected to a common electrode line through which the second storage electrode is charged, such that a storage capacitor is formed at an overlapping region of the first storage electrode and the second storage electrode. Alternatively, the first storage electrode may be electrically connected to a common electrode line through which the first storage electrode is charged, and the second storage electrode may be electrically connected to the drain electrode through which the second storage electrode is charged, such that a storage capacitance is formed at an overlapping region of the first storage electrode and the second storage electrode.
In the following, taking an example that the pixel electrode is disposed on the color filter substrate, and the common electrode, the first storage electrode, and the second storage electrode are disposed on the array substrate, a specific embodiment is provided to describe in detail a display panel provided in the embodiment of the present invention.
As shown in fig. 6, the display panel includes: the liquid crystal display comprises a color film substrate 1 and an array substrate 2 which are oppositely boxed, and further comprises a liquid crystal 3 and a conductive spacer 9 which are positioned between the color film substrate 1 and the array substrate 2; the color filter substrate 1 includes a first substrate 101 and a pixel electrode 7 formed on the first substrate 101. The color film substrate further comprises: a planarization layer (not shown) disposed on the first substrate and covering the pixel electrode 7, wherein the planarization layer is provided with a pixel electrode via at a position corresponding to the drain electrode 803, and the conductive spacer 9 is electrically connected to the pixel electrode 7 through the pixel electrode via.
As shown in fig. 6 and 7, the array substrate 2 includes: a second substrate 201, and a gate line 5, a data line 6 and a thin film transistor formed on the second substrate 201; the array substrate further includes a gate insulating layer (not shown) formed on the second substrate and covering the second storage electrode and the gate line, and a passivation layer (not shown) covering the thin film transistor. The gate electrode 801 of the thin film transistor is electrically connected to the gate line 5, the source electrode 802 is electrically connected to the data line 6, the passivation layer is provided with a drain via 15 at a position corresponding to the drain electrode 803, and the conductive spacer 9 is electrically connected to the drain electrode 803 through the drain via 15.
As shown in fig. 7, the array substrate further includes a first storage electrode 10, a second storage electrode 11, a common electrode 4, and a common electrode line 12 formed on a second substrate 201. The gate insulating layer is provided with a second storage electrode via hole 14 at a position corresponding to the second storage electrode 11, and the common electrode 4 is formed on the gate insulating layer and electrically connected to the second storage electrode 11 through the second storage electrode via hole 14; the passivation layer is provided with a drain via 15 at a position corresponding to the drain electrode 803, and the first storage electrode 10 is formed on the passivation layer and electrically connected to the drain electrode 803 through the drain via 15.
The first storage electrode 10 passes through the drain via 15 and the drain 803; the second storage electrode 11 is electrically connected to the common electrode 4 through a second storage electrode via 14, and the common electrode 4 is electrically connected to the common electrode line 12 through a common electrode via 13, so that the second storage electrode 11 is electrically connected to the common electrode line 12. In this way, the first storage electrode 10 is charged through the drain electrode 803, the second storage electrode 11 is charged through the common electrode line 12, and the first storage electrode 10 and the second storage electrode 11 form a storage capacitor in the overlapping area 16, so that a voltage can be stored for use when updating a picture.
According to the display panel provided by the embodiment of the invention, the pixel electrode is arranged on the color film substrate and is electrically connected with the drain electrode through the conductive spacer, so that the drain electrode charges the pixel electrode, the common electrode is arranged on the array substrate and is electrically connected with the common electrode line, and the common electrode is charged through the common electrode line, so that the pixel electrode and the common electrode form an electric field to drive liquid crystal to realize display; the first storage electrode is charged through the drain electrode, the second storage electrode is charged through the common electrode wire, and then a storage capacitor is formed in the overlapping area of the first storage electrode and the second storage electrode, so that uninterrupted display of two continuous frames of images is guaranteed; the pixel electrode is located on the color film substrate, the data line is located on the array substrate, and the liquid crystal is filled between the color film substrate and the array substrate, so that the distance between the pixel electrode on the color film substrate and the data line on the array substrate is increased (the distance is at least larger than the box thickness of the liquid crystal), that is, the distance between the data line and the pixel electrode is increased compared with the prior art, and thus, the coupling capacitance between the pixel electrode and the data line is greatly reduced, the vertical crosstalk problem of the display panel is improved, and the display quality of the display panel is improved.
An embodiment of a method for manufacturing the display panel shown in fig. 6 is described below, where the method includes:
step S011, forming pixel electrodes arranged in a matrix and a flat layer covering the pixel electrodes on the first substrate, the flat layer being provided with pixel electrode via holes at positions corresponding to the pixel electrodes. The formed color film substrate comprises a pixel electrode.
Step S021, as shown in fig. 8, a gate metal layer is formed on the second substrate 201 through a one-step patterning process, wherein the gate metal layer includes: a gate line 5, a gate electrode 801, a common electrode line 12, and a second storage electrode 11.
And S022, forming a gate insulating layer covering the gate metal layer on the second substrate, wherein the gate insulating layer is formed with a second storage electrode via hole at a position corresponding to the second storage electrode and a common electrode via hole at a position corresponding to the common electrode line.
Step S023, as shown in fig. 9, a source-drain metal layer is formed on the second substrate 201, wherein the source-drain metal layer includes the data line 6, the source 802 and the drain 803. The source electrode 802 is electrically connected to the data line 6.
And S024, forming a passivation layer on the second substrate, wherein the passivation layer is provided with a drain via hole at a position corresponding to the drain.
The above steps S021 to S024 may form the array substrate as shown in fig. 10, the gate insulating layer (not shown) is formed with the second storage electrode via 14 at a position corresponding to the second storage electrode 11, and the common electrode via 13 is formed at a position corresponding to the common electrode line 12. A passivation layer (not shown in the drawing) is provided with a drain via 15 at a position corresponding to the drain electrode 803.
In step S025, as shown in fig. 11, the common electrode 4 and the first storage electrode 10 are formed through a one-time patterning process. Specifically, the common electrode 4 is formed in a region defined by the intersection of the gate line 5 and the data line 6, and is electrically connected to the common electrode line 12 through the common electrode via 13. The second storage electrode 11 is electrically connected to the common electrode 4 through the second storage electrode via hole 14. The first storage electrode 10 is formed over the drain electrode 803, and is electrically connected to the drain electrode 803 through a drain via 15.
In step S026, as shown in fig. 7, a conductive spacer 9 is formed on the second substrate at a position corresponding to the drain. The conductive spacer 9 is electrically connected to the drain 803 through the drain via 15.
Step S027, as shown in fig. 6, a liquid crystal 3 is formed between the color film substrate 1 and the array substrate 2, and the color film substrate 1 and the array substrate 2 are sealed by a sealing process. At this time, the conductive spacer on the array substrate is electrically connected with the pixel electrode through the pixel electrode via hole of the flat layer on the color film substrate.
Fig. 7 shows an array substrate formed through the steps S021 to S026, and fig. 6 shows a display panel formed by combining the color film substrate and the array substrate.
The manufacturing method for forming the display panel shown in fig. 6 is not limited to the above specific steps, and for example, the conductive spacer may be formed on a color filter substrate. The embodiments of the present invention only use the above specific steps as examples to describe the manufacturing method of the display panel provided by the embodiments of the present invention.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (8)
1. A display panel, comprising: the liquid crystal display comprises a color film substrate, an array substrate, a liquid crystal and a spacer, wherein the color film substrate and the array substrate are oppositely arranged, and the liquid crystal and the spacer are positioned between the color film substrate and the array substrate;
the color film substrate comprises: the liquid crystal display device comprises a first substrate and pixel electrodes formed on the first substrate in a matrix arrangement;
the array substrate includes: the liquid crystal display panel comprises a second substrate, and a grid line, a data line and a thin film transistor which are formed on the second substrate; the grid electrode of the thin film transistor is electrically connected with the grid line, the source electrode of the thin film transistor is electrically connected with the data line, and the drain electrode of the thin film transistor is electrically connected with the corresponding pixel electrode through the conductive spacer;
the pixel structure further comprises a first storage electrode and a second storage electrode which are formed on the first substrate and/or the second substrate, wherein the first storage electrode and the second storage electrode are insulated from each other and have an overlapping area for forming a storage capacitor in the overlapping area, and the first storage electrode or the second storage electrode is electrically connected with the pixel electrode;
the second storage electrode is formed on the second substrate, and the second storage electrode and the grid line are formed through a one-time composition process;
the first storage electrode is formed on the first substrate.
2. The display panel according to claim 1, wherein the color filter substrate further comprises a common electrode formed on the first substrate;
under the condition that the common electrode and the pixel electrode are positioned on different layers, at least one of the common electrode and the pixel electrode far away from the first substrate is a slit electrode; or,
and under the condition that the pixel electrode and the common electrode are positioned on the same layer, the pixel electrode and the common electrode are both slit electrodes.
3. The display panel according to claim 2, wherein the pixel electrode and the common electrode are both slit electrodes in a case where the common electrode and the pixel electrode are located in different layers.
4. The display panel according to claim 1, wherein the array substrate further comprises a common electrode formed on the second substrate.
5. The display panel according to claim 4, wherein the array substrate further comprises a common electrode line electrically connected to the common electrode, and the common electrode line and the gate line are formed by a single patterning process.
6. The display panel according to any one of claims 1 to 5, wherein the first storage electrode is electrically connected to the drain electrode, and wherein the second storage electrode is electrically connected to a common electrode.
7. The display panel according to claim 6, wherein the second storage electrode is formed on the second substrate and is formed by a single patterning process with the gate line, the array substrate further comprises a gate insulating layer formed on the second substrate and covering the second storage electrode and the gate line, the gate insulating layer is provided with a second storage electrode via hole at a position corresponding to the second storage electrode, and the common electrode is formed on the gate insulating layer and is electrically connected to the second storage electrode via hole.
8. The display panel of claim 1, wherein the array substrate further comprises: the passivation layer is formed on the second substrate and covers the thin film transistor, a drain electrode through hole is formed in the passivation layer at the position corresponding to the drain electrode, and the conductive spacer is electrically connected with the drain electrode through hole;
the color film substrate further comprises: the flat layer is positioned on the first substrate and covers the pixel electrode, a pixel electrode through hole is formed in the position, corresponding to the drain electrode, of the flat layer, and the conductive spacer is electrically connected with the pixel electrode through hole.
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| US10281786B2 (en) * | 2017-04-20 | 2019-05-07 | A.U. Vista, Inc. | Display device using low capacitance bus lines having gate lines and data lines on different substrates |
| CN109613772B (en) * | 2019-01-03 | 2021-12-10 | 京东方科技集团股份有限公司 | Display substrate, manufacturing method and repairing method thereof and display device |
| CN115308952B (en) * | 2022-08-31 | 2023-05-26 | 惠科股份有限公司 | Display panel and display device |
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