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CN104134723A - Vertical type LED chip structure and manufacturing method thereof - Google Patents

Vertical type LED chip structure and manufacturing method thereof Download PDF

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Publication number
CN104134723A
CN104134723A CN201410390800.9A CN201410390800A CN104134723A CN 104134723 A CN104134723 A CN 104134723A CN 201410390800 A CN201410390800 A CN 201410390800A CN 104134723 A CN104134723 A CN 104134723A
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layer
led chip
vertical
type led
preparation
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吕孟岩
张琼
童玲
张宇
李起鸣
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Enraytek Optoelectronics Co Ltd
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Enraytek Optoelectronics Co Ltd
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Priority to CN201410390800.9A priority Critical patent/CN104134723A/en
Publication of CN104134723A publication Critical patent/CN104134723A/en
Priority to PCT/CN2015/086098 priority patent/WO2016019860A1/en
Priority to GB1701184.2A priority patent/GB2542542B/en
Priority to DE112015003673.3T priority patent/DE112015003673T5/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018Bonding of wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/832Electrodes characterised by their material
    • H10H20/835Reflective materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/84Coatings, e.g. passivation layers or antireflective coatings
    • H10H20/841Reflective coatings, e.g. dielectric Bragg reflectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/032Manufacture or treatment of electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/832Electrodes characterised by their material
    • H10H20/833Transparent materials

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Abstract

本发明提出了一种垂直型LED芯片结构及其制备方法,在P-GaN层上依次形成透明导电接触层、设有分布图形的低折射率介质层和反射层三层组成的复合反射镜,可使低折射率介质层占复合反射镜较大的面积,能够大大降低反射镜对光的吸收比例,且由于透明导电接触层横向导电能力优秀,可保证电流在整个P-GaN层均匀的分布,有效提高了复合反射镜的综合有效反射率。

The present invention proposes a vertical LED chip structure and a preparation method thereof, in which a transparent conductive contact layer, a low-refractive index medium layer with distribution patterns and a reflective layer are sequentially formed on the P-GaN layer to form a composite reflector composed of three layers, The low refractive index medium layer can occupy a large area of the composite mirror, which can greatly reduce the light absorption ratio of the mirror, and because the transparent conductive contact layer has excellent lateral conductivity, it can ensure the uniform distribution of current in the entire P-GaN layer , effectively improving the comprehensive effective reflectivity of the composite mirror.

Description

垂直型LED芯片结构及其制备方法Vertical LED chip structure and preparation method thereof

技术领域technical field

本发明涉及LED芯片制造领域,尤其涉及一种垂直型LED芯片结构及其制备方法。The invention relates to the field of LED chip manufacturing, in particular to a vertical LED chip structure and a preparation method thereof.

背景技术Background technique

近年来,对于发光二极管(Light-Emitting Diode,LED)的研究已经成为趋势。LED芯片有两种基本结构:横向结构(Lateral)和垂直结构(Vertical)。传统的正装结构LED芯片是横向结构的典型代表。LED芯片形成在蓝宝石衬底上,由于受限于蓝宝石衬底不导电、导热率差的制约,横向结构自从诞生就存在先天缺陷:(1)蓝宝石不导电,P电极与N电极均在LED芯片的同一侧,由此带来多种不利因素,如一、在电性能方面,电流在n-与p-类型限制层中横向流动不等距离带来的电流拥挤效应(Current crowding);二、出光性能方面,N电极与P电极均在出光面上带来的电极遮光问题;(2)蓝宝石导热系数很差,横向结构LED芯片的PN结热量需要通过蓝宝石衬底导出,对大尺寸的功率型芯片来说导热路径较长,这种LED芯片的热阻较大,工作电流也受到限制。In recent years, research on light-emitting diodes (Light-Emitting Diode, LED) has become a trend. LED chips have two basic structures: lateral structure (Lateral) and vertical structure (Vertical). The traditional positive structure LED chip is a typical representative of the lateral structure. The LED chip is formed on the sapphire substrate. Due to the limitation of the non-conductive and poor thermal conductivity of the sapphire substrate, the lateral structure has inherent defects since its birth: (1) The sapphire is not conductive, and the P electrode and the N electrode are both on the LED chip. On the same side of the N-type confinement layer, this brings many unfavorable factors, such as 1. In terms of electrical performance, the current crowding effect (Current crowding) caused by the unequal distance of the current flowing laterally in the n- and p-type confinement layers; 2. The light output In terms of performance, both the N electrode and the P electrode are on the light-emitting surface to cause electrode shading problems; (2) The thermal conductivity of sapphire is very poor, and the PN junction heat of the lateral structure LED chip needs to be exported through the sapphire substrate. For the chip, the heat conduction path is longer, and the thermal resistance of this LED chip is relatively large, and the working current is also limited.

为了克服横向结构LED芯片的这些不足,美国Cree公司、德国Osram公司、美国Philips Lumileds公司及美国SemiLEDs都积极开发垂直型LED芯片(以下简称V-LED)。V-LED采用高导电率、散热良好的硅或者金属衬底。一方面:V-LED芯片的P电极与N电极分别在LED芯片的外延层的两侧,由于图形化电极和全部的p-类型限制层作为P面电极,使得电流几乎全部垂直流过LED芯片的外延层,极少横向流动的电流,可以改善平面结构的电流分布问题,提高发光效率,也可以解决P电极的遮光问题,提升LED芯片的发光面积;另一方面:衬底采用导热良好的硅或者金属,PN结散热问题能够得到解决,大尺寸功率型芯片得以实现。In order to overcome these deficiencies of the horizontal structure LED chips, Cree Company of the United States, Osram Company of Germany, Philips Lumileds Company of the United States and SemiLEDs of the United States are actively developing vertical LED chips (hereinafter referred to as V-LEDs). V-LEDs use silicon or metal substrates with high conductivity and good heat dissipation. On the one hand: the P electrode and N electrode of the V-LED chip are respectively on both sides of the epitaxial layer of the LED chip. Since the patterned electrode and all the p-type confinement layers are used as the P surface electrode, the current almost flows through the LED chip vertically. The epitaxial layer, with very little lateral flow of current, can improve the current distribution of the planar structure, improve the luminous efficiency, and can also solve the shading problem of the P electrode, and increase the light-emitting area of the LED chip; on the other hand: the substrate adopts a good thermal conductivity Silicon or metal, PN junction heat dissipation problems can be solved, and large-size power chips can be realized.

由于底部与P电极接触的硅或金属衬底均不能透光,因此会在V-LED芯片的P面形成反射镜用于增加出光效率,V-LED芯片主要从顶部的N面出光,P面欧姆接触好坏与反射镜反射率高低成为V-LED芯片成败的关键点,其中P面反射镜反射率的优劣直接决定V-LED芯片的发光亮度。目前,垂直型LED芯片采用的光反射镜主要为金属结构,依赖Ag、Al、Rh等金属的高反射率完成光线由到芯片底部光的反射。Since the silicon or metal substrate in contact with the P electrode at the bottom cannot transmit light, a reflector will be formed on the P surface of the V-LED chip to increase the light extraction efficiency. The V-LED chip mainly emits light from the top N surface, and the P surface The quality of the ohmic contact and the reflectivity of the mirror become the key points for the success of the V-LED chip, and the reflectivity of the P surface mirror directly determines the luminous brightness of the V-LED chip. At present, the light reflectors used in vertical LED chips are mainly metal structures, relying on the high reflectivity of Ag, Al, Rh and other metals to complete the reflection of light from the light to the bottom of the chip.

请参考图1,图1为现有技术中一种垂直型LED芯片的结构示意图,目前,市场上V-LED芯片包括衬底10、依次形成在衬底10上的保护层和金属键合层20、反射镜30、P-GaN层40、量子阱层50、N-GaN层60以及N电极70。通常,反射镜30多使用高反射率的金属材料,常见的为以Ag为主体反射材料。由于Ag的性质活泼,导致形成的反射镜30易发生氧化、团簇、迁移等现象,从而需制备保护层;由于Ag与V-LED芯片的P-GaN之间粘附力不良,反射镜前通常会制备一层Cr、Ni(图未示出)等其他金属解决粘附性问题。然而,单纯采用Ag或其他金属材质形成的反射镜30的界面对光线会有一定的吸收,降低了发光的效率。Please refer to FIG. 1. FIG. 1 is a schematic structural diagram of a vertical LED chip in the prior art. At present, V-LED chips on the market include a substrate 10, a protective layer and a metal bonding layer sequentially formed on the substrate 10. 20. Mirror 30, P-GaN layer 40, quantum well layer 50, N-GaN layer 60 and N electrode 70. Generally, the reflective mirror 30 is mostly made of metal material with high reflectivity, and Ag is commonly used as the main reflective material. Due to the active nature of Ag, the formed reflector 30 is prone to oxidation, clustering, migration and other phenomena, so a protective layer needs to be prepared; due to the poor adhesion between Ag and the P-GaN of the V-LED chip, the front of the reflector 30 Usually a layer of Cr, Ni (not shown) and other metals are prepared to solve the adhesion problem. However, the interface of the reflector 30 formed solely of Ag or other metal materials will absorb light to a certain extent, reducing the efficiency of light emission.

为了解决上述问题,现有技术中还提出一种如图2所示的垂直型LED芯片的结构,根据可见光从光密介质入射到光疏介质发生全反射这一物理现象,由Ag材质的反射镜30和一层不导电的低折射率介质(如SiO2)组合的双层复合反射镜,可以有效减小光在反射镜30界面的吸收,提升了复合反射镜的有效反射率。如图2所示,图2中提出的垂直型LED芯片与图1中的相似,不同的是,在反射镜30和P-GaN层40之间形成了低折射率介质31,用于提高有效反射率。In order to solve the above problems, a vertical LED chip structure as shown in Figure 2 is also proposed in the prior art. According to the physical phenomenon of total reflection of visible light from an optically denser medium to an optically rarer medium, the reflection of the Ag material The double-layer composite mirror composed of the mirror 30 and a layer of non-conductive low-refractive index medium (such as SiO 2 ) can effectively reduce light absorption at the interface of the mirror 30 and improve the effective reflectivity of the composite mirror. As shown in FIG. 2, the vertical LED chip proposed in FIG. 2 is similar to that in FIG. Reflectivity.

由于复合反射镜还有一个重要功能就是作为垂直型LED芯片P面的欧姆接触层,而低折射率介质31(通常为SiO2)并不导电,无法实现欧姆接触的功能,只能靠Ag材质的反射镜30来实现,因此必须要保证Ag材质的反射镜30在复合反射镜中占相当大的比例,低折射率介质31在复合反射镜所占的表面积只占复合反射镜的表面积的20-80%,然而不能通过无限增加低折射率介质31在复合反射镜比例的方式来增大复合反射镜的反射率,此外P面的横向电流扩展能力极弱,这种依靠Ag材质的反射镜30的分布来调整电流分布的双层复合反射镜很难做到均匀的将电流扩散到整个P面。Another important function of the composite reflector is to serve as an ohmic contact layer on the P side of the vertical LED chip, and the low-refractive index medium 31 (usually SiO 2 ) is not conductive, so it cannot realize the function of ohmic contact, so it can only be made of Ag material. Therefore, it is necessary to ensure that the reflector 30 of Ag material accounts for a considerable proportion in the compound reflector, and the surface area occupied by the low-refractive index medium 31 in the compound reflector only accounts for 20% of the surface area of the compound reflector. -80%, but the reflectivity of the composite mirror cannot be increased by infinitely increasing the proportion of the low-refractive index medium 31 in the composite mirror. In addition, the lateral current spreading ability of the P surface is extremely weak, and this mirror relying on Ag material 30 distribution to adjust the current distribution of the double-layer composite mirror is difficult to spread the current uniformly to the entire P surface.

因此,如何解决现有技术中反射镜存在的问题,便成为本领域技术人员的一项重要任务。Therefore, how to solve the problems existing in the reflectors in the prior art has become an important task for those skilled in the art.

发明内容Contents of the invention

本发明的目的在于提供一种垂直型LED芯片结构及其制备方法,能够在降低反射镜对光的吸收比例的同时兼顾电流在垂直型LED芯片P面的均匀分布。The purpose of the present invention is to provide a vertical LED chip structure and a preparation method thereof, which can reduce the light absorption ratio of the reflector while taking into account the uniform distribution of current on the P surface of the vertical LED chip.

为了实现上述目的,本发明提出了一种垂直型LED芯片结构的制备方法,包括步骤:In order to achieve the above object, the present invention proposes a method for preparing a vertical LED chip structure, comprising steps:

提供生长衬底,在所述生长衬底上形成外延层,所述外延层包括依次形成的未掺杂层、N-GaN层、量子阱层和P-GaN层,所述未掺杂层形成在所述生长衬底上;A growth substrate is provided, and an epitaxial layer is formed on the growth substrate, the epitaxial layer includes an undoped layer, an N-GaN layer, a quantum well layer and a P-GaN layer formed in sequence, and the undoped layer is formed on said growth substrate;

在所述P-GaN层上形成透明导电接触层;forming a transparent conductive contact layer on the P-GaN layer;

在所述透明导电接触层上形成低折射率介质层,对所述低折射率介质层进行光刻,刻蚀出分布图形,所述分布图形暴露出所述透明导电接触层;forming a low-refractive index medium layer on the transparent conductive contact layer, performing photolithography on the low-refractive index medium layer, and etching a distribution pattern, and the distribution pattern exposes the transparent conductive contact layer;

在所述低折射率介质层和透明导电接触层上形成反射层;forming a reflective layer on the low refractive index medium layer and the transparent conductive contact layer;

在所述反射层上形成保护层及金属键合层;forming a protective layer and a metal bonding layer on the reflective layer;

在所述金属键合层上键合键合衬底;bonding a bonding substrate on the metal bonding layer;

去除所述生长衬底,并刻蚀所述未掺杂层,暴露出所述N-GaN层;removing the growth substrate, and etching the undoped layer to expose the N-GaN layer;

在所述N-GaN层上形成N电极。An N electrode is formed on the N-GaN layer.

进一步的,在所述的垂直型LED芯片结构的制备方法中,所述透明导电接触层材质为ITO、ZnO或AZO。Further, in the preparation method of the vertical LED chip structure, the material of the transparent conductive contact layer is ITO, ZnO or AZO.

进一步的,在所述的垂直型LED芯片结构的制备方法中,所述低折射率介质层材质为SiO2、SiNx、Ti3O5、Al2O3中的一种或多种堆叠而成,所述低折射率介质层的厚度范围是10埃~50μm。Further, in the preparation method of the vertical LED chip structure, the material of the low refractive index medium layer is one or more of SiO 2 , SiN x , Ti 3 O 5 , Al 2 O 3 stacked and In this way, the thickness of the low refractive index medium layer is in the range of 10 angstroms to 50 μm.

进一步的,在所述的垂直型LED芯片结构的制备方法中,所述低折射率介质层的面积占所述垂直型LED芯片面积的85%~95%。Further, in the preparation method of the vertical LED chip structure, the area of the low refractive index medium layer accounts for 85%-95% of the area of the vertical LED chip.

进一步的,在所述的垂直型LED芯片结构的制备方法中,采用负胶剥离技术在固定区域蒸镀形成反射层,使所述反射层的尺寸小于所述垂直型LED芯片的尺寸。Further, in the preparation method of the vertical LED chip structure, a reflective layer is evaporated and formed in a fixed area by negative adhesive stripping technology, so that the size of the reflective layer is smaller than that of the vertical LED chip.

进一步的,在所述的垂直型LED芯片结构的制备方法中,所述反射层的材质为Ag、Al或Rh。Further, in the method for preparing the vertical LED chip structure, the reflective layer is made of Ag, Al or Rh.

进一步的,在所述的垂直型LED芯片结构的制备方法中,所述保护层材质为(Ti-Pt)x或TiW-Pt组合,所述金属键合层材质为Au、Sn或AuSn合金。Further, in the preparation method of the vertical LED chip structure, the protective layer is made of (Ti-Pt)x or TiW-Pt combination, and the metal bonding layer is made of Au, Sn or AuSn alloy.

进一步的,在所述的垂直型LED芯片结构的制备方法中,所述键合衬底材质为Si、Cu或MoCu。Further, in the method for preparing the vertical LED chip structure, the bonding substrate is made of Si, Cu or MoCu.

进一步的,在所述的垂直型LED芯片结构的制备方法中,采用激光剥离或化学剥离去除所述生长衬底。Further, in the preparation method of the vertical LED chip structure, the growth substrate is removed by laser lift-off or chemical lift-off.

进一步的,在所述的垂直型LED芯片结构的制备方法中,在去除所述生长衬底之后,形成所述N电极之前,首先采用湿法或者干法刻蚀对未掺杂层进行刻蚀,暴露出所述N-GaN层;其次对所述N-GaN层进行粗化处理形成粗糙面,所述粗化处理使用溶液为KOH或H2SO4Further, in the preparation method of the vertical LED chip structure, after removing the growth substrate and before forming the N electrode, the undoped layer is firstly etched by wet or dry etching , exposing the N-GaN layer; secondly, performing roughening treatment on the N-GaN layer to form a rough surface, and the solution used for the roughening treatment is KOH or H 2 SO 4 .

进一步的,在所述的垂直型LED芯片结构的制备方法中,在所述N电极之后,在所述粗糙面上形成钝化层,所述钝化层为SiO2Further, in the method for preparing the vertical LED chip structure, after the N electrode, a passivation layer is formed on the rough surface, and the passivation layer is SiO 2 .

进一步的,在所述的垂直型LED芯片结构的制备方法中,所述N电极材质为Ni/Au、Al/Ti/Pt/Au或Cr/Pt/Au。Further, in the preparation method of the vertical LED chip structure, the material of the N electrode is Ni/Au, Al/Ti/Pt/Au or Cr/Pt/Au.

本发明还提出了一种垂直型LED芯片结构,采用如上文所述的垂直型LED芯片结构的制备方法形成,所述结构依次包括:键合衬底、金属键合层、保护层、反射层、设有分布图形的低折射率介质层、透明导电接触层、P-GaN层、量子阱层、N-GaN层和N电极,其中,所述N电极与所述N-GaN层相连。The present invention also proposes a vertical LED chip structure, which is formed by the method for preparing the vertical LED chip structure as described above, and the structure includes in sequence: a bonding substrate, a metal bonding layer, a protective layer, and a reflective layer . A low-refractive-index medium layer with a distribution pattern, a transparent conductive contact layer, a P-GaN layer, a quantum well layer, an N-GaN layer and an N electrode, wherein the N electrode is connected to the N-GaN layer.

进一步的,在所述的垂直型LED芯片结构中,还包括粗糙面和钝化层,所述粗糙面形成于所述N-GaN层表面,所述钝化层形成于所述粗糙面上,所述粗糙面和钝化层均暴露出所述N电极。Further, in the vertical LED chip structure, it also includes a rough surface and a passivation layer, the rough surface is formed on the surface of the N-GaN layer, the passivation layer is formed on the rough surface, Both the rough surface and the passivation layer expose the N electrode.

与现有技术相比,本发明的有益效果主要体现在:在P-GaN层上依次形成透明导电接触层、设有分布图形的低折射率介质层和反射层三层组成的复合反射镜,可使低折射率介质层占复合反射镜较大的面积,能够大大降低反射镜对光的吸收比例,且由于透明导电接触层横向导电能力优秀,可保证电流在整个P-GaN层均匀的分布,有效提高了复合反射镜的综合有效反射率。Compared with the prior art, the beneficial effect of the present invention is mainly reflected in: a composite reflector composed of a transparent conductive contact layer, a low-refractive index medium layer with a distribution pattern and a reflective layer is sequentially formed on the P-GaN layer, The low refractive index medium layer can occupy a large area of the composite mirror, which can greatly reduce the light absorption ratio of the mirror, and because the transparent conductive contact layer has excellent lateral conductivity, it can ensure the uniform distribution of current in the entire P-GaN layer , effectively improving the comprehensive effective reflectivity of the composite mirror.

附图说明Description of drawings

图1为现有技术中一种垂直型LED芯片的结构示意图;FIG. 1 is a schematic structural view of a vertical LED chip in the prior art;

图2为现有技术中另一种垂直型LED芯片的结构示意图;FIG. 2 is a schematic structural diagram of another vertical LED chip in the prior art;

图3为本发明一实施例中垂直型LED芯片结构的制备方法的流程图;3 is a flowchart of a method for preparing a vertical LED chip structure in an embodiment of the present invention;

图4至图12为本发明一实施例中垂直型LED芯片结构制作过程中的剖面示意图。4 to 12 are schematic cross-sectional views during the fabrication process of the vertical LED chip structure in an embodiment of the present invention.

具体实施方式Detailed ways

下面将结合示意图对本发明的垂直型LED芯片结构及其制备方法进行更详细的描述,其中表示了本发明的优选实施例,应该理解本领域技术人员可以修改在此描述的本发明,而仍然实现本发明的有利效果。因此,下列描述应当被理解为对于本领域技术人员的广泛知道,而并不作为对本发明的限制。The vertical LED chip structure of the present invention and its preparation method will be described in more detail below in conjunction with schematic diagrams, wherein a preferred embodiment of the present invention is shown, and it should be understood that those skilled in the art can modify the present invention described here and still realize Advantageous effects of the present invention. Therefore, the following description should be understood as the broad knowledge of those skilled in the art, but not as a limitation of the present invention.

为了清楚,不描述实际实施例的全部特征。在下列描述中,不详细描述公知的功能和结构,因为它们会使本发明由于不必要的细节而混乱。应当认为在任何实际实施例的开发中,必须做出大量实施细节以实现开发者的特定目标,例如按照有关系统或有关商业的限制,由一个实施例改变为另一个实施例。另外,应当认为这种开发工作可能是复杂和耗费时间的,但是对于本领域技术人员来说仅仅是常规工作。In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as changing from one embodiment to another in accordance with system-related or business-related constraints. Additionally, it should be recognized that such a development effort might be complex and time consuming, but would nevertheless be merely a routine undertaking for those skilled in the art.

在下列段落中参照附图以举例方式更具体地描述本发明。根据下面说明和权利要求书,本发明的优点和特征将更清楚。需说明的是,附图均采用非常简化的形式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目的。In the following paragraphs the invention is described more specifically by way of example with reference to the accompanying drawings. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

请参考图3,在本实施例中,提出了一种垂直型LED芯片结构的制备方法,包括步骤:Please refer to FIG. 3. In this embodiment, a method for preparing a vertical LED chip structure is proposed, including steps:

S100:提供生长衬底,在所述生长衬底上形成外延层,所述外延层包括依次形成的未掺杂层、N-GaN层、量子阱层和P-GaN层,所述未掺杂层形成在所述生长衬底上;S100: Provide a growth substrate, and form an epitaxial layer on the growth substrate, the epitaxial layer includes an undoped layer, an N-GaN layer, a quantum well layer, and a P-GaN layer that are sequentially formed, the undoped a layer is formed on the growth substrate;

S200:在所述P-GaN层上形成透明导电接触层;S200: forming a transparent conductive contact layer on the P-GaN layer;

S300:在所述透明导电接触层上形成低折射率介质层,对所述低折射率介质层进行光刻,刻蚀出分布图形,所述分布图形暴露出所述透明导电接触层;S300: forming a low-refractive-index medium layer on the transparent conductive contact layer, performing photolithography on the low-refractive-index medium layer, and etching a distribution pattern, the distribution pattern exposing the transparent conductive contact layer;

S400:在所述低折射率介质层和透明导电接触层上形成反射层;S400: forming a reflective layer on the low refractive index medium layer and the transparent conductive contact layer;

S500:在所述反射层上形成保护层及金属键合层;S500: forming a protective layer and a metal bonding layer on the reflective layer;

S600:在所述金属键合层上键合键合衬底;S600: bonding a bonding substrate on the metal bonding layer;

S700:去除所述生长衬底、并刻蚀所述未掺杂层,暴露出所述N-GaN层;S700: removing the growth substrate, and etching the undoped layer, exposing the N-GaN layer;

S800:在所述N-GaN层上形成N电极。S800: forming an N electrode on the N-GaN layer.

具体的,请参考图4,在步骤S100中,提供生长衬底100,生长衬底100可以为蓝宝石衬底、硅衬底、SiC衬底及图形化衬底等等。在本实施例中,外延层包括未掺杂层210、N-GaN层220、量子阱层230和P-GaN层240,其中,所述外延层可以采用MOCVD(金属有机气相沉积,Metal Organic Chemical VaporDeposition)和/或MBE(分子束外延,Molecular Beam Epitaxy)等生长方法形成。Specifically, referring to FIG. 4 , in step S100 , a growth substrate 100 is provided, and the growth substrate 100 may be a sapphire substrate, a silicon substrate, a SiC substrate, a patterned substrate, and the like. In this embodiment, the epitaxial layer includes an undoped layer 210, an N-GaN layer 220, a quantum well layer 230, and a P-GaN layer 240, wherein the epitaxial layer can be deposited by MOCVD (Metal Organic Chemical VaporDeposition) and/or MBE (Molecular Beam Epitaxy) and other growth methods.

请参考图5,在步骤S200中,在所述P-GaN层240上形成透明导电接触层300,所述透明导电接触层300的材质为ITO、ZnO或AZO等低阻高透光率薄膜,所述透明导电接触层300作为欧姆接触层使用。Please refer to FIG. 5, in step S200, a transparent conductive contact layer 300 is formed on the P-GaN layer 240, and the material of the transparent conductive contact layer 300 is a low-resistance high-transmittance film such as ITO, ZnO or AZO, The transparent conductive contact layer 300 is used as an ohmic contact layer.

请参考图6,在步骤S300中,在所述透明导电接触层300上形成低折射率介质层400,所述低折射率介质层400设有分布图形,即形成有通孔410,所述分布图形暴露出所述透明导电接触层300,所述分布图形可以为多种性质,例如圆形、方形或图形的不同组合分布等,在此不做限定。所述低折射率介质层400材质为SiO2、SiNx、Ti3O5、Al2O3中的一种或多种堆叠而成,所述低折射率介质层400的厚度范围是10埃~50μm,例如是100埃。所述低折射率介质层400可以采用电子束(E-beam)、溅射(Sputter)、活性等离子体沉积(Reactive PlasmaDeposition,RPD)等方式形成,优选的,形成的所述低折射率介质层400的面积占所述垂直型LED芯片面积的85%~95%,从而能够大大降低后续形成的反射镜对光的吸收比例。Please refer to FIG. 6, in step S300, a low-refractive-index medium layer 400 is formed on the transparent conductive contact layer 300, and the low-refractive-index medium layer 400 is provided with distribution patterns, that is, through holes 410 are formed, and the distribution pattern The pattern exposes the transparent conductive contact layer 300 , and the distribution pattern can be of various properties, such as a circle, a square, or a distribution of different combinations of patterns, etc., which are not limited here. The material of the low refractive index medium layer 400 is stacked by one or more of SiO 2 , SiN x , Ti 3 O 5 , Al 2 O 3 , and the thickness range of the low refractive index medium layer 400 is 10 Angstroms. ~50 μm, eg 100 angstroms. The low refractive index dielectric layer 400 can be formed by electron beam (E-beam), sputtering (Sputter), reactive plasma deposition (Reactive Plasma Deposition, RPD), etc., preferably, the formed low refractive index dielectric layer The area of 400 accounts for 85% to 95% of the area of the vertical LED chip, thereby greatly reducing the proportion of light absorbed by the subsequently formed reflector.

请参考图7,在步骤S400中,在所述低折射率介质层400和暴露出的透明导电接触层300上形成反射层500,具体的,采用负胶剥离(Lift-off)技术在固定区域蒸镀形成反射层500,使所述反射层500的尺寸小于所述垂直型LED芯片的尺寸,即使所述反射层500暴露出所述垂直型LED芯片的边缘,便于后续形成保护层全面对所述反射层500进行保护。所述反射层500的材质为Ag、Al或Rh。Please refer to FIG. 7, in step S400, a reflective layer 500 is formed on the low-refractive index medium layer 400 and the exposed transparent conductive contact layer 300, specifically, a lift-off technique is used in the fixed area The reflective layer 500 is formed by vapor deposition, so that the size of the reflective layer 500 is smaller than the size of the vertical LED chip, even if the reflective layer 500 exposes the edge of the vertical LED chip, it is convenient for the subsequent formation of a protective layer to cover all the vertical LED chips. The reflective layer 500 is used for protection. The reflective layer 500 is made of Ag, Al or Rh.

请参考图8,在步骤S500中,在所述反射层500上形成保护层及金属键合层600(为了简化附图,将所述保护层及金属键合层作为一层示意),所述保护层材质为(Ti-Pt)x或TiW-Pt组合,所述保护层全面覆盖所述反射层500,以对其进行保护。所述金属键合层材质为Au、Sn或AuSn合金,用于与后续形成的键合衬底进行键合。Please refer to FIG. 8, in step S500, a protective layer and a metal bonding layer 600 are formed on the reflective layer 500 (in order to simplify the drawings, the protective layer and the metal bonding layer are shown as one layer), the The protective layer is made of (Ti-Pt) x or TiW-Pt combination, and the protective layer fully covers the reflective layer 500 to protect it. The material of the metal bonding layer is Au, Sn or AuSn alloy, which is used for bonding with the subsequently formed bonding substrate.

请参考图9,在步骤S600中,在所述金属键合层上键合键合衬底700;所述键合衬底700材质为Si、Cu或MoCu等导电且散热良好的衬底。Referring to FIG. 9 , in step S600 , a bonding substrate 700 is bonded on the metal bonding layer; the bonding substrate 700 is made of a conductive substrate such as Si, Cu or MoCu with good heat dissipation.

请参考图10,在步骤S700中,去除所述生长衬底100,通常可以采用激光剥离或化学剥离去除所述生长衬底100。通常,采用激光剥离会使未掺杂层210在表面形成一层金属Ga,因此,需要采用酸或者碱等去除金属Ga,采用的溶液可以为HCL或KOH。Please refer to FIG. 10 , in step S700 , the growth substrate 100 is removed, and the growth substrate 100 can usually be removed by laser lift-off or chemical lift-off. Usually, a layer of metal Ga is formed on the surface of the undoped layer 210 by laser lift-off. Therefore, it is necessary to use acid or alkali to remove metal Ga, and the solution used may be HCL or KOH.

请参考图11,形成所述N电极之前,首先采用湿法或者干法(ICP)刻蚀对所述未掺杂层210进行刻蚀,暴露出所述N-GaN层220,其中,所述未掺杂层210可以被完全刻蚀去除,也可以仅仅去除部分;其次对所述N-GaN层220进行粗化处理形成粗糙面211,粗化处理形成的粗糙面211能够增加N-GaN层220的表面积,增加出光的面积,提高发光效率。Please refer to FIG. 11 , before forming the N electrode, the undoped layer 210 is first etched by wet or dry (ICP) etching to expose the N-GaN layer 220, wherein the The undoped layer 210 can be completely etched and removed, or only part of it can be removed; secondly, the N-GaN layer 220 is roughened to form a rough surface 211, and the rough surface 211 formed by the roughening treatment can increase the N-GaN layer The surface area of 220 increases the light emitting area and improves the luminous efficiency.

请参考图12,在步骤S800中,在所述N-GaN层220上形成N电极212,N电极212的材质为Ni/Au、Al/Ti/Pt/Au或Cr/Pt/Au,在形成N电极212之后,在所述粗糙面211上形成钝化层800,所述钝化层800为SiO2,用于保护整个芯片,形成的钝化层800暴露出N电极212。Please refer to FIG. 12. In step S800, an N electrode 212 is formed on the N-GaN layer 220. The material of the N electrode 212 is Ni/Au, Al/Ti/Pt/Au or Cr/Pt/Au. After the N electrode 212 , a passivation layer 800 is formed on the rough surface 211 . The passivation layer 800 is SiO 2 for protecting the entire chip. The formed passivation layer 800 exposes the N electrode 212 .

请继续参考图12,在本发明的另一面,还提出了一种垂直型LED芯片结构,采用如上文所述的垂直型LED芯片结构的制备方法形成,所述结构依次包括:键合衬底700、保护层和金属键合层600、反射层500、设有分布图形的低折射率介质层400、透明导电接触层300、P-GaN层240、量子阱层230、N-GaN层220、N电极212、粗糙面211和钝化层800,其中,所述N电极212与所述N-GaN层220相连,所述粗糙面211形成于所述N-GaN层220表面,所述钝化层800形成于所述粗糙面211上,所述粗糙面211和钝化层800均暴露出所述N电极212。Please continue to refer to FIG. 12. On the other side of the present invention, a vertical LED chip structure is also proposed, which is formed by the above-mentioned vertical LED chip structure preparation method, and the structure includes in turn: a bonding substrate 700, protective layer and metal bonding layer 600, reflective layer 500, low refractive index medium layer 400 with distribution pattern, transparent conductive contact layer 300, P-GaN layer 240, quantum well layer 230, N-GaN layer 220, The N electrode 212, the rough surface 211 and the passivation layer 800, wherein the N electrode 212 is connected to the N-GaN layer 220, the rough surface 211 is formed on the surface of the N-GaN layer 220, and the passivation A layer 800 is formed on the rough surface 211 , and both the rough surface 211 and the passivation layer 800 expose the N electrode 212 .

综上,在本发明实施例提供的垂直型LED芯片结构及其制备方法中,在P-GaN层上依次形成透明导电接触层、设有分布图形的低折射率介质层和反射层三层组成的复合反射镜,可使低折射率介质层占复合反射镜较大的面积,能够大大降低反射镜对光的吸收比例,且由于透明导电接触层横向导电能力优秀,可保证电流在整个P-GaN层均匀的分布,有效提高了复合反射镜的综合有效反射率。To sum up, in the vertical LED chip structure and its preparation method provided by the embodiment of the present invention, a transparent conductive contact layer, a low-refractive index medium layer with a distribution pattern, and a reflective layer are sequentially formed on the P-GaN layer. The composite mirror can make the low refractive index medium layer occupy a larger area of the composite mirror, which can greatly reduce the light absorption ratio of the mirror, and because the transparent conductive contact layer has excellent lateral conductivity, it can ensure that the current is in the entire P- The uniform distribution of the GaN layer effectively improves the comprehensive effective reflectivity of the composite mirror.

上述仅为本发明的优选实施例而已,并不对本发明起到任何限制作用。任何所属技术领域的技术人员,在不脱离本发明的技术方案的范围内,对本发明揭露的技术方案和技术内容做任何形式的等同替换或修改等变动,均属未脱离本发明的技术方案的内容,仍属于本发明的保护范围之内。The foregoing are only preferred embodiments of the present invention, and do not limit the present invention in any way. Any person skilled in the technical field, within the scope of the technical solution of the present invention, makes any form of equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which does not depart from the technical solution of the present invention. The content still belongs to the protection scope of the present invention.

Claims (14)

1. a preparation method for vertical-type LED chip structure, is characterized in that, comprises step:
Growth substrates is provided, in described growth substrates, forms epitaxial loayer, described epitaxial loayer comprises the undoped layer, N-GaN layer, quantum well layer and the P-GaN layer that form successively, and described undoped layer is formed in described growth substrates;
On described P-GaN layer, form electrically conducting transparent contact layer;
On described electrically conducting transparent contact layer, form low refractive index dielectric layer, described low refractive index dielectric layer is carried out to photoetching, etch distribution pattern, described distribution pattern exposes described electrically conducting transparent contact layer;
On described low refractive index dielectric layer and electrically conducting transparent contact layer, form reflector;
On described reflector, form protective layer and metal bonding layer;
Bonding bonded substrate on described metal bonding layer;
Remove described growth substrates, and undoped layer described in etching, described N-GaN layer exposed;
On described N-GaN layer, form N electrode.
2. the preparation method of vertical-type LED chip structure as claimed in claim 1, is characterized in that, described electrically conducting transparent contact layer material is ITO, ZnO or AZO.
3. the preparation method of vertical-type LED chip structure as claimed in claim 1, is characterized in that, described low refractive index dielectric layer material is SiO 2, SiN x, Ti 3o 5, Al 2o 3in one or more stacking forming, the thickness range of described low refractive index dielectric layer is 10 dust~50 μ m.
4. the preparation method of vertical-type LED chip structure as claimed in claim 1, is characterized in that, the area of described low refractive index dielectric layer accounts for 85%~95% of described vertical-type LED chip area.
5. the preparation method of vertical-type LED chip structure as claimed in claim 1, is characterized in that, adopts negative glue lift-off technology to form reflector at fixed area evaporation, makes the size in described reflector be less than the size of described vertical-type LED chip.
6. the preparation method of vertical-type LED chip structure as claimed in claim 5, is characterized in that, the material in described reflector is Ag, Al or Rh.
7. the preparation method of vertical-type LED chip structure as claimed in claim 1, is characterized in that, described protective layer material is (Ti-Pt) x or TiW-Pt combination, and described metal bonding layer material is Au, Sn or AuSn alloy.
8. the preparation method of vertical-type LED chip structure as claimed in claim 1, is characterized in that, described bonded substrate material is Si, Cu or MoCu.
9. the preparation method of vertical-type LED chip structure as claimed in claim 1, is characterized in that, adopts laser lift-off or chemical stripping to remove described growth substrates.
10. the preparation method of vertical-type LED chip structure as claimed in claim 1, it is characterized in that, after removing described growth substrates, before forming described N electrode, first adopt wet method or dry etching to carry out etching to undoped layer, expose described N-GaN layer; Secondly described N-GaN layer is carried out to roughening treatment and form matsurface, it is KOH or H that described roughening treatment is used solution 2sO 4.
The preparation method of 11. vertical-type LED chip structures as claimed in claim 10, is characterized in that, after described N electrode, on described matsurface, forms passivation layer, and described passivation layer is SiO 2.
The preparation method of 12. vertical-type LED chip structures as claimed in claim 1, is characterized in that, described N electrode material is Ni/Au, Al/Ti/Pt/Au or Cr/Pt/Au.
13. 1 kinds of vertical-type LED chip structures; adopt and form as the preparation method of the vertical-type LED chip structure as described in any one in claim 1 to 13; it is characterized in that; described structure comprises successively: bonded substrate, metal bonding layer, protective layer, reflector, the low refractive index dielectric layer that is provided with distribution pattern, electrically conducting transparent contact layer, P-GaN layer, quantum well layer, N-GaN layer and N electrode; wherein, described N electrode is connected with described N-GaN layer.
14. vertical-type LED chip structures as claimed in claim 13, it is characterized in that, also comprise matsurface and passivation layer, described matsurface is formed at described N-GaN layer surface, described passivation layer is formed on described matsurface, and described matsurface and passivation layer all expose described N electrode.
CN201410390800.9A 2014-08-08 2014-08-08 Vertical type LED chip structure and manufacturing method thereof Pending CN104134723A (en)

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