CN104062574A - Check Method Of Semiconductor Device And Manufacturing Method For Semiconductor Device Employing Same - Google Patents
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Abstract
本发明的半导体装置的检查方法中，预先测定与检查对象种类相同的半导体装置的端子引线和探针之间的接触电阻，对于具有接触电阻值大于在电特性试验中被视为不会发生误判的通常值的该接触电阻值的半导体装置，预先将为了使该较大的接触电阻值下降到通常值而所需的电能作为基准值而求出，利用与测定所述接触电阻相同的方法，测定作为检查对象的半导体装置的接触电阻，在显示为该接触电阻值大于所述通常值的情况下，在施加作为所述基准值的电能之后，再次测定接触电阻，确认接触电阻成为通常值并进行所需要的电特性试验。
In the inspection method of the semiconductor device of the present invention, the contact resistance between the terminal leads and the probes of the semiconductor device of the same type as the inspection object is measured in advance, and it is considered that no error will occur in the electrical characteristic test for those with a contact resistance value greater than that of the semiconductor device. For the semiconductor device with the contact resistance value of the normal value judged, the electric energy required in order to reduce the large contact resistance value to the normal value is obtained in advance as a reference value, and the method is the same as that for measuring the contact resistance. , measure the contact resistance of the semiconductor device as the inspection object, and when it is shown that the contact resistance value is greater than the normal value, after applying the electric energy as the reference value, measure the contact resistance again, and confirm that the contact resistance has become the normal value And carry out the required electrical characteristic test.
Description
技术领域technical field
本发明涉及有效地进行稳定且精度高的电特性试验的半导体装置的检查方法、以及采用该方法的半导体装置的制造方法。The present invention relates to a method of inspecting a semiconductor device that efficiently performs a stable and highly accurate electrical characteristic test, and a method of manufacturing a semiconductor device using the method.
背景技术Background technique
通常在将制造完成的半导体装置出货前，电特性试验、用于确认外观形状的试验检查工序是必不可少的。例如，在电特性试验中，在使与试验机(检测器)相连接的探针和半导体装置的端子引线相接触的状态下，施加预先确定的规定电压、电流，测定此时的电压·电流的值或者该值随着时间的变化，并与规定的电压·电流基准值进行对照，以判定合格或不合格。Generally, before shipping a manufactured semiconductor device, an electrical characteristic test and a test inspection process for confirming the appearance shape are indispensable. For example, in an electrical characteristic test, a predetermined voltage and current are applied while a probe connected to a testing machine (tester) is in contact with a terminal lead of a semiconductor device, and the voltage and current at that time are measured. The value or the change of this value over time, and compared with the specified voltage and current reference value, to determine whether it is qualified or not.
然而，在半导体装置、特别是电源控制用IC等半导体装置的试验检查中，电特性试验时所施加的电压、电流通常在数伏特或数毫安以下，且测定时间也通常在毫秒以下。在短时间内必须对如此微小的电压·电流进行高精度的测定，但是已知存在如下情况：即，在测定时，会受到因在端子引线表面自然形成的氧化膜等而引起的接触电阻等影响，导致无法得到正确的测定结果，将合格产品误判为不合格产品等，以使电特性检查中测定的稳定性产生问题。However, in the test and inspection of semiconductor devices, especially semiconductor devices such as ICs for power supply control, the voltage and current applied during the electrical characteristic test are usually several volts or several milliamperes or less, and the measurement time is usually less than milliseconds. It is necessary to measure such a small voltage and current with high precision in a short period of time, but it is known that there are cases where contact resistance due to the oxide film etc. naturally formed on the surface of the terminal lead is received during the measurement. Influenced by it, the correct measurement result cannot be obtained, and the qualified product is misjudged as the unqualified product, etc., so that the stability of the measurement in the electrical characteristic inspection will cause problems.
因此，在半导体装置的检查工序中，为了以稳定的状态进行高精度的电特性试验，必须将使形成于半导体装置的端子引线表面的接触电阻变大的氧化膜等除去以减小接触电阻，然后使探针接触来进行试验。为了除去该氧化膜，已知如下的检查方法：利用削、擦、刮、针刺等机械式的方法将局部的氧化膜除去，使探针与基底层金属直接接触以进行电特性试验。Therefore, in the inspection process of a semiconductor device, in order to conduct a high-precision electrical characteristic test in a stable state, it is necessary to remove the oxide film or the like that increases the contact resistance formed on the surface of the terminal lead of the semiconductor device to reduce the contact resistance. The probes are then brought into contact to perform the test. In order to remove this oxide film, the following inspection method is known: using mechanical methods such as chipping, wiping, scraping, and acupuncture to remove the local oxide film, and directly contacting the probe with the base layer metal to conduct an electrical characteristic test.
关于上述现有的检查方法，下面进行稍微详细的说明。作为被检查对象的半导体装置，在其端子引线的位置大多进行焊料接合以被搭载且安装在电气设备中。因此，在其表面施加有由Sn或SnAg合金构成的焊料镀层。然而，在这样的焊料镀层的表面，由于与空气中的氧气发生反应而通常会形成厚度极小、且高电阻的氧化膜。关于形成这样的氧化膜，不仅在具有上述那样的表面被焊料镀敷的端子引线的半导体装置中，而且在具有被镍镀敷的端子引线表面或铝合金端子等的半导体装置中，即使膜质地、膜厚度多少存在差异，都会形成氧化膜。关于具有形成有这样的氧化膜的端子引线的所有半导体装置，虽然不至于使电特性试验变得不稳定，但是会出现以一定的比例(几％左右)被误判的半导体装置。The above-mentioned conventional inspection method will be described in a little detail below. A semiconductor device to be inspected is often solder-bonded at the position of its terminal lead to be mounted and mounted in an electric device. Therefore, a solder plating layer composed of Sn or SnAg alloy is applied on the surface. However, on the surface of such a solder plating layer, an oxide film with an extremely small thickness and high resistance is usually formed due to a reaction with oxygen in the air. Regarding the formation of such an oxide film, not only in a semiconductor device having a terminal lead whose surface is plated with solder as described above, but also in a semiconductor device having a surface of a terminal lead plated with nickel or an aluminum alloy terminal, etc., even if the film quality , How much difference in film thickness, will form an oxide film. For all semiconductor devices having terminal leads formed with such an oxide film, although the electrical characteristic test does not become unstable, semiconductor devices are misjudged at a certain rate (about several percent).
对于上述半导体装置，参照图3、图8、图9对以往的检查装置和检查方法进行详细的说明。首先，在图3的放大剖面图所示的SOP(Small OutlinePackage：小外形封装)8管脚用插座上，利用未图示的搬运装置来搬运半导体装置20(例如SOP8管脚的形状)。该SOP8管脚用插座30是具备上下壳体3、4的专用电特性试验用夹具，该上下壳体3、4具有将半导体装置20的主体部和8管脚的端子引线21固定并收纳在规定位置的托台和空间。而且，在关闭上下壳体3、4时，由8管脚组成的端子引线21分别具有主探针1和辅助探针2，该主探针1设置于下壳体4且从下方与该下壳体4弹性接触，该辅助探针2设置于上壳体3且从上方与该上壳体3弹性接触。在这些上壳体3和下壳体4从上下方向打开的状态下，在下壳体4的规定托台上，设置有进行电特性试验的半导体装置20(例如SOP8管脚)。接着，若闭合插座的上下壳体3、4，则主探针1和辅助探针2从上下方向与半导体装置的端子引线21进行弹性接触。为了确认初始的接触状态(探针与端子引线的接触电阻的大小)，如图9所示，暂时利用切换继电器35将辅助探针2的线路(电布线)从试验机(检测器)的反馈系统感测端子33切换到电源接地端子34。从电源施加端子32流过1～10mA左右的微小电流。确认由此时的电压或电阻的值测定得到的接触电阻Rcon在规定的范围内(例如0.1Ω＜Rcon＜1Ω)(在图8的E1步骤中判定为“YES”)。然后，再次利用切换继电器35来切换辅助探针2一侧的路径，恢复到辅助探针2与反馈系统感测端子33相连接的状态。在E2步骤中，根据所需的电特性试验项目，对在所述E1步骤中被判定为“YES”的半导体装置施加电压、电流，测定此时的电压值/电流值、或者该信号随着时间的变化，通过与规定的基准值进行比较以判定合格/不合格。在所述E1步骤中确认了上述的初始接触电阻Rcon时，因接触电阻大(例如为1Ω以上)且接触状态不好而被判定为“NO”，在此情况下，不进行规定的电特性试验而将其区别为接触不合格产品并排出。大多的情况下，若该接触不合格产品未被认为存在变形、端子引线的弯曲等外形上的异常，则以目测的方式进行观察，将端子引线的表面所附着的异物去除，或削去显著的氧化膜，在此基础上，若在E3步骤中能够再次进行试验(“YES”)，则重新返回E1步骤，再次实施电特性试验。若在E3步骤中为“NO”，则区分为不合格产品(“不合格产品处理”)，并将其排除。反馈系统感测端子、电源接地端子以及稍候叙述的电源施加端子是通常的电子电路试验机所具备的端子的名称。Regarding the semiconductor device described above, a conventional inspection device and inspection method will be described in detail with reference to FIGS. 3 , 8 , and 9 . First, a semiconductor device 20 (for example, SOP 8-pin shape) is transported by an unillustrated transport device on the SOP (Small Outline Package: Small Outline Package) 8-pin socket shown in the enlarged cross-sectional view of FIG. 3 . This SOP 8-pin socket 30 is a jig for a dedicated electrical characteristic test provided with upper and lower housings 3, 4 that fix and accommodate the main body of the semiconductor device 20 and the 8-pin terminal lead 21. Pallets and spaces at specified positions. Moreover, when the upper and lower housings 3, 4 are closed, the terminal leads 21 composed of 8 pins respectively have a main probe 1 and an auxiliary probe 2, and the main probe 1 is arranged on the lower housing 4 and connected to the lower housing 4 from below. The housing 4 is elastically contacted, and the auxiliary probe 2 is disposed on the upper housing 3 and elastically contacts the upper housing 3 from above. In the state where the upper case 3 and the lower case 4 are opened from the vertical direction, a semiconductor device 20 (for example, SOP8 pins) for performing an electrical characteristic test is installed on a predetermined pallet of the lower case 4 . Next, when the upper and lower cases 3 and 4 of the socket are closed, the main probes 1 and the auxiliary probes 2 come into elastic contact with the terminal leads 21 of the semiconductor device from the vertical direction. In order to confirm the initial contact state (the size of the contact resistance between the probe and the terminal lead wire), as shown in FIG. The system sense terminal 33 is switched to the power ground terminal 34 . A small current of about 1 to 10 mA flows from the power supply terminal 32 . It is confirmed that the contact resistance Rcon measured from the current voltage or resistance value is within a predetermined range (for example, 0.1Ω<Rcon<1Ω) (determined as "YES" in step E1 of FIG. 8 ). Then, the switching relay 35 is used to switch the path on the side of the auxiliary probe 2 again, and the state in which the auxiliary probe 2 is connected to the sensing terminal 33 of the feedback system is restored. In the E2 step, according to the required electrical characteristic test items, a voltage and a current are applied to the semiconductor device judged as "YES" in the E1 step, and the voltage value/current value at this time is measured, or the signal is Changes over time, pass/fail are judged by comparison with specified reference values. When the above-mentioned initial contact resistance Rcon is confirmed in the E1 step, it is judged as "NO" because the contact resistance is large (for example, 1Ω or more) and the contact state is not good. In this case, the predetermined electrical characteristics are not performed. Tested to distinguish it from contact with non-conforming product and discharge. In most cases, if the defective contact product is not considered to have abnormalities in appearance such as deformation and bending of the terminal lead, then visually observe it to remove foreign matter attached to the surface of the terminal lead, or to shave off any significant On this basis, if the test can be carried out again in step E3 ("YES"), then return to step E1 again, and conduct the electrical characteristic test again. If it is "NO" in step E3, it is classified as unqualified product ("unqualified product processing") and excluded. Feedback system sense terminals, power supply ground terminals, and power supply application terminals to be described later are the names of terminals provided in general electronic circuit testing machines.
在上述的E1步骤中，关于接触电阻Rcon，将0.1Ω＜Rcon＜1Ω作为基准对接触状态是否合格进行判定(“YES”判定以及“NO”判定)是一个示例，其会随着氧化膜的膜质地、膜厚度、测定环境温度等的不同而发生变化。In the above-mentioned E1 step, regarding the contact resistance Rcon, it is an example to judge whether the contact state is acceptable or not ("YES" judgment and "NO" judgment) based on 0.1Ω<Rcon<1Ω. Varies depending on film texture, film thickness, measurement environment temperature, etc.
作为降低不同的接触电阻的方法，已知有对形成于端子引线的金属皮膜表面、且厚度较薄的氧化膜施加电压电流、以减小接触电阻的方法等。As a method of reducing differential contact resistance, there is known a method of reducing contact resistance by applying a voltage current to a thin oxide film formed on the surface of a metal film of a terminal lead.
关于这样的半导体装置的试验检查方法，已有记载了高效地实施电特性试验、且显著地提高检测的吞吐量的检查方法(专利文献1)。还记载了如下检查方法，通过除去检查用电极表面的绝缘覆膜以使检查用探头和检查用电极实现良好的电接触，由此减小针压，消除对电极所造成的损坏，无需对探头进行清洁，从而提高检测效率(专利文献2)。As for such a test inspection method of a semiconductor device, an inspection method that efficiently conducts an electrical characteristic test and significantly improves the throughput of inspection has been described (Patent Document 1). Also described is an inspection method that removes the insulating film on the surface of the inspection electrode to achieve good electrical contact between the inspection probe and the inspection electrode, thereby reducing needle pressure and eliminating damage to the electrode, without requiring any repairs to the probe. Cleaning is performed to improve detection efficiency (Patent Document 2).
现有技术文献prior art literature
专利文献patent documents
专利文献1：日本专利特开2004－191208号公报(第0006～0007段)Patent Document 1: Japanese Patent Application Laid-Open No. 2004-191208 (paragraphs 0006 to 0007)
专利文献2：日本专利特开2002-139542号公报（第0008～0011段）Patent Document 2: Japanese Patent Laid-Open No. 2002-139542 (paragraphs 0008 to 0011)
发明内容Contents of the invention
发明所要解决的技术问题The technical problem to be solved by the invention
然而，如上所述，利用削去等机械式的处理方法来除去端子引线表面的氧化膜的所有方法都会对半导体装置的端子引线造成损害，或有可能导致新的外观不良。因为对大量的半导体装置进行电特性试验，所以在反复地多次使探针与端子引线相接触的过程中，若由于氧化膜附着到探针前端、或者探针前端的磨损，使得因前端接触而导致对所述氧化膜的破坏不够充分，则必须对探针前端进行清洁或对探针进行更换。而且在测定环境温度超过100℃的高温环境中，会促进氧化，从而在探针或端子引线的表面形成较厚的氧化膜，而且较易使从端子引线上削去的氧化膜附着在探针上。因此，使得探针与端子引线的接触变得不稳定，可能会增加接触不良的发生频率。其结果是，发生所必需的探针清扫间隔变短、或者探针的交换频率增加的问题。另外，会产生如下问题：若接触不良的发生频率增加以使不合格产品的发生数量增多，则接触不良产品如上所述的那样，由于在进行降低接触电阻值的处理之后，再次进行电特性试验，所以使得电特性试验的次数增加，降低了试验效率。However, as described above, any method of removing the oxide film on the surface of the terminal lead by mechanical processing such as chipping may damage the terminal lead of the semiconductor device or cause new appearance defects. Because a large number of semiconductor devices are tested for electrical characteristics, in the process of repeatedly bringing the probes into contact with the terminal leads, if the oxide film adheres to the tip of the probe or the tip of the probe is worn, the tip contact If the damage to the oxide film is insufficient, the front end of the probe must be cleaned or the probe must be replaced. Moreover, in a high-temperature environment where the ambient temperature of the measurement exceeds 100°C, oxidation will be promoted, thereby forming a thicker oxide film on the surface of the probe or terminal lead, and it is easier to make the oxide film peeled off from the terminal lead adhere to the probe. superior. Therefore, the contact between the probe and the terminal lead becomes unstable, possibly increasing the frequency of occurrence of poor contact. As a result, the required probe cleaning interval becomes shorter or the frequency of probe replacement increases. In addition, there will be a problem as follows: if the frequency of occurrence of poor contact increases so that the number of defective products increases, as described above, the poor contact products will be subjected to the electrical characteristic test again after performing the treatment to reduce the contact resistance value. , so the number of electrical characteristic tests is increased and the test efficiency is reduced.
在上述的专利文献1、2中，主要以晶片的试验为对象，除了通常的主探针以外，还需要用于减少接触状态的专用探针。而且，在判定为接触电阻较大的情况下，为了降低接触电阻需要进行如下工序：在使用专用电源向主探针和专用探针之间施加电压的同时，对电流进行测定，在使电压上升的过程中，电阻急剧下降，确认是否流出电流。在利用该工序，确认了电阻急剧下降的情况，且确认了除去氧化膜以减小接触电阻、从而改善通电状态的情况之后，需要进行如下工序：将电源切换成原来的试验用电源，进行规定的电特性试验。上述工序需要复杂的步骤和控制，无法实现高效的试验工序。In the above-mentioned Patent Documents 1 and 2, wafer tests are mainly targeted, and in addition to normal main probes, dedicated probes for reducing the contact state are required. In addition, when it is judged that the contact resistance is high, in order to reduce the contact resistance, it is necessary to perform a process of applying a voltage between the main probe and the dedicated probe using a dedicated power supply, while measuring the current, and increasing the voltage. During the process, the resistance drops sharply, and it is checked whether the current flows out. After using this process to confirm the sharp drop in resistance and confirm the removal of the oxide film to reduce the contact resistance and improve the conduction state, the following process is required: switch the power supply to the original test power supply, and specify electrical characteristic test. The above process requires complicated steps and controls, and an efficient test process cannot be realized.
本发明是鉴于上述说明的问题而设计得到的。本发明的目的在于提供如下的半导体装置的检查方法：降低因探针的表面氧化而引起的清扫频率和更换频率，降低接触不良产品的再次试验频率，能够改善试验效率，从而能够稳定地进行高精度的电特性试验。The present invention was devised in view of the problems described above. The object of the present invention is to provide a semiconductor device inspection method that reduces the frequency of cleaning and replacement due to surface oxidation of probes, reduces the frequency of retesting products with poor contact, improves test efficiency, and enables stable high-speed testing. Accurate electrical characteristic test.
解决技术问题所采用的技术方案Technical solutions adopted to solve technical problems
在权利要求1的半导体装置的检查方法中，使用主探针和辅助探针对具有多个信号端子的半导体装置的电特性进行测定，所述主探针用于在进行所述测定时向所述半导体装置施加电压电流，所述辅助探针用于在进行所述测定时对施加到所述半导体装置的电压电流进行测定，其特征在于，包括：第一工序，在所述第一工序中，使所述主探针和所述辅助探针与所述半导体装置的一个所述信号端子相接触，且对一个所述信号端子与所述主探针及所述辅助探针之间的接触电阻进行测定，将测定得到的该接触电阻与第一基准值阈值相比较，当测定得到的所述接触电阻在所述第一基准值阈值以内时，前进到第二工序，当测定得到的所述接触电阻不在所述第一基准值阈值以内时，前进到第三工序；第二工序，在所述第二工序中，对所述半导体装置的电特性进行测定；第三工序，在所述第三工序中，对一个所述信号端子与所述主探针及所述辅助探针之间的接触电阻进行测定，将测定得到的该接触电阻与第二基准值阈值相比较，当所述第三工序中测定得到的接触电阻在所述第二基准值阈值以内时，前进到第四工序；第四工序，在所述第四工序中，根据在所述第一工序中测定得到的接触电阻，确定经由所述主探针和所述辅助探针向一个所述信号端子施加的基准电能，前进到第五工序；第五工序，在所述第五工序中，经由所述主探针和所述辅助探针将由所述第四工序所确定的基准电能提供给一个所述信号端子；以及第六工序，在所述第六工序中，对一个所述信号端子与所述主探针及所述辅助探针之间的接触电阻进行测定，将测定得到的该接触电阻与第一基准值阈值相比较，当测定得到的所述接触电阻在所述第一基准值阈值以内时，前进到所述第二工序。In the method for inspecting a semiconductor device according to claim 1, the electrical characteristics of a semiconductor device having a plurality of signal terminals are measured using a main probe and an auxiliary probe, the main probe is used to provide the signal to all the signal terminals when performing the measurement. The semiconductor device applies voltage and current, and the auxiliary probe is used to measure the voltage and current applied to the semiconductor device when performing the measurement, and it is characterized in that it includes: a first step, in the first step , bringing the main probe and the auxiliary probe into contact with one of the signal terminals of the semiconductor device, and contacting one of the signal terminals with the main probe and the auxiliary probe The resistance is measured, and the measured contact resistance is compared with the first reference value threshold. When the measured contact resistance is within the first reference value threshold, proceed to the second process. When the contact resistance is not within the first reference value threshold, proceed to the third process; the second process, in the second process, measure the electrical characteristics of the semiconductor device; the third process, in the In the third step, the contact resistance between one of the signal terminals and the main probe and the auxiliary probe is measured, and the measured contact resistance is compared with a second reference value threshold, and when the When the contact resistance measured in the third step is within the threshold value of the second reference value, proceed to the fourth step; in the fourth step, according to the contact resistance measured in the first step, resistance, determine the reference electric energy applied to one of the signal terminals via the main probe and the auxiliary probe, proceed to the fifth process; the fifth process, in the fifth process, via the main probe and the auxiliary probe supplying the reference electric energy determined by the fourth process to one of the signal terminals; and a sixth process, in which, one of the signal terminals and the main probe and the contact resistance between the auxiliary probes, and compare the measured contact resistance with the first reference value threshold, and when the measured contact resistance is within the first reference value threshold, proceed to the second process.
在权利要求2的半导体装置的检查方法中，在上述权利要求1的发明的基础上，所述第一基准值阈值为0.1Ω＜Rcon＜1Ω，所述第二基准值阈值为1Ω≤Rcon＜10Ω。In the semiconductor device inspection method of claim 2, in addition to the invention of claim 1 above, the first reference value threshold is 0.1Ω<Rcon<1Ω, and the second reference value threshold is 1Ω≤Rcon< 10Ω.
在权利要求3的半导体装置的检查方法中，所述电能为0.01瓦特·秒至0.05瓦特·秒。In the inspection method of a semiconductor device according to claim 3, the electric energy is 0.01 watt·second to 0.05 watt·second.
在权利要求4的半导体装置的检查方法中，所述电能是功率与施加该功率的时间之积，施加所述功率的时间在1ms至10ms的范围内。In the method for inspecting a semiconductor device according to claim 4, the electric energy is a product of power and a time for applying the power, and the time for applying the power is in a range of 1 ms to 10 ms.
在权利要求5的半导体装置的检查方法中，所述电特性试验的环境温度是最高为150℃的高温气氛，具有在该高温气氛下容易在半导体装置的端子引线的表面形成氧化膜的金属材料。In the inspection method of a semiconductor device according to claim 5, the ambient temperature of the electrical characteristic test is a high-temperature atmosphere of up to 150° C., and there is a metal material that easily forms an oxide film on the surface of the terminal lead of the semiconductor device in the high-temperature atmosphere. .
在权利要求6的半导体装置的检查方法中，在所述第五工序中，关于施加到一个所述信号端子的基准电能，通过使其电流为定值且调整其施加时间，由此来满足所述基准值的电能以实现接触电阻的降低。In the method for inspecting a semiconductor device according to claim 6 , in the fifth step, regarding the reference electric energy applied to one of the signal terminals, the current is made a constant value and the application time is adjusted, thereby satisfying the requirements. The electric energy of the above-mentioned reference value is used to realize the reduction of the contact resistance.
在权利要求7的半导体装置的检查方法中，在所述第五工序中，关于施加到一个所述信号端子的基准电能，通过使其施加时间为定值且调整其电流值，由此来满足所述基准值的电能以实现接触电阻的降低。In the inspection method of a semiconductor device according to claim 7, in the fifth step, the reference electric energy applied to one of the signal terminals is satisfied by making the application time constant and adjusting the current value thereof. The electric energy of the reference value is used to reduce the contact resistance.
在权利要求8的半导体装置的检查方法中，在该半导体装置的检查装置中，使用主探针和辅助探针对具有多个信号端子的半导体装置的电特性进行测定，所述主探针用于在进行所述测定时向所述半导体装置施加电压电流，所述辅助探针用于在进行所述测定时对施加到所述半导体装置的电压电流进行测定，使用使所述主探针和所述辅助探针与所述半导体装置的一个所述信号端子相接触、且能够对一个所述信号端子与所述主探针和所述辅助探针之间的接触电阻进行测定的装置，根据预先测定得到的多个所述接触电阻值的分布，以出现频率较高的所述接触电阻值为目标，降低所述接触电阻值以求出满足0.1Ω＜Rcon＜1Ω的电能，使该电能与所述基准电能相对应。In the inspection method of a semiconductor device according to claim 8, in the inspection device of the semiconductor device, the electrical characteristics of a semiconductor device having a plurality of signal terminals are measured using a main probe and an auxiliary probe, the main probe is used for When the voltage and current are applied to the semiconductor device during the measurement, the auxiliary probe is used to measure the voltage and current applied to the semiconductor device when the measurement is performed, using the main probe and The auxiliary probe is in contact with one of the signal terminals of the semiconductor device and is capable of measuring a contact resistance between one of the signal terminals and the main probe and the auxiliary probe, according to The distribution of a plurality of contact resistance values obtained in advance is measured, and the contact resistance value with a higher frequency of occurrence is targeted, and the contact resistance value is reduced to obtain an electric energy satisfying 0.1Ω<Rcon<1Ω, so that the electric energy Corresponding to the reference electric energy.
在权利要求9的半导体装置的制造方法中，使用上述半导体装置的检测方法。In the method of manufacturing a semiconductor device according to claim 9 , the method for inspecting a semiconductor device described above is used.
发明效果Invention effect
根据本发明能够提供如下的半导体装置的检查方法，降低因探针的表面氧化而引起的清扫频率和更换频率，降低接触不良产品的再次试验频率，能够改善试验效率，从而能够稳定地进行高精度的电特性试验。According to the present invention, it is possible to provide a semiconductor device inspection method that reduces the frequency of cleaning and replacement due to surface oxidation of probes, reduces the frequency of retesting products with poor contact, improves test efficiency, and enables stable and high-precision testing. electrical characteristic test.
附图说明Description of drawings
图1是用于说明本发明的半导体装置的检查方法的步骤工序图。FIG. 1 is a step-by-step process diagram for explaining a method of inspecting a semiconductor device according to the present invention.
图2是用于说明本发明的半导体装置的检查方法的试验机(检测器)、探针和半导体装置的端子引线之间的电连接布线的简要图。2 is a schematic diagram of electrical connection wiring between a testing machine (tester), probes, and terminal leads of a semiconductor device for explaining the method of inspecting a semiconductor device according to the present invention.
图3是将半导体装置安装到半导体装置(SOP8管脚)的电特性试验用插座中的状态的放大剖面图。3 is an enlarged cross-sectional view of a state in which the semiconductor device is mounted in a socket for an electrical characteristic test of the semiconductor device (SOP8 pins).
图4是本发明所涉及的电特性试验用插座的探针(触点探头)的接触电阻和负载之间的关系图。4 is a graph showing the relationship between the contact resistance and the load of the probes (contact probes) of the electrical characteristic test socket according to the present invention.
图5是满足使本发明所涉及的接触电阻降低的电能的施加时间和施加电流之间的关系图。FIG. 5 is a graph showing the relationship between the application time and the applied current of the electric energy satisfying the reduction of the contact resistance according to the present invention.
图6是在本发明所涉及的接触电阻降低处理的前后、在150℃的测定环境下接触电阻分布的比较图。6 is a comparison diagram of contact resistance distributions in a measurement environment of 150° C. before and after contact resistance reduction treatment according to the present invention.
图7是本发明所涉及的半导体装置的端子引线的接触电阻分布图的一个示例。7 is an example of a contact resistance distribution diagram of terminal leads of the semiconductor device according to the present invention.
图8是用于说明现有的半导体装置的检查方法的步骤工序图。FIG. 8 is a step-by-step diagram for explaining a conventional semiconductor device inspection method.
图9是用于说明现有的半导体装置的检查方法的试验机(检测器)、探针和半导体装置的端子引线之间的电连接布线的简要图。9 is a schematic diagram of electrical connection wiring between a testing machine (tester), probes, and terminal leads of a semiconductor device for explaining a conventional semiconductor device inspection method.
具体实施方式Detailed ways
下面，参照附图对本发明的半导体装置的检查方法所涉及的实施例进行详细的说明。另外，在下述实施例的说明及附图中，对相同的结构标注相同的符号，并省略重复说明。另外，只要不超出本发明的主旨，本发明并不仅限于下面所说明的实施例所记载的内容。Hereinafter, an embodiment of the method for inspecting a semiconductor device according to the present invention will be described in detail with reference to the drawings. In addition, in the description of the following embodiments and the drawings, the same reference numerals are attached to the same structures, and repeated descriptions are omitted. In addition, the present invention is not limited to the contents described in the examples described below unless the gist of the present invention is exceeded.
在说明本发明的半导体装置的检查方法之前，首先对如图2所示的将试验机(检测器)和半导体装置的端子引线连接起来的电连接布线简要图中所示的、作为检查对象的半导体装置的一个示例的SOP8管脚的半导体装置20进行说明。该半导体装置20具有通过焊料糊料接合到铜合金的芯片垫部(金属基板)上的贴片型半导体元器件(下面成为半导体芯片)。在与该芯片垫部分离且保持电绝缘状态的位置上，在左右两边分别接合有各4个、共计8个金属制的端子引线21的一端。在该端子引线21和所述芯片垫部上的半导体芯片的表面电极之间，利用以Al为主要成分的导线相连以进行电连接。而且，具有由所述半导体芯片、芯片垫部、导线和端子引线21等构成的组装结构的半导体装置从整体上看具有：在为了与外部连接而使端子引线21(8个)的其他端子分别从侧面各引出4个到外部的形状的情况下、利用环氧树脂的模塑成形进行密封而得到的结构。在将所述端子引线21安装到电路装置时，考虑到利用焊料接合的组合安装，利用对于焊料润湿性较好的金属膜镀敷来覆盖。Before explaining the inspection method of the semiconductor device of the present invention, first, as shown in FIG. An SOP8-pin semiconductor device 20 as an example of a semiconductor device will be described. This semiconductor device 20 has a chip type semiconductor element (hereinafter referred to as a semiconductor chip) bonded to a die pad portion (metal substrate) of a copper alloy by solder paste. At positions separated from the die pad portion and kept electrically insulated, one end of four metal terminal leads 21 in total are bonded to each of the left and right sides. Between the terminal lead 21 and the surface electrode of the semiconductor chip on the chip pad portion, a wire mainly composed of Al is connected to be electrically connected. Moreover, the semiconductor device having the assembly structure composed of the semiconductor chip, the chip pad, the wires, the terminal leads 21, etc. as a whole has: the other terminals of the terminal leads 21 (8 pieces) are connected to the outside respectively. In the case of a shape that leads to the outside four from each side, it is a structure obtained by sealing with epoxy resin molding. When the terminal lead 21 is mounted on the circuit device, it is covered with metal film plating with good solder wettability in consideration of combined mounting by solder bonding.
在试验检查工序中对半导体装置20的电特性进行试验测定时，使用具有如下结构的插座30：如图2所示，将布线的一端连接到由测定电特性的电路装置等所构成的试验机31(检测器)，而将布线的另一端连接到与每个如图3所示的特定的半导体装置不同的形状相吻合的专用的托台部的探针。该插座30如图3所示具有探针(主探针1、辅助探针2)，该探针用于与安装在由上述壳体3、4构成的托台上的半导体装置20的外部端子引线21相接触，以进行电试验。该专用插座30具有用于在插座内的半导体装置的托台上、以适当的压力与试验机一侧的探针弹性接触的结构，其中，该试验机一侧的探针与从半导体装置向外部引出的端子引线相接触。这样的专用插座具有主探针1、辅助探针2，该主探针1、辅助探针2例如是悬臂方式的探针或者是触点探头，悬臂方式的探针是在收纳于托台的规定位置上的半导体装置20的多个(例如8个)端子引线21上，以从端子引线21的上下方向以适当的压力进行弹性接触的方式进行组装的悬臂式的悬臂方式探针，触点探头是在收纳于托台的规定位置上的半导体装置20的多个端子引线21上，以在垂直方向上移动的方式进行接触的触点探头。也就是说，这些悬臂方式的探针、触点探头的主探针1和辅助探针2各自的一端分别于半导体装置的端子引线21相接触，其另一端与电特性试验机相连接。存在与一个端子引线21相接触的探针为一个的情况，也有如图3所示的使用触点探头的插座30的放大剖面图那样，大多情况下使由主探针1和辅助探针2组成的一对探针与一个端子引线21相接触以进行所需的电特性试验测定的情况。When testing and measuring the electrical characteristics of the semiconductor device 20 in the test inspection process, a socket 30 having a structure as shown in FIG. 31 (detector), and the other end of the wiring is connected to a probe of a dedicated pad that matches the shape of each specific semiconductor device as shown in FIG. 3 . This socket 30 has probes (main probe 1, auxiliary probe 2) as shown in FIG. The leads 21 are in contact for electrical testing. This dedicated socket 30 has a structure for elastically contacting the probes on the side of the testing machine with an appropriate pressure on the pallet of the semiconductor device in the socket. The externally drawn terminal leads are in contact. Such a dedicated socket has a main probe 1 and an auxiliary probe 2. The main probe 1 and the auxiliary probe 2 are, for example, cantilever probes or contact probes. The cantilever probes are stored in the holder. A cantilever-type cantilever-type probe, contact The probe is a contact probe that moves in the vertical direction and makes contact with a plurality of terminal leads 21 of the semiconductor device 20 housed at a predetermined position on the pallet. That is, the main probe 1 and the auxiliary probe 2 of these cantilever type probes and contact probes each have one end in contact with the terminal lead 21 of the semiconductor device, and the other end is connected to the electrical characteristic testing machine. There may be only one probe contacting with one terminal lead wire 21, and as shown in the enlarged cross-sectional view of the socket 30 using the contact probe shown in FIG. A case in which a pair of probes is formed to contact a terminal lead 21 for the desired electrical characteristic test determination.
具体而言，主探针1组装到插座30的下壳体4中，辅助探针2组装到该插座的上壳体3中。通过使上壳体3和下壳体4分别上下移动，从而能够使该插座30呈打开状态或闭合状态。而且，该插座30在呈打开状态时，使半导体装置20进出，在该插座30呈闭合状态时，使主探针1的一端和辅助探针2的一端从上下两个方向分别与半导体装置20的端子引线21相接触，并且利用与主探针1的另一端和辅助探针2的另一端相连接的电机特性试验机31(检测器)来测定电特性。与大小及端子引线数量不同的各种半导体装置的形状相吻合，准备了形状不同的各种插座，这些插座具有配置成不同数量的主探针和辅助探针。向主探针1施加所需的电压电流，辅助探针2用于对施加到主探针1的电压、电流进行测定以使其维持稳定。Specifically, the main probe 1 is assembled into the lower case 4 of the socket 30 and the auxiliary probe 2 is assembled into the upper case 3 of the socket. By moving the upper case 3 and the lower case 4 up and down, the socket 30 can be brought into an open state or a closed state. Moreover, when the socket 30 is in an open state, the semiconductor device 20 is taken in and out; The terminal leads 21 are in contact with each other, and the electrical characteristics are measured with a motor characteristic tester 31 (detector) connected to the other end of the main probe 1 and the other end of the auxiliary probe 2 . In accordance with the shapes of various semiconductor devices differing in size and number of terminal leads, various sockets having different shapes and having main probes and auxiliary probes arranged in different numbers are prepared. The required voltage and current are applied to the main probe 1, and the auxiliary probe 2 is used to measure the voltage and current applied to the main probe 1 to keep it stable.
[实施例1][Example 1]
作为本发明的半导体装置的检查方法的权利要求1至权利要求4所涉及的发明的实施例，参照图1对典型的检测工序的步骤进行说明。首先，利用图2、图3，对本发明的半导体装置的检查方法所需的夹具以及电布线的简要结构进行说明。在下面的说明中，对于半导体装置20，以被称为SOP(SmallOut line Package：小尺寸封装)的封装形状为代表进行了举例，但并非必须是这样的形状，能够应用于各种形状的半导体装置。当然只要改变了半导体装置的形状，就要改变插座的形状以进行测定。As an embodiment of the invention according to claims 1 to 4 of the semiconductor device inspection method of the present invention, steps of a typical inspection process will be described with reference to FIG. 1 . First, a schematic configuration of a jig and electrical wiring necessary for the semiconductor device inspection method of the present invention will be described with reference to FIGS. 2 and 3 . In the following description, the semiconductor device 20 is exemplified by a package shape called SOP (Small Out line Package: Small Outline Package), but it does not necessarily have to be such a shape, and it can be applied to semiconductor devices of various shapes. device. Of course, as long as the shape of the semiconductor device is changed, the shape of the socket must be changed for measurement.
利用例如被称为操纵器的搬运装置(未图示)，将作为对象的半导体装置20搬运到图3所示的半导体装置20的专用插座30，并收纳于呈开口状态的专用插座30的规定的测定位置。图3表示将半导体装置20收纳于专用插座并呈关闭上下壳体的状态的要部放大剖面图。在专用插座30的上述测定位置设置有上壳体3、组装于该上壳体3的辅助探针2、下壳体4、以及组装于该下壳体4的主探针1。在将专用插座30的上壳体3和下壳体4关闭时，各个主探针1和辅助探针2从上下方向分别夹住置于所述测定位置的半导体装置20的多个端子引线21，并分别以适当的载荷进行弹性接触。另外，设置定位用槽或突起，以使得稳定地将半导体装置安装在上壳体3和下壳体4上。在图3中，示出了利用以上下相对的方式进行配置的主探针1和辅助探针2、夹住半导体装置的端子引线21以进行弹性接触的状态。The provision of transporting the target semiconductor device 20 to the dedicated socket 30 of the semiconductor device 20 shown in FIG. the measurement location. FIG. 3 is an enlarged cross-sectional view of main parts in a state where the semiconductor device 20 is housed in a dedicated socket and the upper and lower cases are closed. The upper case 3 , the auxiliary probe 2 assembled in the upper case 3 , the lower case 4 , and the main probe 1 assembled in the lower case 4 are provided at the measurement position of the dedicated socket 30 . When the upper case 3 and the lower case 4 of the dedicated socket 30 are closed, the main probes 1 and the auxiliary probes 2 respectively clamp the plurality of terminal leads 21 of the semiconductor device 20 placed at the measurement position from the upper and lower directions. , and make elastic contact with appropriate loads respectively. In addition, grooves or protrusions for positioning are provided so that the semiconductor device can be stably mounted on the upper case 3 and the lower case 4 . In FIG. 3 , a state in which the terminal leads 21 of the semiconductor device are pinched and elastically contacted is shown by the main probes 1 and the auxiliary probes 2 arranged so as to face each other up and down.
在图3所示的主探针1和辅助探针2中，为了具有多个尖锐的前端且具有良好的电接触，采用表面进行了Au镀敷的、被称为触点探头的结构。该触点探头的前端被弹簧按压，根据按压其前端而收缩的长度(收缩量)来产生载荷，用该载荷将前端按压在端子引线21的表面。如在图4中所示出的、实际测量接触电阻和触点探头的载荷之间的关系后得到的结果，将产生该载荷的收缩量设定成如下长度，以使接触载荷大约为0.1～0.3N、且能稳定地得到良好的接触电阻(0.1Ω左右)。关于该接触载荷，例如若将作为目标的中心接触载荷设为0.2N，则即使具有触点探头的加压偏差，也能够将接触载荷限定在大概0.1～0.3N的范围内。然后，在图1所示的步骤中，前进到电特性试验工序。In the main probe 1 and the auxiliary probe 2 shown in FIG. 3 , in order to have a plurality of sharp tips and to have a good electrical contact, the surface is plated with Au, which is called a contact probe. The tip of the contact probe is pressed by a spring, and a load is generated according to the contracted length (contraction amount) of the tip when the tip is pressed, and the tip is pressed against the surface of the terminal lead 21 by the load. As a result of actually measuring the relationship between the contact resistance and the load of the contact probe as shown in Fig. 4, the amount of shrinkage that generates the load is set to a length such that the contact load is approximately 0.1 to 0.3N, and can stably obtain good contact resistance (about 0.1Ω). Regarding the contact load, for example, if the target center contact load is set to 0.2N, the contact load can be limited within a range of approximately 0.1 to 0.3N even if there is a pressurization variation of the contact probe. Then, in the procedure shown in FIG. 1 , it proceeds to the electrical characteristic test step.
若开始电特性试验工序，则首先执行F1步骤。在F1步骤中，对安装于上述专用插座30中的半导体装置20的端子引线21和将终端与试验机(检测器)相连接的主探针1及辅助探针2之间的接触状态进行确认，即对是否存在因形成于端子引线21的表面的氧化膜等而引起的接触电阻进行确认。为此，对于图2所示的探针和试验机31(检测器)之间的连接线，使切换继电器35工作，使来自辅助探针2的布线与原本的反馈系统感测端子33路径分离，且使其与电源接地34相连接。与此同时，使从电源施加端子32至主探针1的布线路径从中途开始分支，同样地利用切换继电器35，使来自主探针1的路径与反馈系统感测端子33相连接。When the electrical characteristic test process is started, step F1 is executed first. In step F1, the contact state between the terminal leads 21 of the semiconductor device 20 mounted in the above-mentioned dedicated socket 30 and the main probe 1 and auxiliary probe 2 that connect the terminal to the testing machine (tester) is confirmed. , that is, whether there is contact resistance due to an oxide film or the like formed on the surface of the terminal lead 21 was confirmed. For this reason, for the connection line between the probe and the testing machine 31 (detector) shown in FIG. , and connect it to the power ground 34 . At the same time, the wiring path from the power supply terminal 32 to the main probe 1 is branched halfway, and the switching relay 35 is used to similarly connect the path from the main probe 1 to the feedback system sensing terminal 33 .
如上述示例所示，在使用了触点探头(主探针1、辅助探针2)的、且没有因氧化膜等而产生的接触电阻的理想的接触中，如上述图4所示的那样，若在一个接触位置上接触载荷为0.2N，则作为电阻值(接触电阻值)显示为0.12Ω～0.15Ω左右。在实施例中所使用的插座30中，由于主探针1和辅助探针2变为2个位置上的接触，因此在所预想的没有氧化膜的状态下使接触电阻变为2倍的0.24Ω～0.30Ω左右。此处，存在其它接触点包括例如探头侧的接触电阻等而变为0.5Ω左右的情况，但是即使再大也很少会超过1Ω。为了尽可能使端子引线以外的接触电阻不成为问题，优选使用经Au镀敷等后变得不易氧化的表面来作为探头表面。As shown in the above example, in the ideal contact using the contact probe (main probe 1, auxiliary probe 2) and without contact resistance due to oxide film, etc., as shown in Fig. 4 above , if the contact load is 0.2N at one contact position, it is displayed as a resistance value (contact resistance value) of about 0.12Ω to 0.15Ω. In the socket 30 used in the example, since the main probe 1 and the auxiliary probe 2 are in contact at two positions, the contact resistance is doubled to 0.24 in the expected state where there is no oxide film. Ω～0.30Ω or so. Here, there are cases where other contact points include, for example, the contact resistance on the probe side and the like becomes about 0.5Ω, but even if it is larger, it rarely exceeds 1Ω. In order to minimize the problem of contact resistance other than the terminal leads, it is preferable to use a surface that is not easily oxidized by Au plating or the like as the probe surface.
然后，由电源施加端子32施加1mA至10mA左右的一定微小电流，根据电源施加端子32和接地端子34之间所产生的电位差，求出主探针1、辅助探针2和端子引线21之间的接触电阻。在该示例中，将电流值设为10mA的恒定电流，在该状态下，测定主探针和辅助探针之间所产生的电压以求出接触电阻Rcon。Then, apply a small current of about 1 mA to 10 mA from the power supply terminal 32, and calculate the difference between the main probe 1, the auxiliary probe 2, and the terminal lead 21 based on the potential difference generated between the power supply terminal 32 and the ground terminal 34. contact resistance between them. In this example, the current value was set to a constant current of 10 mA, and in this state, the voltage generated between the main probe and the auxiliary probe was measured to obtain the contact resistance Rcon.
此时，根据表示试验步骤的图1，当接触电阻Rcon在F1步骤中满足通常的接触电阻、即0.1Ω<Rcon<1Ω(第一基准阈值)时(F1步骤中“是”的情况)，前进到F2步骤的通常的电特性试验步骤，进行半导体装置的电特性试验之后结束试验。当接触电阻Rcon在F1步骤中不满足0.1Ω<Rcon<1Ω时(F1步骤中“否”的情况)，接着前进到F3步骤。以上为在F1步骤中进行的处理。在F3步骤中，在上述接触电阻Rcon在0.1Ω以下的情况下(F3步骤中“否”的情况)，由于端子引线21可能因预想外的理由而处于短路或者异常的低电阻状态，因此前进至F7的接触不良处理步骤。而且，即使在F3步骤中接触电阻Rcon为10Ω以上的情况下(F3步骤中“否”的情况)，引线端子21可能因未接触或者因异物而发生绝缘或处于异常的高电阻状态，因此与上述情况相同地，前进至F7的接触不良处理步骤。当接触电阻在F3步骤中满足1Ω≤Rcon10＜10Ω(第二基准阈值)时(F3步骤中“是”的情况)，考虑到接触电阻可能会因端子引线21表面的氧化膜等微妙的影响而变大，因此为了尝试改善接触状态(降低接触电阻)，前进至F4步骤。At this time, according to FIG. 1 showing the test procedure, when the contact resistance Rcon satisfies the usual contact resistance in the F1 step, that is, 0.1Ω<Rcon<1Ω (the first reference threshold) (in the case of "Yes" in the F1 step), Proceed to the normal electrical characteristic test step of step F2, and end the test after performing the electrical characteristic test of the semiconductor device. When the contact resistance Rcon does not satisfy 0.1Ω<Rcon<1Ω in the step F1 (the case of "No" in the step F1), then proceed to the step F3. The above is the processing performed in the F1 step. In step F3, if the above-mentioned contact resistance Rcon is 0.1Ω or less (in the case of "No" in step F3), since the terminal lead 21 may be short-circuited or abnormally low-resistance due to an unexpected reason, proceed. Go to the poor contact processing step of F7. Moreover, even if the contact resistance Rcon is 10Ω or more in the step F3 (in the case of "No" in the step F3), the lead terminal 21 may be insulated or abnormally high-resistance due to no contact or a foreign object, so In the same manner as above, the process proceeds to the poor contact processing step of F7. When the contact resistance satisfies 1Ω≦Rcon10<10Ω (the second reference threshold) in the F3 step (in the case of "yes" in the F3 step), it is considered that the contact resistance may be affected by subtle effects such as the oxide film on the surface of the terminal lead 21. becomes larger, so in order to try to improve the contact state (reduce the contact resistance), proceed to step F4.
F4步骤是确定对接触电阻进行降低的条件、并前进至之后的F5步骤的步骤。在之后的F5步骤中，对外部端子引线21和主探针1之间的接触电阻、以及外部端子引线21和辅助探针2之间的接触电阻进行降低处理。这样对接触电阻进行降低的处理如图3所示，在利用主探针1和辅助探针2夹住半导体装置的端子引线21以进行弹性接触的状态下，通过在主探针1和辅助探针2之间流过电流，从而在主探针1和外部端子引线21的接触部分、以及辅助探针2和外部端子引线21的接触部分，施加规定的电能。通过施加这样的电能，能够降低形成于外部端子引线21表面的氧化膜对探针(主探针1及辅助探针2)和外部端子引线21之间的接触电阻所产生的影响，能够降低探针(主探针1及辅助探针2)和外部端子引线21之间的接触电阻。因此，在F4步骤中，根据在F1步骤中所测定的接触电阻值和预先求出的、用于降低该接触电阻所需的电能，来确定为了产生电能而施加的电流和施加的时间。Step F4 is a step of determining the conditions for reducing the contact resistance, and proceeding to the next step F5. In the subsequent step F5 , the contact resistance between the external terminal lead 21 and the main probe 1 , and the contact resistance between the external terminal lead 21 and the auxiliary probe 2 are reduced. The process of reducing the contact resistance in this way is as shown in FIG. By passing a current between the needles 2 , predetermined electric energy is applied to the contact portion between the main probe 1 and the external terminal lead 21 and the contact portion between the auxiliary probe 2 and the external terminal lead 21 . By applying such electric energy, it is possible to reduce the influence of the oxide film formed on the surface of the external terminal lead 21 on the contact resistance between the probes (main probe 1 and auxiliary probe 2 ) and the external terminal lead 21, and it is possible to reduce the contact resistance of the probe. The contact resistance between the needles (main probe 1 and auxiliary probe 2) and the external terminal lead 21. Therefore, in step F4, the current applied to generate electric energy and the application time are determined based on the contact resistance value measured in step F1 and the electric energy required to reduce the contact resistance obtained in advance.
此处，对用于确定尝试改善F4步骤中的接触状态的条件的确认试验进行说明。也就是说，图5示出了如下的一个示例，对半导体装置20的端子引线21的表面进行SnAg合金镀敷，在对探针使用触点探头的条件下进行上述确认试验。在该确认试验中可知：在所限定的施加时间的范围内，通过施加满足某等级的电能的电流，从而改善接触电阻。下面对该确认试验进行详细的说明。Here, a confirmation test for determining the conditions for trying to improve the contact state in the step F4 will be described. That is, FIG. 5 shows an example in which the surface of the terminal lead 21 of the semiconductor device 20 is plated with a SnAg alloy, and the above-mentioned confirmation test is performed under the condition that a contact probe is used as the probe. In this confirmation test, it was found that contact resistance is improved by applying a current satisfying a certain level of electric energy within a limited application time range. The confirmation test will be described in detail below.
结构如下：在上述所说明的半导体装置(SOP8管脚)上，使用理光公司制造的触点探头进行接触，该触点探头的前端形状为王冠形，并且对其实施过Au镀敷，且其直径为0.26mm和0.31mm，另外，将测定环境设定为室温18～25℃，接触载荷为0.2N，求出接触电阻时的电流值为0.1mA。The structure is as follows: The above-described semiconductor device (SOP8 pin) is contacted using a contact probe manufactured by Ricoh Corporation. The diameters are 0.26 mm and 0.31 mm, and the measurement environment is set at room temperature 18 to 25° C., the contact load is 0.2 N, and the current value at the time of obtaining the contact resistance is 0.1 mA.
电流I、接触电阻Rcon、施加时间t、电能W·t的关系如下述的公式(1)所示。求出用于改善接触电阻的电能W·t的大小的一个示例，在满足所求出的电能W·t的范围内，对于在电压固定的情况下电流与施加时间之间的关系，在图5中示出实测值和模拟值。实测到的值(△标记)和以公式(1)为基础的数值计算值(×标记)的结果大致是一致的。在图5中，可知：使施加电流在1.0A至4.0A的范围内，实测到接触电阻Rcon得到改善。若将该施加电流的范围设为施加时间，则分别对应于10ms至1ms。The relationship between the current I, the contact resistance Rcon, the application time t, and the electric energy W·t is shown in the following formula (1). An example of obtaining the magnitude of the electric energy W·t for improving the contact resistance, within the range that satisfies the obtained electric energy W·t, for the relationship between the current and the application time when the voltage is fixed, in Fig. 5 shows actual measured values and simulated values. The results of the measured value (△ mark) and the numerically calculated value (× mark) based on the formula (1) are almost consistent. In FIG. 5 , it can be seen that when the applied current is in the range of 1.0A to 4.0A, the measured contact resistance Rcon is improved. If the range of the applied current is defined as the application time, it corresponds to 10 ms to 1 ms, respectively.
若设电能＝功率×时间＝W·t，接触电阻为Rcon，电流为I，施加时间为t，则满足下述数学式。Assuming that electric energy=power×time=W·t, the contact resistance is Rcon, the current is I, and the application time is t, the following mathematical formula is satisfied.
<数学式><mathematical formula>
Ｗ·ｔ＝Ｒｃｏｎ×Ｉ2×ｔ···（1）W·t=Rcon×I 2 ×t···(1)
Ｉ＝√（Ｗ·ｔ／（Ｒｃｏｎ×ｔ））···（2）I=√(W·t/(Rcon×t))···(2)
ｔ＝（Ｗ·ｔ／（Ｒｃｏｎ×Ｉ2））···（3）t=(W·t/(Rcon×I 2 ))···(3)
在表示该确认试验结构的图5中，该公式(1)关系成立的施加时间t的范围越短，试验所花费的时间越短，效率较高，因此即使在1ms至10ms的施加时间t的范围内，优选尽量短的施加时间。而且，在该施加时间范围内，从所求出的电流中，选择满足对接触电阻Rcon进行改善的电能W·t的条件的电流，但是在不超过由试验机(检测器)所决定的最大容许电流容量的范围内，决定该电流。In Fig. 5, which shows the configuration of the confirmation test, the shorter the range of application time t in which the relationship of the formula (1) holds, the shorter the time spent in the test and the higher the efficiency. Within the range, the application time is preferably as short as possible. Then, within the application time range, from among the obtained currents, select a current that satisfies the condition of electric energy W·t for improving the contact resistance Rcon, but does not exceed the maximum value determined by the testing machine (detector). The current is determined within the range of the allowable current capacity.
改善接触电阻的电能的大小大概在0.01瓦特·秒以上，实际上优选在0.01瓦特·秒至0.05瓦特·秒左右的范围内。在将改善该接触电阻的电能的大小设为例如0.01瓦特·秒的情况下，当接触电阻为1Ω时，在施加时间为10ms的情况下能够得到1A的恒定电流。若为上述范围的电能，则即使不提供恒定电流也可，也可是例如作为恒定电压流过电流并提供规定的电能的方式。The magnitude of the electric energy for improving the contact resistance is about 0.01 watt·s or more, and actually preferably in the range of about 0.01 watt·s to 0.05 watt·s. When the magnitude of the electric energy for improving the contact resistance is set at, for example, 0.01 watt·s, when the contact resistance is 1Ω, a constant current of 1 A can be obtained for an application time of 10 ms. As long as the electric energy is in the above-mentioned range, it is not necessary to supply a constant current, but, for example, a system may be adopted in which a current is passed as a constant voltage to supply predetermined electric energy.
当在F5步骤中力图改善接触电阻之后，前进至F6步骤。在F6步骤中，再次从电源施加端子32施加规定的微小电流，测定在电源施加端子和接地之间由主探针1所生成的电压，根据电流和电压值再次获得接触电阻。在该实施例中，若将该接触电阻降低到0.1Ω＜Rcon＜1Ω的范围内，则使切换继电器35工作，将主探针1、辅助探针2和试验机(检测器)31之间的布线路径恢复原状，成为主探针1与电源施加端子32相连接、且辅助探针2与反馈系统感测端子33相连接的状态，进行所需的电特性试验。如果此时接触电阻不满足0.1Ω＜Rcon＜1Ω的条件，则前进至F7步骤，作为接触不良产品进行处理。After trying to improve the contact resistance in step F5, proceed to step F6. In step F6, a predetermined minute current is applied from the power supply terminal 32 again, the voltage generated by the main probe 1 between the power supply terminal and ground is measured, and the contact resistance is obtained again from the current and voltage values. In this embodiment, if the contact resistance is reduced to the range of 0.1Ω<Rcon<1Ω, the switching relay 35 is operated, and the contact resistance between the main probe 1, the auxiliary probe 2 and the testing machine (detector) 31 The wiring path is restored to the original state, and the main probe 1 is connected to the power supply terminal 32, and the auxiliary probe 2 is connected to the feedback system sensing terminal 33, and the required electrical characteristic test is performed. If the contact resistance does not satisfy the condition of 0.1Ω<Rcon<1Ω at this time, proceed to step F7 and handle it as a poor contact product.
在F6步骤中，在接触电阻不满足0.1Ω＜Rcon＜1Ω的条件的情况下，并非立即作为接触不良产品进行处理，也可前进至F3步骤或F4步骤，多次进行F4步骤及F5步骤的处理。在此情况下，只要设置如下步骤即可：即，预先决定进行F5步骤的次数，在一系列的工序中，累计处理F5步骤的次数，在即使进行了规定次数的处理也无法改善接触电阻的情况下，前进至结束工序。In step F6, if the contact resistance does not meet the condition of 0.1Ω<Rcon<1Ω, instead of immediately treating it as a poor contact product, you can also proceed to step F3 or step F4, and perform steps F4 and F5 multiple times. deal with. In this case, it is only necessary to set the following steps: that is, the number of times to perform step F5 is determined in advance, in a series of processes, the number of times to process step F5 is accumulated, and when the contact resistance cannot be improved even if the treatment is performed for a predetermined number of times In case, proceed to the end process.
接着，对权利要求5所涉及的实施例进行说明。关于利用该方法对接触状态进行改善，即使在室温下也当然具备这样的效果，但是特别在测定环境处于常温或者在超过室温直到150℃的状态下效果较佳。从经验上考虑可知：在高温环境下，端子引线表面因发生氧化、或剥离的氧化膜附着到所接触的触点探头表面上等影响，易于导致接触电阻增大，其结果是，由于该影响导致测定变得不稳定的情况较多。这是例如端子引线表面是SnPb合金、Sn、SnAg合金、SnAgCu合金等、在高温环境下表面易发生氧化的金属材料的情况。因此，将本发明的半导体装置的检查方法应用到高温环境下的测定特别有效。一般情况下，将温度为100～150℃设想为高温环境，本发明在这样的情况下特别能够发挥效果。Next, an embodiment according to claim 5 will be described. Regarding the improvement of the contact state by this method, such an effect is naturally obtained even at room temperature, but it is particularly effective when the measurement environment is at normal temperature or exceeds room temperature up to 150°C. From experience, it is known that in a high-temperature environment, the surface of the terminal lead wire is oxidized, or the peeled oxide film adheres to the surface of the contact probe, which easily leads to an increase in the contact resistance. As a result, due to this effect In many cases, the measurement becomes unstable. This is the case, for example, when the surface of the terminal lead is a metal material such as SnPb alloy, Sn, SnAg alloy, SnAgCu alloy, etc., whose surface is easily oxidized in a high-temperature environment. Therefore, it is particularly effective to apply the semiconductor device inspection method of the present invention to measurement in a high-temperature environment. Generally, a temperature of 100 to 150° C. is assumed to be a high-temperature environment, and the present invention is particularly effective in such a case.
图6是接触电阻的分布图，在该接触电阻的分布图中示出了在高温环境150℃下，利用本发明的半导体装置的检查方法的实施例对接触状态进行改善处理前后的接触电阻的变化(降低)的一个示例。示出了在本发明所涉及的接触状态的改善处理之后，从最初的1000mΩ～1500mΩ的接触电阻分布大概改善为400mΩ～900mΩ的情况。6 is a distribution diagram of contact resistance, which shows the distribution of contact resistance before and after the process of improving the contact state in a high-temperature environment of 150° C. using an embodiment of the method for inspecting a semiconductor device according to the present invention. An example of a change (decrease). It shows that after the improvement process of the contact state according to the present invention, the initial contact resistance distribution of 1000 mΩ to 1500 mΩ is roughly improved to 400 mΩ to 900 mΩ.
接着，对权利要求6所涉及的实施例进行说明。如上述所说明的那样，为了改善接触电阻所需的电能和电流、时间之间满足公式(1)的关系。对该公式进行变形后得到公式(3)。在上述接触电阻的改善处理中，根据该公式(3)将所施加的电流设为一定值，根据所测定的接触电阻Rcon对施加时间进行增减调整，以使得施加所需的电能。能够在不超过安装于试验机31(检测器)并使用的电源的输出能力的范围内，适当地决定施加的电流。Next, an embodiment according to claim 6 will be described. As explained above, the relationship between the electric energy, current, and time required to improve the contact resistance satisfies the formula (1). After transforming this formula, formula (3) is obtained. In the improvement process of the above-mentioned contact resistance, the applied current is set to a constant value according to the formula (3), and the application time is increased or decreased according to the measured contact resistance Rcon, so that the required electric energy is applied. The applied current can be appropriately determined within a range not exceeding the output capability of the power supply installed and used in the testing machine 31 (detector).
接着，对权利要求7所涉及的发明的实施例进行说明。如上述所说明的那样，为了改善接触电阻所需的电能和电流、时间之间满足公式(1)的关系。对该公式进行变形后得到公式(2)。因此，将施加的时间设为定值，根据所测定的接触电阻Rcon对施加电流进行增减调整，以使得施加所需的电能。并不仅限于对施加时间进行增减，或者对施加电流进行增减，能够根据试验机31(检测器)的结构或检查对象的半导体装置的特性规格而适当地进行选择。Next, examples of the invention according to claim 7 will be described. As explained above, the relationship between the electric energy, current, and time required to improve the contact resistance satisfies the formula (1). After transforming this formula, formula (2) is obtained. Therefore, the applied time is set as a constant value, and the applied current is adjusted to increase or decrease according to the measured contact resistance Rcon, so that the required electric energy is applied. It is not limited to increasing or decreasing the application time or increasing or decreasing the applied current, and can be appropriately selected according to the configuration of the testing machine 31 (detector) or the characteristic specifications of the semiconductor device to be inspected.
接着，对权利要求8所涉及的发明的实施例进行说明。图7示出了半导体装置中接触电阻值的实测分布图。根据图7，接触电阻分布在从稍许超过1Ω的状态到几乎为2Ω的状态之间，特别地示出了接触电阻趋向分布成稍大于1Ω的电阻值较多、且接近2Ω的电阻值非常少。因此，在该接触电阻的分布范围的情况下，若力图根据该分布范围对接触电阻进行改善，则能够更有效地改善接触状态。因此，将根据图7被预测为频率最高的接触电阻值作为基准值，根据规定的固定电流和固定时间来决定施加条件，以使得为了降低接触电阻而施加的电能成为所需的值。若由此决定施加条件，则简化为了降低接触电阻而所需的施加条件的决定过程，通过使处理简单化，即使不每次利用试验机(检测器)来进行计算处理，也能够力图改善接触电阻。根据图7所示的接触电阻值的实测分布，来求出为了降低实施例1中所述的接触电阻而施加的电能，以接触电阻大概为800mΩ至2000mΩ的情况为目标来进行设定，从而力图降低接触电阻值。本发明并不仅限于已例举出的实施方式、结构构造，可在符合本发明的主旨的内容中对结构构造、各个数值进行适当的变更。Next, examples of the invention according to claim 8 will be described. FIG. 7 is a graph showing the measured distribution of contact resistance values in a semiconductor device. According to FIG. 7 , the contact resistance distribution ranges from a state slightly exceeding 1Ω to a state almost 2Ω, particularly showing that the contact resistance tends to be distributed so that there are many resistance values slightly greater than 1Ω, and very few resistance values close to 2Ω . Therefore, in the case of the distribution range of the contact resistance, if the contact resistance is improved according to the distribution range, the contact state can be improved more effectively. Therefore, using the contact resistance value predicted to have the highest frequency from FIG. 7 as a reference value, the application conditions are determined based on a predetermined fixed current and a fixed time so that the electric energy applied to reduce the contact resistance becomes a required value. If the application conditions are determined in this way, the process of determining the application conditions required to reduce the contact resistance is simplified, and by simplifying the processing, it is possible to improve the contact without performing calculation processing with the testing machine (detector) every time. resistance. Based on the distribution of actual contact resistance values shown in FIG. 7 , the electric energy applied to reduce the contact resistance described in Example 1 was obtained, and the contact resistance was set to be approximately 800 mΩ to 2000 mΩ as a target. Try to reduce the contact resistance value. The present invention is not limited to the illustrated embodiments and structural structures, and the structural structures and respective numerical values can be appropriately changed within the scope of the present invention.
接着，权利要求9所涉及的发明是使用上述权利要求1至权利要求8所涉及的检查方法来制造半导体装置。通过如上所述地制造半导体装置，能够缩短检查所需的时间，其结果是能够提高价格低廉的半导体装置，利用本发明的检查方法具有能够提高电特性完备的半导体装置、且能够降低半导体装置的不合格产品发生率的效果。Next, the invention according to claim 9 is to manufacture a semiconductor device using the inspection method according to claim 1 to claim 8 above. By manufacturing a semiconductor device as described above, the time required for the inspection can be shortened, and as a result, a semiconductor device with a low price can be improved. The inspection method of the present invention has a semiconductor device with complete electrical characteristics and can reduce the cost of the semiconductor device. Effects on the incidence of nonconforming product.
本发明并不追加特别的电源，而是使用进行原本的电特性试验的简单的结构，且通过利用切换继电器来切换辅助探针一侧的路径，由此能够力图降低接触电阻。如上述现有的专利文献1中所记载的那样，无需诸如求出逐渐使电压上升并使电阻骤降的电压这样的复杂的控制，就能够提高所需的效果。而且即使在超过100℃的高温试验环境中，在端子引线的表面合金层较易发生氧化，或者被其剥下的氧化膜覆盖的情况下，也能够根据需要，利用简单的降低接触电阻的处理来得到良好的低电阻接触状态。通过长期维持良好的接触状态，从而使探针前端的清扫频率、随着接触状态的恶化而导致探针(例如触点探头)的更换周期变长，由此能够使较好地维持试验的工序变得容易。The present invention does not add a special power supply, but uses a simple structure for performing the original electrical characteristic test, and can try to reduce the contact resistance by switching the path on the side of the auxiliary probe using a switching relay. As described in the above-mentioned conventional patent document 1, it is possible to enhance desired effects without complicated control such as obtaining a voltage at which the voltage is gradually increased and the resistance is suddenly decreased. Moreover, even in a high-temperature test environment exceeding 100°C, when the alloy layer on the surface of the terminal lead is easily oxidized, or is covered by the peeled oxide film, simple treatment to reduce the contact resistance can be used as needed. To get a good low resistance contact state. By maintaining a good contact state for a long time, the cleaning frequency of the tip of the probe and the replacement cycle of the probe (such as a contact probe) become longer as the contact state deteriorates, thereby enabling better maintenance of the test process made easy.
标号说明Label description
1：主探针1: Main Probe
2：辅助探针2: Auxiliary probe
3：上壳体3: Upper shell
4：下壳体4: Lower shell
20：半导体装置20: Semiconductor device
21：端子引线21: Terminal lead
30：插座30: socket
31：试验机31: Testing machine
32：电源施加32: Power application
33：反馈系统感测33: Feedback system sensing
34：电源接地34: Power ground
35：切换继电器35: switch relay
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| JP6155725B2 (en) | 2017-07-05 |
| CN104062574B (en) | 2018-06-08 |
| JP2014182005A (en) | 2014-09-29 |
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