CN103811336B - IGBT (Insulated Gate Bipolar Translator) power device applied at low power and manufacturing method thereof - Google Patents

Abstract

The invention discloses an IGBT power device for low-power application and a manufacturing method thereof. The method comprises: performing semiconductor impurity implantation or diffusion operation on the front side of a silicon substrate; and etching the front side after the semiconductor impurity implantation or diffusion operation processing; performing P-type ion implantation on the back side of the silicon substrate to form a P region; setting a trench on the back side of the silicon substrate; performing N-type ion implantation on the surface of the trench to form an N region; Diffusion operation is performed on the area; outer packaging treatment is performed on the silicon substrate. The advantages of the present invention are: by adding grooves, P-type ion implantation and N-type ion implantation only on the surface of the grooves, the turn-on and turn-off times of the low-voltage IGBT can be respectively improved without affecting the withstand voltage capability of the device itself , in order to achieve the invention purpose of extremely low turn-on voltage drop and fast reverse turn-off recovery time.

Description

IGBT power device for low power application and manufacturing method thereof

technical field

The invention belongs to the technical field of manufacturing semiconductor power electronic devices, and in particular relates to a method for manufacturing an IGBT power device for low-power applications.

Background technique

IGBT (Insulated Gate Bipolar Transistor, Insulated Gate Bipolar Transistor) is a composite device of a bipolar transistor and a power MOSFET. Its structure can be equivalent to a combination of a MOS and two bipolar transistors. The bottom P ⁺ is connected to a positive potential, which is called the anode of the IGBT, and the surface N ^- contact layer is usually connected to a negative or zero potential, which is called the cathode of the IGBT, and the electrode drawn out through the gate dielectric is the gate of the IGBT. IGBT is widely used in motor control, industrial speed regulation, household appliances, lighting, network communication, computer, automotive electronics, aerospace and national defense construction, etc. This field is the basic core device of modern power electronics technology.

With the development of power semiconductor devices, people have higher requirements for the performance of IGBT. For example, the patent application with publication number CN1790737A discloses an IGBT and its manufacturing method. The IGBT is driven by an NMOS tube. A vertical MOS tube is used in the structure of the device; its manufacturing method includes: growing N ^- epitaxy on a P-type silicon wafer, trench photolithography, etching to form a gate, polysilicon deposition and etch back, and well implantation Diffusion, source photolithography, source implantation diffusion, contact hole formation, metal layer deposition, photolithography, etching, and backside metallization of silicon wafers. In addition, the requirements of the existing technology for the IGBT are not only to maintain its advantages of low conduction loss in the high-voltage and high-power field, but also to improve the application capability of the IGBT in the low-voltage, medium- and low-power field. High-speed switching, high reliability, miniaturization and low power consumption can also be realized in the working state. In the past, this was the limit of its application for IGBT, because it is well known that low conduction loss and high-speed turn-on and turn-off are mutually balanced, and only one of them can be obtained or a better compromise can be achieved. In low-power applications, the advantages of power MOSFETs are more obvious. Its fast channel current turn-on and turn-off characteristics make it a better match for low-voltage high-frequency circuits, but if the IGBT can also have the above-mentioned fast turn-on and turn-off characteristics of MOSFETs If so, it will trigger a revolution in semiconductor devices. Therefore, it is a major difficulty to realize low-voltage and high-frequency IGBTs, which is also a hot spot in international research.

Contents of the invention

In view of the above shortcomings, the technical problem to be solved by the present invention is to provide a method for manufacturing an IGBT power device for low-power applications, which can increase the turn-on and turn-off time of the low-voltage IGBT.

The technical scheme of the present invention is achieved in this way, a method for manufacturing an IGBT power device for low-power applications, which is characterized in that it includes: performing semiconductor impurity implantation or diffusion operations on the front side of the silicon substrate; performing semiconductor impurity implantation or diffusion operations on Etching treatment is performed on the front side after operation; P-type ion implantation is performed on the back side of the silicon substrate to form a P region; a groove is provided on the back side of the silicon substrate; Diffusion operation is performed on the above P region and N region; wherein the heavily doped N+ region is only formed near the surface of the trench; and the silicon substrate is subjected to outer packaging treatment.

Can find out by above-mentioned technical scheme, beneficial effect of the present invention is:

On the one hand, by adding grooves, P-type ion implantation and N-type ion implantation only on the surface of the grooves without affecting the withstand voltage capability of the device itself, the turn-on and turn-off time of the low-voltage IGBT can be improved. , due to the increased metal-filled trench structure replacing part of the drain P-type ion heavily doped region, the region with this trench structure in the IGBT becomes a MOSFET; when the top channel is turned on, part of the electrons will quickly The heavily doped N-type ion region reaching the surface of the trench generates current, thereby omitting the diode turn-on voltage formed by the heavily doped P-type ion region of the drain and the base region of the substrate, which will make the IGBT turn on as fast as the MOSFET , There is a current when there is a voltage, and when the drain has a forward voltage drop, the holes generated at the bottom will also go upward to the source, which produces a conductance modulation effect in the base region of the substrate like an ordinary IGBT.

On the other hand, the P-type ion implantation on the back side and the N-type ion implantation only on the surface of the trench can also improve the turn-off time of the low-voltage IGBT. It will quickly flow down to the drain, and due to the increased surface implantation of the heavily doped N-type ion region in the trench region, the holes in the base region of the substrate no longer mainly disappear by recombining with the remaining electrons, but quickly The heavily doped N-type ion region on the trench surface with a shorter path will recombine and disappear, that is to say, the heavily doped N-type ion region implanted on the trench surface on the back is equivalent to a thin IGBT in a low-voltage application. The recombination center, due to the recombination of the minority carriers at the time of turn-off, makes the turn-off speed greatly accelerated.

Description of drawings

In order to more clearly describe the relevant technical solutions involved in the present invention, the accompanying drawings will be briefly described below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, In other words, other drawings can also be obtained from these drawings on the premise of not paying creative efforts.

Fig. 1 is the internal structure schematic diagram of the embodiment product of the IGBT power device of low power application of the present invention;

Fig. 2 is the concrete embodiment structural representation of the IGBT power device of low-power application of the present invention;

Fig. 3 is another specific embodiment structural representation of the IGBT power device of low-power application of the present invention;

Fig. 4 is the flowchart of the manufacturing method of the IGBT power device of low-power application of the present invention;

Fig. 5 is the process flow block diagram of the embodiment of the method shown in Fig. 3;

Fig. 6 is a flow chart of the manufacturing process of the embodiment of the present invention.

Each reference sign in the figure indicates:

1—back gold layer 2—heavily doped P+ region 3—trench

4—heavily doped N+ region 5—N-substrate layer 6—P-region 7—N+ region

8—Silicon dioxide gate oxide layer 9—Polysilicon gate layer 10—BPSG layer

11—Metal surface layer 12—P+ area 13—Back side 14—Photoresist.

detailed description

In order to facilitate those skilled in the art to further understand the present invention, clearly understand the technical solution of the present invention, and fully and fully disclose the relevant technical content of the present invention, the specific implementation of the present invention will be described in detail below in conjunction with the accompanying drawings, of course , the described specific implementations only enumerate a part of the embodiments of the present invention, rather than all the embodiments, and are used to help understand the present invention and its core ideas.

The basic idea of the present invention is to optimize the design of the back structure of the IGBT, increase the groove filled with metal, heavily dope P-type, and only on the surface of the groove (especially the groove) without affecting the withstand voltage capability of the device itself. The N-type region injected into the bottom of the groove) can also be arranged in a repeated spaced arrangement to improve the turn-on and turn-off time of the low-voltage IGBT, and the specific description is given below.

In Fig. 1, the IGBT power device of the low power application of the present invention is mainly composed of: N-substrate layer 5, P-region 6, N+ region 7, silicon dioxide gate oxide layer 8, polysilicon gate layer 9, BPSG layer 10, The metal surface layer 11 and the P+ region 12, as well as the back gold layer 1 on the back of the device, the heavily doped P+ region 2, the trench 3, and the heavily doped N+ region 4 on the surface of the trench. The source region is composed of a P- region 6 located in the deep layer, a P+ region 12 located in the middle of the surface layer, and an annular N+ region 7 located on the periphery of the P+ region.

Preferably, the borophosphosilicate glass BPSG layer 10 can serve as a gate-source isolation layer, and in a specific embodiment, the BPSG layer 10 can also be combined with a silicon dioxide layer to form a gate-source isolation layer. The BPSG layer 10 is used as a dopant source for the formation of the N+ region 7 in the source region. Through annealing and other treatments, semiconductor impurities are diffused into the silicon in the ring-shaped region of the predetermined N+ region 7 to form the ring-shaped N+ region 7 .

Fig. 2 is the concrete embodiment structure diagram of the IGBT power device of low-power application of the present invention, as shown in the figure, has at least one repeat arrangement structure of described groove 3, has heavily doped N+ on the surface of each groove area. In a specific embodiment, the repeated arrangement structure is, for example, increasing the number of grooves 3, that is, shortening the distance between the grooves 3, so that there are more grooves in the same area, and the frequency effect is improved. will be more obvious.

Fig. 3 is the structural schematic diagram of another specific embodiment of the IGBT power device of low-power application of the present invention, as shown in the figure, has at least one spaced arrangement structure of described groove 3, has heavily doped on the surface of each groove Heterogeneous N+ region. In a specific embodiment, the spaced arrangement structure refers to, for example, that when the number of trenches is increased, there may be N+ implantation in the upper part of one trench, but not in the upper part of the trench, which is a spaced arrangement structure, and less holes are injected into the lower part of the trench. Quantity impact.

In addition, by shortening the distance between the grooves, there can be more grooves in the same area, and the frequency improvement effect will be more obvious. Spacing shallow trench patterns to reduce the impact on the number of holes below.

Fig. 4 is the flow chart diagram of the manufacturing method of the IGBT power device of low power application of the present invention, as shown in the figure, comprises: carrying out semiconductor impurity implantation or diffusion operation to the front side of silicon substrate; After carrying out semiconductor impurity implantation or diffusion operation performing etching treatment on the front side of the silicon substrate; performing P-type ion implantation on the back side of the silicon substrate to form a P region; setting a groove on the back side of the silicon substrate; performing N-type ion implantation on the surface of the groove to form an N region; Diffusion operation is performed on the P region and the N region; the outer packaging process is performed on the silicon substrate.

Referring to FIG. 5 , the etching treatment on the front side after semiconductor impurity implantation or diffusion operation further includes: sequentially performing oxide layer corrosion, gate oxidation, polycrystalline sputtering and corrosion, source diffusion, contact hole corrosion, and metal and passivation. Layer sputtering treatment. After the treatment, a front metal layer is formed. Preferably, the front metal layer is an aluminum layer.

Said setting grooves on the back side of the silicon substrate further includes: depositing photoresist on the back side of the silicon substrate, exposing and developing a mask to form a preparatory trench etching region; The etched area is subjected to dry etching to form the trench.

As is known, the molecules or atoms on the side of the contact are constantly moving, thereby forming a diffusion phenomenon. The diffusion phenomenon at room temperature is usually relatively slow. In order to facilitate the comparison of the P region and N region in a short time Performing the diffusion operation may further include: controlling the depth of the diffusion layer in the P region and the N region through a heating operation, the depth of the diffusion layer in the P region and the N region is determined by the temperature and heating time of the heating operation, and doping Miscellaneous impurities can be activated during the diffusion process.

The outer layer encapsulation process of the silicon substrate further includes sequentially grinding or polishing the substrate layer, and metal layer sputtering and alloying operations to form a back gold layer. Preferably, the back gold layer is titanium, nickel, or silver back gold layer.

Fig. 6 is the manufacturing process flowchart of the embodiment of the present invention, as shown in the figure, after the front structure of the IGBT is completed, proceed in sequence:

The N-substrate layer 5 is thinned on the back side, and then the heavily doped P+ implantation is performed to form the P region (then the heavily doped P+ region 2 is formed). At this time, the activation thermal process is not performed, and the P+ junction after implantation is very shallow.

Deposition of photoresist 14, mask exposure and development are performed to form a preliminary trench etching region.

The back surface is dry etched to form the trench 3, and then heavily doped N+ implantation is performed on the surface of the trench 3 (especially the bottom surface of the trench 3) to form an N region (heavy doped N+ region 4 is formed thereafter). At this time, neither the P region nor the N+ region 52 on the surface of the trench (especially at the bottom of the trench) has undergone a thermal process activation process, and both belong to shallow junctions. Preferably, the trench 3 is a shallow trench structure, and the depth h of the trench 3 satisfies the relationship with the thickness D of the silicon substrate: 0.05≤h/D≤0.2. Preferably, the depth of the trench 3 h is about one tenth of the thickness D of the silicon substrate of the substrate. For example, when the thickness D of the overall silicon substrate is 100 μm for a low-voltage IGBT, the depth h of the trench 3 is about 10 μm.

Heating the P region and the N region on the surface of the trench activates the injected carriers, transforms the shallow junction into a deep junction, and forms a heavily doped P+ region 2 and a heavily doped N+ region 4 respectively. Preferably, the depth of the diffusion layer in the P region and the N region is controlled by a heating operation, the depth of the diffusion layer in the P region and the N region is determined by the temperature and heating time of the heating operation, and the doped impurities can be activated during diffusion. Afterwards, the deposition of the back gold layer 1 is completed.

The manufacturing method of the IGBT power device for low-power application of the present invention makes the structure of MOSFET combined in the IGBT body, also provides the carrier recombination center in the IGBT body, improves the time of the turn-on phase and the turn-off phase respectively, and the turn-on voltage is lower than 1V, the reverse turn-off time can be as low as tens of nanoseconds, which matches the high-frequency requirements of low-voltage applications. The invention can achieve extremely low turn-on voltage drop, fast reverse turn-off recovery time, and achieve better compromise between forward conduction voltage drop and withstand voltage. With the development of semiconductor technology, more series of low power consumption devices can be produced by adopting the invention.

During the implementation process, some flexible designs can be made according to the specific situation and under the condition that the basic structure remains unchanged. For example: increasing the number of shallow groove structures by reducing the line width, changing the design of the mask layout, separating the implanted regions of the N+ regions in the shallow grooves, etc., and the optimized design all belong to the scope of the present invention.

The working principle is: without affecting the withstand voltage capability of the device itself, by adding grooves, P-type ion implantation and N-type ion implantation only on the surface of the grooves, a hole-carrying current is provided in disguise when the IGBT is turned off. Sub-composite outflow path, and reduce its path length, improve the shutdown speed. At the same time, the N+ type junction is implanted in the trench region, so that the turn-on of the IGBT becomes fast turn-on, that is, the turn-on mode in which there is a voltage and a current. Thus, the turn-on and turn-off times of the low-voltage IGBT can be improved.

In the turn-on phase, since the increased metal-filled trench structure replaces part of the drain P-type ion heavily doped region, the region with the trench structure in the IGBT becomes a MOSFET; when the top channel is turned on, part Electrons will quickly reach the heavily doped N-type ion region on the surface of the trench to generate current, thereby omitting the diode turn-on voltage formed by the heavily doped P-type ion region of the drain and the base region of the substrate, which will make the IGBT turn on at the same time. The MOSFET is as fast, and there is a current when there is a voltage. Moreover, when the drain has a forward voltage drop, the holes generated at the bottom will also go upward to the source, which produces a conductance modulation effect in the base region of the substrate like an ordinary IGBT.

In the turn-off phase, the P-type ion implantation on the back side and the N-type ion implantation only on the surface of the trench can also improve the turn-off time of the low-voltage IGBT. Downflow to the drain, and due to the increased surface implantation of the heavily doped N-type ion region in the trench region, the holes in the base region of the substrate no longer mainly disappear by recombining with the remaining electrons, but quickly travel to a shorter path The heavily doped N-type ion region on the surface of the groove to recombine and disappear, that is to say, the heavily doped N-type ion region implanted on the groove surface on the back is equivalent to a recombination center in a thin IGBT body for low-voltage applications, because The minority carriers during turn-off are recombined, so that the turn-off speed is greatly accelerated.

To sum up, the structure provided by the present invention to increase the operating frequency of the IGBT in the field of low-voltage applications, due to the heavily doped P+ implantation on the back, the groove 3 is set, and the upper part of the groove 3 is heavily doped N+ implanted, and through Activation makes the P region and N region change from a shallow junction to a deep junction, so that the body of the IGBT is combined with a MOSFET structure, providing a carrier recombination center in the IGBT body, and increasing the time of the turn-on phase and the turn-off phase respectively. In a specific embodiment, the turn-on voltage is lower than 1V, and the reverse turn-off time can be as low as tens of nanoseconds, which matches the high-frequency requirement in low-voltage applications. Of course, it can also be realized by only opening trenches on the back side or only adding impurities.

Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative work, and/or without departing from the spirit and essence of the present invention, even if the implementation of each step The sequence has been changed, and various corresponding changes and modifications are made according to the present invention, but these corresponding changes and modifications should all belong to the protection scope of the present invention.

Claims (10)

1. A method for manufacturing an IGBT power device for low-power applications, characterized in that, comprising: Perform semiconductor impurity implantation or diffusion on the front side of the silicon substrate; Etching the front side after semiconductor impurity implantation or diffusion operation; Perform P-type ion implantation on the back of the silicon substrate to form a P region; providing grooves on the back side of the silicon substrate; Perform N-type ion implantation on the surface of the trench to form an N region; performing a diffusion operation on the P region and the N region; the heavily doped N+ region formed by the diffusion of the N region is only formed near the surface of the trench; The silicon substrate is subjected to outer encapsulation treatment. 2. The method according to claim 1, wherein the etching treatment on the front surface after semiconductor impurity implantation or diffusion operation further comprises: Oxide layer corrosion, gate oxidation, polycrystalline sputtering and corrosion, source diffusion, contact hole corrosion, and metal and passivation layer sputtering treatment are carried out in sequence. 3. The method according to claim 2, characterized in that, setting the groove on the back side of the silicon substrate further comprises: Deposit photoresist on the back of the silicon substrate, mask exposure and development to form a preliminary trench etching area; performing dry etching on the preliminary groove etching region to form the groove. 4. The method according to claim 3, wherein performing the diffusion operation on the P region and the N region further comprises: controlling the diffusion layer depths of the P region and the N region through a heating operation. 5. The method according to claim 4, characterized in that: the depths of the diffusion layers in the P region and the N region are determined by the temperature and heating time of the heating operation. 6. The method according to claim 5, characterized in that, the outer layer encapsulation process on the silicon substrate further comprises sequentially grinding or polishing the substrate layer, and metal layer sputtering and alloying operations to form a gold back layer. 7. The method according to claim 6, wherein the gold-back layer is titanium, nickel, or silver-back gold layer. 8. A kind of IGBT power device that adopts the IGBT power device of low-power application that the method as described in any one in claim 1 to 7 manufactures, groove is set on the back side of described device; Build heavily doped N+ on the surface of described groove region, the heavily doped N+ region is only formed near the trench surface. 9 . The IGBT power device for low power applications according to claim 8 , characterized in that it has a structure of at least one trench being arranged repeatedly, or a structure of at least one trench being arranged at intervals. 10. The IGBT power device for low-power applications according to claim 8, characterized in that: the trench is a shallow trench, and the depth h of the trench 3 and the thickness D of the silicon substrate satisfy the relationship: 0.05 ≤h/ D ≤0.2.