CN103796418A - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereof Download PDFInfo
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- CN103796418A CN103796418A CN201210427918.5A CN201210427918A CN103796418A CN 103796418 A CN103796418 A CN 103796418A CN 201210427918 A CN201210427918 A CN 201210427918A CN 103796418 A CN103796418 A CN 103796418A
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Abstract
本发明公开了一种电路板及电路板的制作方法，该电路板包括：叠合的第一多层子板和第二多层子板，每个多层子板包括至少两层的线路基材；第一绝缘层，配置于所述第一多层子板的第一面上；第二绝缘层，配置于所述第二多层子板的第二面上，所述第一面与所述第二面为相邻的面，所述第二绝缘层与所述第一绝缘层接触连接；第一导电块，嵌于所述第一绝缘层的第一窗口中并设置于所述第一面上；第二导电块，设置于所述第二面上并贯穿所述第二绝缘层，且电性连接于所述第一导电块，以使所述第一多层子板与所述第二多层子板电性连接。
The invention discloses a circuit board and a manufacturing method of the circuit board. The circuit board comprises: a first multi-layer sub-board and a second multi-layer sub-board which are laminated, and each multi-layer sub-board includes at least two layers of circuit substrates. material; the first insulating layer is arranged on the first surface of the first multi-layer sub-board; the second insulating layer is arranged on the second surface of the second multi-layer sub-board, and the first surface and The second surface is an adjacent surface, and the second insulating layer is in contact with the first insulating layer; the first conductive block is embedded in the first window of the first insulating layer and arranged on the On the first surface; a second conductive block, disposed on the second surface and penetrating through the second insulating layer, and electrically connected to the first conductive block, so that the first multi-layer sub-board and The second multi-layer sub-board is electrically connected.
Description
Technical field
The present invention relates to printed circuit board manufacture field, relate in particular to the manufacture method of a kind of circuit board and circuit board.
Background technology
Along with consumption electronic products function is more and more, the past more frivolous and short and small future development of volume, so the wiring density of its internal printed circuit board and process technique also day by day complexity progress greatly, between the therefore increase of the number of elements on circuit board, the continuous density of layout, laminate, interconnection density increases, and the number of plies of circuit board is also more and more, although some number of plies is few, but the thickness of insulating barrier is large especially, so the manufacture difficulty of circuit board also sharply increases, be mainly manifested in level to level alignment degree, boring and electroplate.
Specifically, superimposed contraposition gained tolerance increases with the superimposed number of plies, and the harmomegathus of grafting material (as glass fibre film) is than the wayward easily dystopy that causes after pressing; After pressing, carry out machine drilling meeting because the number of plies is too high, the blocked up frictional force that causes of gross thickness is too high, cause the easy broken needle of drill bit, add the operating parameter adjustment of machine drilling and high heat that frictional force produces at the longitudinal radiating effect of through hole, can be because the design number of plies of wiring board, gross thickness increase and reduce, therefore too much hoarding of heat can cause the resin retraction of through-hole wall excessive, and affects the planarization of inwall; In addition, the aspect ratio in thickness of slab and aperture is too high more affects follow-up plating and is difficult for or forms cavity or conductive layer thickness crossing the bad phenomenon such as thin.In order to solve the problems of the technologies described above, prior art mainly adopts following two kinds of methods:
Method one: adopt outstanding copper billet (or its distressed structure) to penetrate insulation film, connect two or more multilayer daughter boards.
Method two: connect two or more multilayer daughter boards with conducting resinl, realize and increase layer, first make two or more multilayer daughter boards, on daughter board link position, stamp tin cream, by multilayer daughter board with window after insulation film combination, then carry out pressing.
The inventor realizing in process of the present invention, finds that prior art at least has following shortcoming:
Method one: the connection copper face between multilayer daughter board only connects for contact, and connectivity and reliability all exist very large inefficacy hidden danger.
Method two: the method easily occurs that slippage causes Joint failure.
Summary of the invention
The invention provides the manufacture method of a kind of circuit board and circuit board, connectivity and the not high technical problem of reliability while connecting multiple multi-layer sheet in order to solve in prior art.
One aspect of the present invention provides a kind of circuit board, comprising: the first superimposed multilayer daughter board and the second multilayer daughter board, and each multilayer daughter board comprises at least two sandwich circuit base materials; The first insulating barrier, is disposed on the first surface of described the first multilayer daughter board; The second insulating barrier, be disposed at second of described the second multilayer daughter board upper, described first surface is adjacent face with described second, described the second insulating barrier contacts and is connected with described the first insulating barrier; The first conducting block, is embedded in the first window of described the first insulating barrier and is arranged on described first surface; The second conducting block, is arranged at described second and goes up and run through described the second insulating barrier, and be electrically connected at described the first conducting block, so that described the first multilayer daughter board and described the second multilayer daughter board are electrically connected.
Preferably, described circuit board also comprises conductive layer, fuses in described first window, and described the second conducting block fuses in described conductive layer, is electrically connected with described the first conducting block.
Preferably, described conductive layer is leypewter.
Preferably, the temperature when fusing point of described conductive layer is lower than the first multilayer daughter board described in pressing and described the second multilayer daughter board.
Preferably, described the first conducting block is plate-like conducting block.
Preferably, described the second conducting block is taper projection or stud bumps.
Preferably, described the first conducting block is copper dish, and described the second conducting block is copper post.
The present invention also provides a kind of manufacture method of circuit board on the other hand, be applied between the first multilayer daughter board and the second multilayer daughter board, in described the first multilayer daughter board and described the second multilayer daughter board, each daughter board comprises at least two sandwich circuit base materials, and described method comprises: the first conducting block is set on the first surface of described the first multilayer daughter board; The first insulating barrier is set on described first surface, wherein, on the position corresponding with described the first conducting block of described the first insulating barrier, has first window, described the first conducting block exposes in described first window; On second of described the second multilayer daughter board, the second conducting block is set; On described the second multilayer daughter board, form the second insulating barrier, wherein, on the position corresponding with described the second conducting block of described the second insulating barrier, there is Second Window, make described the second conducting block through described Second Window; Described the first multilayer daughter board is positioned over to second upper and pressing of described the second multilayer daughter board by described first surface, so that described the second conducting block and described the first conducting block are electrically connected.
Preferably, before described pressing, described method also comprises: by described first window, on described the first conducting block, cover a conductive layer, make in the process of the first multilayer daughter board and the second multilayer daughter board described in pressing, described the second conducting block fuses in described first conductive layer of molten condition, realizes the electric connection of described the first conducting block and described the second conducting block.
Preferably, the first conducting block is set on the first surface of described the first multilayer daughter board, is specially: the first conducting block that plate-like is set on the first surface of described the first multilayer daughter board; On second of described the second multilayer daughter board, the second conducting block is set, is specially: on second of described the second multilayer daughter board, taper projection or stud bumps are set.
Beneficial effect of the present invention is as follows:
The present invention compared with prior art, adopt on two adjacent multiple-plate adjacent two faces, one arranges the first conducting block, another arranges the second conducting block, make to be electrically connected by the first conducting block and the second conducting block on two multi-layer sheet, so the connection reliability of connected mode of the present invention is better, be not easy to occur the situation of Joint failure.
Further, also have a conductive layer on the first conducting block, the first conducting block and the second conducting block fuse in conductive layer and are electrically connected, so make the electric connection between the first conducting block and the second conducting block more reliable.
Accompanying drawing explanation
Figure 1A-Fig. 1 C is the manufacturing process schematic diagram of multilayer daughter board in one embodiment of the invention;
Fig. 2 is the flow chart of the method for attachment of multilayer daughter board in one embodiment of the invention;
Fig. 3 A-Fig. 3 C is the manufacturing process schematic diagram of circuit board in one embodiment of the invention;
Fig. 4 A-Fig. 4 C is another manufacturing process schematic diagram of circuit board in one embodiment of the invention.
Embodiment
One embodiment of the invention provides the manufacture method of a kind of circuit board and circuit board, please refer to Figure 1A to Fig. 1 C, is the making schematic flow sheet of multilayer daughter board in the present embodiment.Please refer to Figure 1A to Fig. 1 C, by multiple superimposed contrapositions of circuit base material L1 to L5 that completed configuration, and one step press is to form the first multilayer daughter board 100.Afterwards, then holing and electroplating process, to complete the conductive hole 101 of each circuit base material of interlayer conduction L1 to L5, for example, is the through hole of plated conductive material 102.Specifically, the multilayer daughter board that circuit base plate 100 is the low number of plies, for example, have the circuit base material of 8 layers to 18 layers, and Figure 1A only illustrates a part of circuit base material L1 to L5, and all the other omissions do not draw.In general, the number of plies of the first multilayer daughter board 100 is higher, thickness is thicker, the process capability of board just requires higher, if the number of plies exceedes more than 20 layers, existing process work bench is difficult to meet yields and the poor requirement of aligning accuracy, therefore the embodiment of the present invention first (is determined the number of plies of the first multilayer daughter board 100 or THICKNESS CONTROL) in certain scope according to process capability, with reduce the error of superimposed contraposition and avoid that the number of plies is too high, the blocked up bad that causes boring and electroplate of gross thickness.
In the first multilayer daughter board 100, wherein each circuit base material can comprise a layer insulating and single or double copper wire, also comprise the multiple resin plate P1 to P4 between circuit base material, resin plate concrete example is glass epoxy resin in this way, engage the copper wire of the relative both sides of resin plate P1 to P4 to be electrically insulated, but each circuit base material L1 to L5 can be electrically connected to each other by the conductive hole of interlayer conduction 101, with transmission of signal.The electric conducting material of conductive hole 101 does not limit with plating mode and forms.In addition, the embodiment of the present invention does not limit the first multilayer daughter board 100 of making the low number of plies in the mode of superimposed contraposition, also can adopt Layer increasing method to make, it adopts the blind hole (Blind Hole) of interlayer conduction and buried via hole (Buried Hole) to be electrically connected each circuit base material L1 to L5, can economize lower through-hole taking up room on plate face, make limited outer area can be as far as possible in order to wiring and soldering part.Layer increasing method multi-layer sheet is developed so far existing multiple process technique and applies in commercial production, for example SLC, FRL, DYCOstrate, Z-Link, ALIVH, HDI, different processing procedures adopts different materials and substrate, therefore on hole creating technology, also have nothing in common with each other, for example there are sensitization pore-forming, laser drill, plasma pit and chemical pit, are not described in detail in this.
Use the same method and can make the second multilayer daughter board 200, next will introduce in detail after the first multilayer daughter board 100 and the second multilayer daughter board 200 complete, how the making flow process that is combined into circuit board by two or more first superimposed multilayer daughter boards 100, the second multilayer daughter board 200, connect the first multilayer daughter board 100 and the second multilayer daughter board 200.
Please refer to shown in Fig. 2, this method of attachment comprises:
Step 210: the first conducting block is set on the first surface of the first multilayer daughter board 100;
Step 212: the first insulating barrier is set on first surface, wherein, has first window on the position corresponding with the first conducting block of the first insulating barrier, the first conducting block exposes in first window;
Step 214: on second of the second multilayer daughter board 200, the second conducting block is set;
Step 216: form the second insulating barrier on the second multilayer daughter board 200, wherein, there is Second Window on the position corresponding with the second conducting block of the second insulating barrier, make the second conducting block through Second Window;
Step 218: the first multilayer daughter board 100 is positioned over to second upper and pressing of the second multilayer daughter board 200 by first surface, so that the second conducting block and the first conducting block are electrically connected.
Next please refer to Fig. 3 A to Fig. 3 C, in the present embodiment, if the first multilayer daughter board 100 is positioned at upper strata, so in step 210, be specially the bottom surface at the first multilayer daughter board 100, be that first surface is made the first conducting block, as shown in Figure 3A, make the first conducting block 103 in the bottom surface of the first multilayer daughter board 100, the first conducting block 103 is for example plate-like conducting block, can be specifically circular or polygonal plate-like, in the present embodiment, plate-like conducting block be specially the electric conductor of surface for plane; Further, the first conducting block 103 is to make in the time making on the bottom surface of the first multilayer daughter board 100 copper wire, so the first conducting block 103 can be a part for the first multilayer daughter board 100 outer copper foil originally, so the first such conducting block 103 difficult drop-offs, and connect reliable with copper wire.
In other embodiments, the first conducting block 103 can also be the electric conductor of other materials, can be connected on the circuit of the first multilayer daughter board 100 by the mode of for example welding.
Then, execution step 212, refer again to Fig. 3 B, the first insulating barrier 104 is set on the bottom surface of the first multilayer daughter board 100, in the present embodiment, can be first on the bottom surface of the first multilayer daughter board 100, to suppress a layer insulating, then adopt laser and other modes that are equal to window to the first insulating barrier 104, form first window 105(and please refer to Fig. 3 C), the position of first window 105 is corresponding with the first conducting block 103, then out exposed by first window 105, the first conducting blocks 103.In the present embodiment, the first insulating barrier 104 is for example glass epoxy resin, can certainly be the insulating barrier of other materials.
In another embodiment, execution step 212, also can be first the first insulating barrier 104 to be windowed and formed first window 105, then the first insulating barrier 104 of having opened window is pressed together on to the bottom surface of the first multilayer daughter board 100, then expose the first conducting block 103 by first window 105.In the present embodiment, the first insulating barrier 104 is for example the glass epoxy resin of semi-solid preparation state, can certainly be the insulating barrier of other materials.
Next, execution step 214, please refer to Fig. 4 A, supposes that the second multilayer daughter board 200 is positioned at the lower floor of the first multilayer daughter board 100, so just, at the upper surface of multilayer daughter board, the second conducting block 202 is set on second surface.In the present embodiment, can be on the outer copper foil 201 of the second multilayer daughter board 200, to continue to make the second conducting block 202 equally, for example produce the second conducting block 202 by the mode of graphic plating, specifically, the second conducting block 202 can be taper projection or stud bumps, can be copper product, can be also the electric conducting material of other types.
When the first conducting block 103 is that copper dish, the second conducting block 202 are during for copper post, because be all to utilize the outer copper foil of the first multilayer daughter board 100 and the second multilayer daughter board 200 to be made, so connectivity is reliable.
Please continue to refer to Fig. 4 B, after the second conducting block 202 completes, execution step 216, the second insulating barrier 203 that is about to have Second Window 204 is enclosed within on the second conducting block 202 by Second Window 204, be the size that the size of Second Window 204 is greater than the second conducting block 202, Second Window 204 can be enclosed within on the second conducting block 202.
In one embodiment, when take first surface as the plane of reference, the height of the first conducting block 103 does not have the first insulating barrier 104 when high, with respect to second, the height of the second insulating barrier 203 will be lower than the height of the second conducting block 202, make the second conducting block 202 through Second Window 204, and the thickness of the second conducting block 202 is less than and equals the second insulating barrier 203 and the first insulating barrier 104 sums, like this, in the time of pressing the first multilayer daughter board 100 and the second multilayer daughter board 200, the first conducting block 103 and the second conducting block 202 can be electrically connected; For example the first conducting block 103 described in previous embodiment of this situation is copper dish, the second conducting block 202 situation during for copper post.The second insulating barrier 203 is for example the glass epoxy resin of semi-solid preparation state, can certainly be the insulating barrier of other materials, and the material of the material of the second insulating barrier 203 and the first insulating barrier 104 can be identical, also can be different.
In another embodiment, also can be during take first surface as the plane of reference, when the height of the first conducting block 103 is identical with the first insulating barrier 104, that surface that exposes to the first insulating barrier 104 of the first conducting block 103 is concordant with the lower surface of the first insulating barrier 104, and the surface that the second conducting block 202 exposes to the second insulating barrier 203 is so also as long as be concordant with the upper surface of the second insulating barrier 203.
In other embodiments, the first conducting block 103 and the second conducting block 202 can also have other different height dimension to select, as long as can guarantee that the second conducting block 202 and the first conducting block 103 can be electrically connected, so those skilled in the art can, based on description of the invention, select according to actual conditions.
Further, in the present embodiment, the second insulating barrier 203 is entangled by the second conducting block 202, so in follow-up pressing is made, so can not produce slippage.
Next, then please refer to Fig. 4 C, work as joint face, after the first conducting block 103 and the second conducting block 202 are made, just perform step 218, be about to the first multilayer daughter board 100 and the second multilayer daughter board 200 and press together, form circuit board.Certainly, the quantity of the first multilayer daughter board 100 and the second multilayer daughter board 200 also can be more than two, and the present embodiment is only take two multilayer daughter boards as example.
In practice, except step 218 is last execution, the order of other steps can be adjusted according to actual conditions, and the order in above-described embodiment is only for illustrating the implementation process of the method, not for limiting the present invention.
Further, in another embodiment, before execution step 218, also on exposed the first conducting block 103 out, cover the first conductive layer, for example spraying, silk-screen, fill up first window 105, so in the time that the first multilayer daughter board 100 and the second multilayer daughter board 200 are pressed together, the second conducting block 202 will fuse in the first conductive layer of molten condition, is electrically connected with the first conducting block 103.
Specifically, because in the time of pressing, pressing material temperature generally can reach more than 200 degrees Celsius, and the fusing point of the first conductive layer just can become molten condition during lower than 200 degrees Celsius, then when the second conducting block 202 fuses into after the first conductive layer of molten condition, just the first conducting block 103 and the second conducting block 202 are firmly linked together, there is very high reliability.In practice, the pressing-in temp when fusing point of the first conductive layer needs only lower than pressing the first multilayer daughter board 100 and the second multilayer daughter board 200.
In practice process, the first conductive layer for example can be selected leypewter, and the fusing point of terne metal is 183 degree, in the time that the first conducting block 103 and the second conducting block 202 are copper, after pressing, will form stable signal bronze.Certainly, can also select tin cream, also can select other metal or alloy alloys that are equal to.
Accordingly, based on same inventive concept, one embodiment of the invention provides a kind of circuit board, please refer to Figure 1A to Fig. 1 C, Fig. 3 A to Fig. 3 C, Fig. 4 A to Fig. 4 C, circuit board comprises: the first superimposed multilayer daughter board 100 and the second multilayer daughter board 200, and each multilayer daughter board comprises at least two sandwich circuit base materials; The first insulating barrier 104, is disposed on the first surface of the first multilayer daughter board 100; The second insulating barrier 203, be disposed at second of the second multilayer daughter board 200 upper, first surface is adjacent face with second, the second insulating barrier 203 contacts and is connected with the first insulating barrier 104; The first conducting block 103, is embedded in the first window 105 of the first insulating barrier 104 and is arranged on first surface; The second conducting block 202, is arranged at second and goes up and run through the second insulating barrier 203, and be electrically connected at the first conducting block 103, so that the first multilayer daughter board 100 and the second multilayer daughter board 200 are electrically connected.
Further, circuit board also comprises conductive layer, fuses in first window 105, and the second conducting block 202 fuses in conductive layer, is electrically connected with the first conducting block 103.
In one embodiment, conductive layer is leypewter, the temperature of the fusing point of conductive layer during lower than pressing the first multilayer daughter board 100 and the second multilayer daughter board 200.
In one embodiment, the first conducting block 103 is plate-like conducting block.
In another embodiment, the second conducting block 202 is taper projection or stud bumps.
In another embodiment, the first conducting block 103 is copper dish, and the second conducting block 202 is copper post.
The present invention compared with prior art, adopt on two adjacent multiple-plate adjacent two faces, one arranges the first conducting block, another arranges the second conducting block, make to be electrically connected by the first conducting block and the second conducting block on two multi-layer sheet, so the connection reliability of connected mode of the present invention is better, be not easy to occur the situation of Joint failure.
Further, also have a conductive layer on the first conducting block, the first conducting block and the second conducting block fuse in conductive layer and are electrically connected, so make the electric connection between the first conducting block and the second conducting block more reliable.
In this specification, the present invention is described with reference to its specific embodiment, and still, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if within of the present invention these are revised and modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and modification interior.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210427918.5A CN103796418B (en) | 2012-10-31 | 2012-10-31 | A kind of circuit board and the manufacture method of circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210427918.5A CN103796418B (en) | 2012-10-31 | 2012-10-31 | A kind of circuit board and the manufacture method of circuit board |
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| Publication Number | Publication Date |
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| CN103796418A true CN103796418A (en) | 2014-05-14 |
| CN103796418B CN103796418B (en) | 2016-12-21 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106973492A (en) * | 2017-03-07 | 2017-07-21 | 深南电路股份有限公司 | A kind of PCB internal layer circuits interconnection architecture and its processing method |
| CN107257603A (en) * | 2017-06-20 | 2017-10-17 | 广州兴森快捷电路科技有限公司 | The preparation method of hole articulamentum, the preparation method of wiring board and wiring board |
Citations (3)
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| CN101022698A (en) * | 2006-01-31 | 2007-08-22 | 索尼株式会社 | Printed circuit board assembly and method of manufacturing the same |
| JP2009059814A (en) * | 2007-08-30 | 2009-03-19 | Denso Corp | Manufacturing method of multilayer printed board |
| CN201571253U (en) * | 2009-10-22 | 2010-09-01 | 欣兴电子股份有限公司 | High-layer circuit board |
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2012
- 2012-10-31 CN CN201210427918.5A patent/CN103796418B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101022698A (en) * | 2006-01-31 | 2007-08-22 | 索尼株式会社 | Printed circuit board assembly and method of manufacturing the same |
| JP2009059814A (en) * | 2007-08-30 | 2009-03-19 | Denso Corp | Manufacturing method of multilayer printed board |
| CN201571253U (en) * | 2009-10-22 | 2010-09-01 | 欣兴电子股份有限公司 | High-layer circuit board |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106973492A (en) * | 2017-03-07 | 2017-07-21 | 深南电路股份有限公司 | A kind of PCB internal layer circuits interconnection architecture and its processing method |
| CN106973492B (en) * | 2017-03-07 | 2019-03-05 | 深南电路股份有限公司 | A kind of PCB internal layer circuit interconnection architecture and its processing method |
| CN107257603A (en) * | 2017-06-20 | 2017-10-17 | 广州兴森快捷电路科技有限公司 | The preparation method of hole articulamentum, the preparation method of wiring board and wiring board |
| CN107257603B (en) * | 2017-06-20 | 2019-11-08 | 广州兴森快捷电路科技有限公司 | The production method of hole articulamentum, the production method of wiring board and wiring board |
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| CN103796418B (en) | 2016-12-21 |
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Address after: 401332 Chongqing city Shapingba District No. 367 West Xi Yong Zhen Yong Lu Patentee after: CHONGQING FOUNDER HI-TECH ELECTRONIC Inc. Patentee after: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee after: PKU FOUNDER INFORMATION INDUSTRY GROUP CO.,LTD. Address before: 401332 Chongqing city Shapingba District No. 367 West Xi Yong Zhen Yong Lu Patentee before: CHONGQING FOUNDER HI-TECH ELECTRONIC Inc. Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: FOUNDER INFORMATION INDUSTRY HOLDINGS Co.,Ltd. |
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