CN103776471A - Magnetic encoder based on double synchronous rotation coordinate systems - Google Patents
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Abstract
本发明公开了一种基于双同步旋转坐标系的磁编码器,包括磁电信号发生器、信号调理器、信号采集模块和信号处理单元;由正向帕克变换器、反向帕克变换器、正向解耦器、反向解耦器、低通滤波器和运动信息解算器组成的信号处理单元用于对由信号采集模块输入的数字电信号进行坐标变换、解耦运算、滤波处理和运动信息解算。采用双同步坐标变换的信号处理单元同时对磁电信号中的基波正序和负序两个序分量进行坐标变换,将其分解成正序和负序dq坐标系下的分量,通过解耦网络和滤波环节,实现运动信息的解算,使得由于器件差异和安装误差等导致的信号畸变成分可以通过解耦器和滤波器加以消除,从而大大提高了本发明磁编码器的解算精度和抗干扰能力。
The invention discloses a magnetic encoder based on a double synchronous rotating coordinate system, which includes a magnetoelectric signal generator, a signal conditioner, a signal acquisition module and a signal processing unit; The signal processing unit composed of a decoupler, a reverse decoupler, a low-pass filter and a motion information solver is used to perform coordinate transformation, decoupling operation, filter processing and motion information on the digital electrical signal input by the signal acquisition module. information solution. The signal processing unit using double synchronous coordinate transformation performs coordinate transformation on the two sequence components of the fundamental wave in the magnetoelectric signal, the positive sequence and the negative sequence, and decomposes it into components under the positive sequence and negative sequence dq coordinate system, through the decoupling network and filtering links to realize the calculation of motion information, so that the signal distortion components caused by device differences and installation errors can be eliminated through decouplers and filters, thereby greatly improving the calculation accuracy and resistance of the magnetic encoder of the present invention. Interference ability.
Description
技术领域technical field
本发明属于运动信息检测传感器领域,更具体地,涉及一种基于双同步旋转坐标系的磁编码器。The invention belongs to the field of motion information detection sensors, and more specifically relates to a magnetic encoder based on a double synchronous rotating coordinate system.
背景技术Background technique
磁编码器是一种通过对磁性元件的运动信息进行解算以实现对运动速度和运动距离等运动信息进行测量和提取的传感器,其适用场合不受雾霭、烟尘和油污等因素的影响,其对安装误差和振动的敏感性也不如光电编码器强烈,而且其加工制作工艺简单、成本低廉、编码接口丰富灵活,是运动信息检测应用领域重要的发展方向。A magnetic encoder is a sensor that measures and extracts movement information such as movement speed and movement distance by solving the movement information of magnetic components. Its applicable occasions are not affected by factors such as fog, smoke and oil. The sensitivity to installation errors and vibrations is not as strong as that of photoelectric encoders, and its manufacturing process is simple, low in cost, and the encoding interface is rich and flexible. It is an important development direction in the field of motion information detection applications.
目前在研和在用的磁编码器信号解算方法主要有反正切运算解算法、标定查表法和角度跟踪锁相法等。反正切运算解算法一般采用数值逼近的方法实现反正切运算,通过反正切运算实现对运动信息解算。反正切运算解算法原理简单明晰,但对信号处理单元的运算性能要求较高,且其解算的精确度受磁性元件安放准确性影响大。标定查表法首先通过高精度的光电编码器对磁性元件的磁电信号进行离线标定制表并存储,磁编码器工作时根据磁电信号情况通过查事先存储的标定表对磁性元件的运动信息进行解算。标定查表法的解算思路清晰、解算速度快,但要求磁编码器具有一定容量的存储空间,而且其标定表制作复杂、工艺要求高。角度跟踪锁相法是一种闭环自跟踪的运动信息解算方法,具有较强的抗振动干扰能力,但常规的角度跟踪锁相法对元件性能差异和安装误差等因素导致的运动信息解算误差不具有自屏蔽能力。At present, the magnetic encoder signal solution methods under research and in use mainly include arctangent calculation solution algorithm, calibration look-up table method and angle tracking phase-locking method. The arctangent operation solution algorithm generally adopts the method of numerical approximation to realize the arctangent operation, and realizes the motion information solution through the arctangent operation. The principle of the arctangent calculation algorithm is simple and clear, but it has high requirements on the calculation performance of the signal processing unit, and the accuracy of the calculation is greatly affected by the accuracy of the placement of the magnetic components. Calibration look-up table method First, the magnetoelectric signal of the magnetic element is calibrated and stored offline through a high-precision photoelectric encoder. When the magnetic encoder is working, it checks the calibration table stored in advance to check the motion information of the magnetic element. to solve. The calculation method of the calibration look-up table method is clear and fast, but requires a certain storage space for the magnetic encoder, and the calibration table is complicated and requires high technology. The angle tracking phase-locking method is a closed-loop self-tracking motion information calculation method, which has strong anti-vibration interference ability. Errors are not self-shielding.
目前国内针对磁编码器运动信息解算方法的专利申请文件(公开号为CN102095431A)公开的磁编码器数字转换器。该申请文件默认假定原始磁电信号理想正交,从而没有考虑元件性能差异和安装误差等因素对运动信息解算造成的误差,所以其解算的精确度不可避免受磁编码器安装工艺水平和元件性能一致性水平的影响。At present, the domestic patent application document (publication number is CN102095431A) for the magnetic encoder motion information calculation method discloses the magnetic encoder digital converter. The application document assumes that the original magnetoelectric signal is ideally orthogonal by default, so it does not consider the error caused by factors such as component performance differences and installation errors to the motion information solution, so the accuracy of the solution is inevitably affected by the installation process level of the magnetic encoder and Influence on the level of uniformity of component performance.
发明内容Contents of the invention
针对现有技术的以上缺陷或改进需求,本发明提供了一种基于双同步旋转坐标系的磁编码器,其目的在于使得磁编码器的解算精确度不受器件差异和安装误差等因素影响,由此解决现有技术中磁编码器磁电信号的正交性或对称性必然受到各种误差因素的影响的技术问题。In view of the above defects or improvement needs of the prior art, the present invention provides a magnetic encoder based on a dual synchronous rotating coordinate system, the purpose of which is to make the calculation accuracy of the magnetic encoder not be affected by factors such as device differences and installation errors , thereby solving the technical problem in the prior art that the orthogonality or symmetry of the magnetoelectric signal of the magnetic encoder must be affected by various error factors.
本发明提供了一种基于双同步旋转坐标系的磁编码器,包括依次连接的磁电信号发生器、信号调理器、信号采集模块和信号处理单元;所述信号处理单元包括:正向帕克变换器、反向帕克变换器、正向解耦器、反向解耦器、第一低通滤波器、第二低通滤波器、第三低通滤波器、第四低通滤波器和运动信息解算器;所述磁电信号发生器用于将磁性元件的运动情况转换成包含运动信息的模拟电信号;所述信号调理器用于将所述模拟电信号进行调理和模拟滤波处理后输出与所述信号采集模块相匹配的信号;所述信号采集模块用于对所述信号调理器的输出进行模数转换并输出数字电信号;所述正向帕克变换器的输入端连接至所述信号采集模块的输出端,用于将所述数字电信号以恒幅值变换到以正向基波同步角速度ω旋转的dq+坐标系下,提取所述数字电信号中的基波正序分量幅值,同时分理出所述数字电信号中的基波负序分量两倍频波动分量;所述反向帕克变换器的输入端连接至所述信号采集模块的输出端,用于将所述数字电信号以恒幅值变换到以逆向基波同步角速度-ω旋转的dq-坐标系下,提取所述数字电信号中的基波负序分量幅值,同时分理出所述数字电信号中的基波正序分量两倍频波动分量;所述正向解耦器的输入端与所述正向帕克变换器的输出端连接;用于通过数字电信号基波负序分量的幅值反馈量以消除dq+坐标系下数字电信号中由基波负序分量引起的交流成分;所述反向解耦器的输入端与所述反向帕克变换器的输出端连接;用于通过数字电信号基波正序分量的幅值反馈量以消除dq-坐标系下数字电信号中由基波正序分量引起的交流成分;所述第一低通滤波器的输入端连接至所述正向解耦器的第一输出端,所述第一低通滤波器的输出端连接至所述反向解耦器的第一反馈端;用于滤除正向解耦器输出的dq+坐标系下基波正序分量的两倍频波动分量,得到dq+坐标系下基波正序分量幅值。所述第二低通滤波器的输入端连接至所述正向解耦器的第二输出端,所述第二低通滤波器的输出端连接至所述反向解耦器的第二反馈端,所述第二低通滤波器的输出端还作为数字电信号中基波正序分量幅值输出端;用于滤除正向解耦器输出的dq+坐标系下基波负序分量的两倍频波动分量,得到dq+坐标系下基波负序分量幅值;所述第三低通滤波器的输入端连接至所述反向解耦器的第一输出端,所述第三低通滤波器的输出端连接至所述正向解耦器的第一反馈端,所述第三低通滤波器的输出端还作为数字电信号中基波负序分量幅值输出端;用于滤除负向解耦器输出的dq-坐标系下基波正序分量的两倍频波动分量,得到dq-坐标系下基波正序分量幅值;所述第四低通滤波器的输入端连接至所述反向解耦器的第二输出端,所述第四低通滤波器的输出端连接至所述正向解耦器的第二反馈端,所述第四低通滤波器的输出端还作为数字电信号中基波负序分量幅值输出端;用于滤除负向解耦器输出的dq-坐标系下基波正序分量的两倍频波动分量,得到dq-坐标系下基波正序分量幅值;所述运动信息解算器的输入端连接至所述正向解耦器的第二输出端,用于对包含运动信息的数字电信号进行锁相,并对磁电信号发生器中磁性元件的运动距离和运动速度进行解算后输出磁元件运动的角速度和角度值 The invention provides a magnetic encoder based on a double synchronous rotating coordinate system, comprising a magnetoelectric signal generator, a signal conditioner, a signal acquisition module and a signal processing unit connected in sequence; the signal processing unit includes: forward Park transform Converter, Inverse Park Transformer, Forward Decoupler, Inverse Decoupler, First Low Pass Filter, Second Low Pass Filter, Third Low Pass Filter, Fourth Low Pass Filter and Motion Information Resolver; the magnetoelectric signal generator is used to convert the motion of the magnetic element into an analog electrical signal containing motion information; the signal conditioner is used to condition and analog filter the analog electrical signal and output it with the The signal that matches the signal acquisition module; the signal acquisition module is used to perform analog-to-digital conversion on the output of the signal conditioner and output a digital electrical signal; the input end of the forward park converter is connected to the signal acquisition The output terminal of the module is used to transform the digital electrical signal with a constant amplitude into a dq + coordinate system rotating at a positive fundamental synchronous angular velocity ω, and extract the amplitude of the fundamental positive sequence component in the digital electrical signal , and at the same time separate out the fundamental wave negative sequence component in the digital electrical signal and double the frequency fluctuation component; the input end of the reverse Park converter is connected to the output end of the signal acquisition module for converting the digital Transforming the electrical signal with a constant amplitude to a dq - coordinate system that rotates at the reverse fundamental synchronous angular velocity -ω, extracting the amplitude of the negative sequence component of the fundamental wave in the digital electrical signal, and simultaneously sorting out the The fundamental positive sequence component of the double frequency fluctuation component; the input terminal of the positive decoupler is connected to the output terminal of the forward Park converter; it is used for the amplitude feedback of the negative sequence component of the fundamental wave of the digital electrical signal amount to eliminate the AC component caused by the negative sequence component of the fundamental wave in the digital electrical signal under the dq + coordinate system; the input terminal of the reverse decoupler is connected with the output terminal of the reverse Park converter; it is used to pass the digital The magnitude feedback of the fundamental wave positive sequence component of the electric signal is to eliminate the AC component caused by the fundamental wave positive sequence component in the digital electric signal under the dq - coordinate system; the input end of the first low-pass filter is connected to the positive To the first output terminal of the decoupler, the output terminal of the first low-pass filter is connected to the first feedback terminal of the reverse decoupler; for filtering out the dq + coordinates of the forward decoupler output The double-frequency fluctuation component of the positive sequence component of the fundamental wave in the lower coordinate system is used to obtain the amplitude of the positive sequence component of the fundamental wave in the dq + coordinate system. The input end of the second low-pass filter is connected to the second output end of the forward decoupler, and the output end of the second low-pass filter is connected to the second feedback of the reverse decoupler Terminal, the output terminal of the second low-pass filter is also used as the amplitude output terminal of the fundamental positive sequence component in the digital electrical signal; it is used to filter out the negative sequence component of the fundamental wave under the dq + coordinate system output by the forward decoupler The double-frequency fluctuation component of the dq + coordinate system is obtained to obtain the magnitude of the negative sequence component of the fundamental wave; the input end of the third low-pass filter is connected to the first output end of the reverse decoupler, and the first output end of the first low-pass filter The output terminals of the three low-pass filters are connected to the first feedback terminal of the forward decoupler, and the output terminals of the third low-pass filter are also used as the amplitude output terminals of the fundamental negative sequence component in the digital electrical signal; It is used to filter out the double frequency fluctuation component of the fundamental wave positive sequence component under the dq - coordinate system output by the negative decoupler, and obtains the fundamental wave positive sequence component amplitude under the dq - coordinate system; the fourth low-pass filter The input terminal of is connected to the second output terminal of the reverse decoupler, the output terminal of the fourth low-pass filter is connected to the second feedback terminal of the forward decoupler, and the fourth low-pass filter The output terminal of the filter is also used as the amplitude output terminal of the negative sequence component of the fundamental wave in the digital electric signal; it is used to filter out the double frequency fluctuation component of the positive sequence component of the fundamental wave under the dq - coordinate system output by the negative decoupler, and obtain dq - the amplitude of the positive sequence component of the fundamental wave in the coordinate system; the input end of the motion information solver is connected to the second output end of the forward decoupler for locking the digital electrical signal containing motion information Phase, and calculate the moving distance and moving speed of the magnetic element in the magnetoelectric signal generator, and then output the angular velocity of the magnetic element movement and the angle value
其中,所述正向帕克变换器包括:第一余弦发生器、第二正弦发生器、第一乘法器、第二乘法器、第一加法器、第一反相器、第三乘法器、第四乘法器和第二加法器;所述第一余弦发生器的输入端用于接收输出角度估计值用于根据所述输出角度估计值输出余弦值所述第二正弦发生器的输入端用于接收输出角度估计值用于根据所述输出角度估计值输出正弦值所述第一乘法器的第一输入端连接所述信号采集模块输出的数字正弦Vs(j),所述第一乘法器的第二输入端连接至所述第一余弦发生器的第一输出端,用于将所述数字正弦Vs(j)和所述余弦值相乘;所述第二乘法器的第一输入端连接至所述第二正弦发生器的第一输出端,所述第二乘法器的第二输入端用于接收数字余弦Vc(j),用于将接收的数字余弦Vc(j)和所述正弦值相乘;所述第一加法器的第一输入端连接至所述第一乘法器的输出端,所述第二加法器的第二输入端连接至所述第二乘法器的输出端,用于将所述第一乘法器的输出量和所述第二乘法器的输出量相加得到dq+坐标系的d轴分量所述第一反相器的输入端连接至所述第二正弦发生器的第二输出端,用于将所述正弦值反相;所述第三乘法器的第一输入端用于接收数字正弦Vs(j),所述第三乘法器的第二输入端连接至所述第一反相器的输出端;用于将所述第一反相器的输出值和数字正弦信号Vs(j)相乘;所述第四乘法器的第一输入端连接至所述第一余弦发生器的第二输出端,所述第四乘法器的第二输入端连接所述信号采集模块输出的数字余弦信号Vc(j),用于将所述数字余弦信号Vc(j)和所述余弦值相乘;所述第二加法器的第一输入端连接至所述第三乘法器的输出端,所述第二加法器的第二输入端连接至所述第四乘法器的输出端,用于将第三乘法器的输出值和所述第四乘法器的输出值相加得到dq+坐标系的q轴分量值 Wherein, the forward Park converter includes: a first cosine generator, a second sine generator, a first multiplier, a second multiplier, a first adder, a first inverter, a third multiplier, a fourth multiplier and a second adder; an input of the first cosine generator for receiving an output angle estimate is used to output angle estimates based on the output cosine an input of the second sine generator for receiving an output angle estimate is used to output angle estimates based on the output sine The first input end of the first multiplier is connected to the digital sine V s (j) output by the signal acquisition module, and the second input end of the first multiplier is connected to the first cosine generator of the first cosine generator. an output terminal for converting said digital sine V s (j) and said cosine Multiply; the first input end of the second multiplier is connected to the first output end of the second sine generator, and the second input end of the second multiplier is used to receive the digital cosine V c (j) , for the received digital cosine V c (j) and the sine value multiplication; the first input end of the first adder is connected to the output end of the first multiplier, and the second input end of the second adder is connected to the output end of the second multiplier, with In adding the output of the first multiplier and the output of the second multiplier to obtain the d-axis component of the dq + coordinate system The input terminal of the first inverter is connected to the second output terminal of the second sine generator for converting the sine value Inversion; the first input of the third multiplier is used to receive the digital sine V s (j), and the second input of the third multiplier is connected to the output of the first inverter; multiplied by the output value of the first inverter and the digital sine signal V s (j); the first input end of the fourth multiplier is connected to the second output end of the first cosine generator , the second input terminal of the fourth multiplier is connected to the digital cosine signal V c (j) output by the signal acquisition module, for combining the digital cosine signal V c (j) and the cosine value multiplication; the first input end of the second adder is connected to the output end of the third multiplier, and the second input end of the second adder is connected to the output end of the fourth multiplier, using In adding the output value of the third multiplier and the output value of the fourth multiplier to obtain the q-axis component value of the dq + coordinate system
其中,所述反向帕克变换器包括第二余弦发生器、第二正弦发生器、第五乘法器、第六乘法器、第三加法器、第二反相器、第七乘法器、第八乘法器和第四加法器;所述第二余弦发生器的输入端用于接收输出角度估计值用于根据所述角度估计值输出余弦值所述第二正弦发生器的输入端用于接收输出角度估计值用于根据所述角度估计值输出正弦值所述第五乘法器的第一输入端连接至所述第一正弦发生器的输出端,所述第五乘法器的第二输入端连接所述信号采集模块输出的数字正弦Vs(j),用于将所述数字正弦Vs(j)和所述余弦值相乘;所述第二反相器的输入端连接至所述第二正弦发生器的输出端,用于将正弦值反相;所述第六乘法器的第一输入端连接所述信号采集模块输出的数字余弦Vc(j),所述第六乘法器的第二输入端与所述第二反相器的输出端连接,用于将所述数字余弦Vc(j)和所述第二反相器输出值相乘;所述第三加法器的第一输入端连接至所述第五乘法器的输出端,所述第三加法器的第二输入端连接至所述第六乘法器的输出端,用于将所述第五乘法器的输出值和所述第六乘法器的输出值相加得到dq-坐标系的d轴分量所述第七乘法器的第一输入端连接所述信号采集模块输出的数字正弦Vs(j),所述第七乘法器的第二输入端连接至所述第二正弦发生器的输出端,用于将正弦值和数字正弦Vs(j)相乘;所述第八乘法器的第一输入端连接至所述第二余弦发生器的输出端,所述第八乘法器的第二输入端连接所述信号采集模块输出的数字余弦Vc(j),用于将所述数字余弦Vc(j)和所述余弦值相乘;所述第四加法器的第一输入端连接至所述第七乘法器的输出端,所述第四加法器的第二输入端连接至所述第八乘法器的输出端,用于将第七乘法器的输出值和第八乘法器输出值相加得到dq-坐标系的q轴分量 Wherein, the reverse Park converter includes a second cosine generator, a second sine generator, a fifth multiplier, a sixth multiplier, a third adder, a second inverter, a seventh multiplier, a second eight multipliers and a fourth adder; the input of the second cosine generator for receiving an output angle estimate for estimating values based on the angle output cosine an input of the second sine generator for receiving an output angle estimate for estimating values based on the angle output sine The first input of the fifth multiplier is connected to the output of the first sine generator, and the second input of the fifth multiplier is connected to the digital sine V s (j) output by the signal acquisition module. , for converting the digital sine V s (j) and the cosine multiplication; the input end of the second inverter is connected to the output end of the second sine generator for converting the sine value Inversion; the first input terminal of the sixth multiplier is connected to the digital cosine V c (j) output by the signal acquisition module, and the second input terminal of the sixth multiplier is connected to the second inverter of the second inverter The output terminal is connected to multiply the digital cosine V c (j) and the output value of the second inverter; the first input terminal of the third adder is connected to the output of the fifth multiplier end, the second input end of the third adder is connected to the output end of the sixth multiplier, for adding the output value of the fifth multiplier and the output value of the sixth multiplier to obtain dq - the d-axis component of the coordinate system The first input of the seventh multiplier is connected to the digital sine V s (j) output by the signal acquisition module, and the second input of the seventh multiplier is connected to the output of the second sine generator , for the sine value and digital sine V s (j); the first input of the eighth multiplier is connected to the output of the second cosine generator, and the second input of the eighth multiplier is connected to the The digital cosine V c (j) output by the signal acquisition module is used to combine the digital cosine V c (j) and the cosine value multiplication; the first input end of the fourth adder is connected to the output end of the seventh multiplier, and the second input end of the fourth adder is connected to the output end of the eighth multiplier, using To add the output value of the seventh multiplier and the output value of the eighth multiplier to obtain the q-axis component of the dq - coordinate system
其中,所述正向解耦器包括第九乘法器、第三正弦发生器、第三余弦发生器、第十乘法器、第十一乘法器、第五加法器、第一减法器、第十二乘法器、第十三乘法器、第二减法器和第六加法器;所述第九乘法器第一输入端为角度估计值第二输入端为系数2,用于将角度估计值与系数2相乘;所述第三正弦发生器的输入端用于接收第九乘法器的输出端,用于产生第九乘法器输出量的正弦值第三余弦发生器输入端用于接收第九乘法器的输出端,用于产生第九乘法器输出量的余弦值所述第十乘法器第一输入端连接至第三余弦发生器的输出端,第二输入端连接至第三低通滤波器输出端,用于将余弦值和第三低通滤波器输出值相乘;所述第十一乘法器第一输入端连接至第三正弦发生器输出端,第二输入端连接至第三低通滤波器输出端,用于将正弦值和第四通滤波器输出值相乘;所述第五加法器第一输入端连接至将第十乘法器的输出端,第二输入端连接至第十一乘法器输出端,用于将第十乘法器的输出量和第十一乘法器输出量相加;所述第一减法器第一输入端连接至dq+坐标系的d轴输出端,第二输入端连接至第五加法器输出端,用于将dq+坐标系的d轴分量与第五加法器输出量相减,得到正向解耦器的输出值第十二乘法器第一输入端连接至第三低通滤波器输出端,第二输入端连接至第三正弦发生器输出端,用于将第三低通滤波器输出值和正弦值相乘;第十三乘法器第一输入端连接至第四通滤波器输出端,第二输入端连接至第三余弦发生器输出端,用于将第四通滤波器输出值与余弦值相乘;第二减法器第一输入端连接至第十二乘法器输出端,第二输入端连接至第十三乘法器输出端,用于将第十二乘法器输出值和第十三乘法器输出值相减;第六加法器第一输入端连接至第二减法器输出端,第二输入端连接至dq+坐标系的q轴分量输出端,用于将第二减法器输出值和dq+坐标系的q轴分量相加得到正向解耦器的输出值 Wherein, the forward decoupler includes a ninth multiplier, a third sine generator, a third cosine generator, a tenth multiplier, an eleventh multiplier, a fifth adder, a first subtractor, a Twelve multipliers, a thirteenth multiplier, a second subtractor and a sixth adder; the first input of the ninth multiplier is an angle estimate The second input is the
其中,所述反向解耦器包括第十四乘法器、第四正弦发生器、第四余弦发生器、第十五乘法器、第十六乘法器、第七加法器、第三减法器、第十七乘法器、第十八乘法器、第四减法器和第八加法器;所述第十四乘法器第一输入端连接至角度估计值第二输入端连接至系数2,用于将输出角度估计值与系数2相乘;所述第四正弦发生器输入端连接至第十四乘法器输出端,用于产生第十四乘法器输出值的正弦值所述第四余弦发生器输入端连接至第十四乘法器输出端,用于产生第十四乘法器输出值的余弦值所述第十五乘法器第一输入端连接至第四余弦发生器输出端,第二输入端连接至第一低通滤波器输出端,用于将余弦值和第一低通滤波器输出值相乘;所述第十六乘法器第一输入端连接至第四正弦发生器输出端,第二输入端连接至第二低通滤波器输出端,用于将正弦值和第二低通滤波器输出值相乘;所述第三减法器第一输入端连接至第十六乘法器输出端,第二输入端连接至第十五乘法器的输出端,用于将第十六乘法器输出值和第十五乘法器的输出值相减;所述第七加法器第一输入端连接至dq-坐标系的d轴分量输出端,第二输入端连接至第三减法器的输出端,用于将dq-坐标系的d轴分量与第三减法器的输出值相加,得到反向解耦器的输出值所述第十七乘法器第一输入端连接至第一低通滤波器输出端,第二输入端连接至第四正弦发生器输出端,用于将第一低通滤波器输出值和正弦值相乘;所述第十八乘法器第一输入端连接至第二低通滤波器输出端,第二输入端连接至第四余弦发生器输出端,用于将第二低通滤波器输出值与余弦值相乘;所述第八加法器第一输入端连接至第十七乘法器的输出端,第二输入端连接至第十八乘法器的输出端,用于将第十七乘法器的输出量和第十八乘法器的输出量相加;所述第四减法器第一输入端连接至dq-坐标系的q轴分量输出端,第二输入端连接至第八加法器的输出端,用于将dq-坐标系的q轴分量与第八加法器的输出量相减,得到反向解耦器输出值 Wherein, the reverse decoupler includes a fourteenth multiplier, a fourth sine generator, a fourth cosine generator, a fifteenth multiplier, a sixteenth multiplier, a seventh adder, and a third subtractor , the seventeenth multiplier, the eighteenth multiplier, the fourth subtractor and the eighth adder; the first input of the fourteenth multiplier is connected to the angle estimate The second input is connected to
其中,所述第一低通滤波器、所述第二低通滤波器、所述第三低通滤波器和所述第四低通滤波器结构相同;所述第一低通滤波器包括第十九乘法器、第九加法器、第二十乘法器和第一存储器;所述第十九乘法器第一输入端连接至正向解耦器输出端,第二输入端连接至采样周期T和滤波截止频率ωf乘积T*ωf,用于将正向解耦器输出值和采样周期T和滤波截止频率ωf乘积T*ωf相乘;所述第九加法器第一输入端连接至第十九乘法器输出端,第二输入端连接至第一存储器输出端,用于将第十九乘法器输出值和第一存储器存储的第一低通滤波器输出值的前一时刻的值相加;第二十乘法器第一输入端连接至第九加法器输出端,第二输入端连接至(1+T*ωf)的倒数,用于将第九加法器输出值和(1+T*ωf)的倒数相乘,得到第一低通滤波器输出值 Wherein, the structure of the first low-pass filter, the second low-pass filter, the third low-pass filter and the fourth low-pass filter is the same; the first low-pass filter includes the first low-pass filter Nineteen multipliers, the ninth adder, the twentieth multiplier and the first memory; the first input of the nineteenth multiplier is connected to the output of the forward decoupler, and the second input is connected to the sampling period T and the filter cut-off frequency ω f product T*ω f , which is used to convert the output value of the forward decoupler Multiplied with the sampling period T and the filter cut-off frequency ωf product T* ωf ; the first input terminal of the ninth adder is connected to the output terminal of the nineteenth multiplier, and the second input terminal is connected to the output terminal of the first memory, Used to store the nineteenth multiplier output value and the value of the previous moment of the first low-pass filter output value stored in the first memory Addition; the first input end of the twentieth multiplier is connected to the output end of the ninth adder, and the second input end is connected to the reciprocal of (1+T*ω f ), used to add the output value of the ninth adder to (1 +T*ω f ) multiplied by the reciprocal to get the output value of the first low-pass filter
其中,所述运动信息解算器包括PI调节器和积分器;PI调节器包括第二十一乘法器、第二十二乘法器、第五减法器、第十加法器、第十一加法器、第二存储器和第三存储器;所述积分器包括第二十三乘法器、第十二加法器、和第四存储器;所述第二十一乘法器第一输入端连接至正向解耦器输出端,第二输入端连接至比例系数KP,用于将正向解耦器输出值比例系数KP相乘;所述第五减法器第一输入端连接至系数KI*T,第二输入端连接至系数KP,用于将KI*T与KP相减;所述第二十二乘法器第一输入端连接至第二存储器的输出端,第二输入端连接至第二十一乘法器输出端,用于将第二存储器存储的正向解耦器输出值的前一时刻的值)与第二十一乘法器输出量相乘;所述第十加法器第一输入端连接至第二十一乘法器输出端,第二输入端连接至第二十二乘法器输出端,用于将第二十一乘法器输出值和第二十二乘法器输出值相加;所述第十一加法器第一输入端连接至第三存储器输出端,第二输入端连接至第十加法器输出端,用于将第三存储器存储的前一时刻角速度值ω(j-1)与第十加法器输出值相加,输出角速度值ω(j);所述第二十三乘法器第一输入端连接至系数KI*T,第二输入端连接至第三存储器输出端,用于将第三存储器存储的前一时刻角速度值ω(j-1)与KI*T相乘;所述第十二加法器第一输入端连接至第二十三乘法器输出端,第二输入端连接至第四存储器输出端,用于将第二十三乘法器输出值与第四存储器存储前一时刻角度值相加,得到角度值 Wherein, the motion information solver includes a PI regulator and an integrator; the PI regulator includes a twenty-first multiplier, a twenty-second multiplier, a fifth subtractor, a tenth adder, and an eleventh adder , a second memory and a third memory; the integrator includes a twenty-third multiplier, a twelfth adder, and a fourth memory; the first input of the twenty-first multiplier is connected to the positive decoupling The output terminal of the decoupler, the second input terminal is connected to the proportional coefficient K P , which is used to convert the output value of the positive decoupler The proportional coefficient K P is multiplied; the first input end of the fifth subtractor is connected to the coefficient K I *T, and the second input end is connected to the coefficient K P for subtracting K I *T and K P ; The first input end of the twenty-second multiplier is connected to the output end of the second memory, and the second input end is connected to the output end of the twenty-first multiplier, for storing the positive decoupler output value of the second memory value at the previous moment ) is multiplied with the output of the twenty-first multiplier; the first input end of the tenth adder is connected to the output end of the twenty-first multiplier, and the second input end is connected to the output end of the twenty-second multiplier, using Adding the output value of the twenty-first multiplier and the output value of the twenty-second multiplier; the first input terminal of the eleventh adder is connected to the third memory output terminal, and the second input terminal is connected to the tenth addition The output terminal of the device is used to add the angular velocity value ω(j-1) at the previous moment stored in the third memory to the output value of the tenth adder, and output the angular velocity value ω(j); the second multiplier of the twenty-third multiplier One input end is connected to the coefficient K I * T, and the second input end is connected to the output end of the third memory, for the angular velocity value ω (j-1) of the previous moment stored in the third memory and multiplied by K I * T; The first input end of the twelfth adder is connected to the output end of the twenty-third multiplier, and the second input end is connected to the output end of the fourth memory, for storing the output value of the twenty-third multiplier with the fourth memory Angle value at the previous moment Add up to get the angle value
本发明采用采用双同步坐标变换的信号处理单元同时对磁电信号中的基波正序和负序两个序分量进行坐标变换,将其分解成正序和负序dq坐标系下的分量,通过解耦网络和滤波环节,实现运动信息的解算,使得由于器件差异和安装误差等导致的信号畸变成分可以通过解耦器和滤波器加以消除,从而大大提高了磁编码器的解算精度和抗干扰能力。The present invention adopts the signal processing unit adopting double synchronous coordinate transformation to carry out coordinate transformation to the two sequence components of the fundamental wave positive sequence and negative sequence in the magnetoelectric signal at the same time, decompose it into the component under the dq coordinate system of positive sequence and negative sequence, through The decoupling network and filtering links realize the calculation of motion information, so that the signal distortion components caused by device differences and installation errors can be eliminated through decouplers and filters, thus greatly improving the calculation accuracy and accuracy of magnetic encoders. Anti-interference ability.
附图说明Description of drawings
图1为本发明实施例提供的基于双同步旋转坐标系的磁编码器的结构原理示意图;FIG. 1 is a schematic diagram of the structure and principle of a magnetic encoder based on a dual synchronous rotating coordinate system provided by an embodiment of the present invention;
图2为本发明实施例提供的基于双同步旋转坐标系的磁编码器中信号采集模块的原理框图;2 is a functional block diagram of a signal acquisition module in a magnetic encoder based on a dual synchronous rotating coordinate system provided by an embodiment of the present invention;
图3为本发明实施例提供的信号处理单元中正向帕克变换器的原理框图;Fig. 3 is the functional block diagram of the forward Park converter in the signal processing unit provided by the embodiment of the present invention;
图4为本发明实施例提供的信号处理单元中反向帕克变换器原理框图;Fig. 4 is the functional block diagram of the reverse Park converter in the signal processing unit provided by the embodiment of the present invention;
图5为本发明实施例提供的信号处理单元中正向解耦器原理框图;5 is a functional block diagram of the forward decoupler in the signal processing unit provided by the embodiment of the present invention;
图6为本发明实施例提供的信号处理单元中反向解耦器原理框图;6 is a functional block diagram of a reverse decoupler in a signal processing unit provided by an embodiment of the present invention;
图7为本发明实施例提供的信号处理单元中低通滤波器的原理框图;其中图7(a)为第一低通滤波器,图7(b)为第二低通滤波器,图7(c)为第三低通滤波器,图7(d)为第四低通滤波器;Fig. 7 is the functional block diagram of the low-pass filter in the signal processing unit that the embodiment of the present invention provides; Wherein Fig. 7 (a) is the first low-pass filter, Fig. 7 (b) is the second low-pass filter, Fig. 7 (c) is the 3rd low-pass filter, and Fig. 7 (d) is the 4th low-pass filter;
图8为本发明实施例提供的信号处理单元中运动信息解算器的原理框图。Fig. 8 is a functional block diagram of a motion information solver in a signal processing unit provided by an embodiment of the present invention.
具体实施方式Detailed ways
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。此外,下面所描述的本发明各个实施方式中所涉及到的技术特征只要彼此之间未构成冲突就可以相互组合。In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.
本发明具体涉及了一种对磁电传感器(霍尔传感器或磁阻传感器)的输出信号进行解算编码,并可以应用于伺服控制和随动控制领域的磁编码器。The invention specifically relates to a magnetic encoder which can solve and encode the output signal of a magnetoelectric sensor (Hall sensor or magnetoresistive sensor), and can be applied to the fields of servo control and follow-up control.
本发明提供了一种解算精确度不受器件差异和安装误差等因素影响的新型磁编码器。目前国内在研和在用的磁编码器大多基于理想两路正交(或四路差分正交)或三路对称(或六路差分对称)的磁电信号进行运动信息解算。但由于安装误差和元件性能差别等因素的客观存在,所以现实中磁编码器磁电信号的正交性或对称性必然受到各种误差因素的影响。本发明采用双同步坐标变换结算方法,分别提取对磁编码器磁电信号中的基波正序分量和基波负序分量的幅值和两倍频的波动分量,使得由于器件差异和安装误差等导致的信号畸变成分可以通过解耦器和滤波器加以消除,从而大大提高了磁编码器的解算精度和抗干扰能力。The invention provides a novel magnetic encoder whose calculation accuracy is not affected by factors such as component differences and installation errors. At present, most of the magnetic encoders under research and in use in China are based on ideal two-way quadrature (or four-way differential quadrature) or three-way symmetrical (or six-way differential symmetrical) magnetoelectric signals for motion information calculation. However, due to the objective existence of factors such as installation errors and component performance differences, the orthogonality or symmetry of the magnetoelectric signals of magnetic encoders in reality must be affected by various error factors. The present invention adopts the dual synchronous coordinate transformation settlement method to extract the amplitudes of the fundamental positive sequence component and the fundamental negative sequence component in the magnetoelectric signal of the magnetic encoder and the fluctuation component of twice the frequency, so that due to device differences and installation errors The signal distortion components caused by such as can be eliminated by decouplers and filters, thus greatly improving the solution accuracy and anti-interference ability of the magnetic encoder.
总体而言,通过本发明所构思的以上技术方案与现有技术相比,解算精确度不受器件差异和安装误差等因素影响,提高了磁编码器对运动信息解算的精确度。Generally speaking, compared with the prior art, the above technical solution conceived by the present invention is not affected by factors such as device differences and installation errors, and improves the accuracy of the magnetic encoder for motion information calculation.
本发明可以对两路正交(或四路差分正交)或三路对称(或六路差分对称)的磁电信号进行运动信息解算。以下以两路正交信号为例对本发明进行举例说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。此外,下面所描述的本发明各个实施方式中所涉及到的技术特征只要彼此之间未构成冲突就可以相互组合。结合附图及实施例对本发明的目的、技术方案及优点详细说明如下。The present invention can solve the motion information for two-way orthogonal (or four-way differential orthogonal) or three-way symmetrical (or six-way differentially symmetrical) magnetoelectric signals. The present invention will be described below by taking two orthogonal signals as an example. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other. The purpose, technical solutions and advantages of the present invention are described in detail as follows in conjunction with the accompanying drawings and embodiments.
本发明公开了一种可用于运动信息检测的新型磁编码器,其包括依次连接的磁电信号发生器1、信号调理器2、信号采集模块3和信号处理单元几个部分。磁电信号发生器1用于将磁性元件的运动情况转换成包含运动信息的模拟电信号。信号调理器2将磁电信号发生器1输出的模拟电信号进行调理和模拟滤波处理,使之能够匹配信号采集模块的输入要求。信号采集模块3由A/D转换器构成。A/D转换器用于将信号调理器2输出的模拟正弦信号Vs(t)、模拟余弦信号Vc(t)进行模数转换,输出数字正弦信号Vs(j)和数字余弦信号Vc(j)。由正向帕克变换器4、反向帕克变换器5、正向解耦器6、反向解耦器7、低通滤波器8和运动信息解算器9组成的信号处理单元,用于对由信号采集模块输入的数字电信号进行坐标变换、解耦运算、滤波处理和运动信息解算。The invention discloses a novel magnetic encoder that can be used for motion information detection, which includes a
正向帕克变换器4由第一余弦发生器41、第二正弦发生器42、第一乘法器43、第二乘法器44、第一加法器45、第一反相器46、第三乘法器47、第四乘法器48、第二加法器49组成。第一余弦发生器41用于产生输出角度估计值的余弦值第二正弦发生器42用于产生输出角度估计值的正弦值第一乘法器43将接收的数字正弦Vs(j)和余弦值相乘,第二乘法器44将接收的数字余弦Vc(j)和正弦值相乘,第一加法器45将第一乘法器43的输出量和第二乘法器44的输出量相加得到dq+坐标系的d轴分量第一反相器46将正弦值反相,第三乘法器47将反相器46的输出值和数字正弦信号Vs(j)相乘,第四乘法器48将数字余弦信号Vc(j)和余弦值相乘,第二加法器49将第三乘法器47的输出值和第四乘法器48的输出值相加得到dq+坐标系的q轴分量值 The forward Park converter 4 is composed of the
反向帕克变换器5由第二余弦发生器51、第二正弦发生器52、第五乘法器53、第六乘法器54、第三加法器55、第二反相器56、第七乘法器57、第八乘法器58、第四加法器59组成。第二余弦发生器51用于产生角度估计值的余弦值第二正弦发生器52用于产生角度估计值的正弦值第五乘法器53将接收的数字正弦Vs(j)和余弦值相乘,第二反相器56将正弦值反相,第六乘法器54将接收的数字余弦Vc(j)和第二反相器56输出值相乘,第三加法器55将第五乘法器53的输出值和第六乘法器54的输出值相加得到dq-坐标系的d轴分量第七乘法器57将正弦值和数字正弦Vs(j)相乘,第八乘法器58将数字余弦Vc(j)和余弦值相乘,第四加法器59将第七乘法器57的输出值和第八乘法器58输出值相加得到dq-坐标系的q轴分量 Inverse Park converter 5 is composed of second cosine generator 51, second sine generator 52, fifth multiplier 53, sixth multiplier 54, third adder 55, second inverter 56, seventh multiplier device 57, the eighth multiplier 58, and the fourth adder 59. The second cosine generator 51 is used to generate the angle estimate cosine of The second sine generator 52 is used to generate the angle estimate the sine of The fifth multiplier 53 will receive the digital sine V s (j) and the cosine value multiplied, the second inverter 56 converts the sine value Inversion, the sixth multiplier 54 multiplies the received digital cosine V c (j) and the output value of the second inverter 56, and the third adder 55 multiplies the output value of the fifth multiplier 53 and the sixth multiplier 54 Adding the output values of dq - the d-axis component of the coordinate system The seventh multiplier 57 converts the sine value and the digital sine V s (j) are multiplied, and the eighth multiplier 58 converts the digital cosine V c (j) and the cosine value multiplication, the fourth adder 59 adds the output value of the seventh multiplier 57 and the output value of the eighth multiplier 58 to obtain the q-axis component of the dq - coordinate system
正向解耦器6由第九乘法器601、第三正弦发生器602、第三余弦发生器603、第十乘法器604、第十一乘法器605、第五加法器606、第一减法器607、第十二乘法器608、第十三乘法器609、第二减法器610、第六加法器611组成。第九乘法器601将角度估计值与系数2相乘,第三正弦发生器602用于产生第九乘法器输出量的正弦值第三余弦发生器603用于产生第九乘法器输出量的余弦值第十乘法器604将余弦值和第三低通滤波器输出值相乘,第十一乘法器605将正弦值和第四通滤波器输出值相乘,第五加法器606将第十乘法器604的输出量和第十一乘法器605输出量相加,第一减法器607将dq+坐标系的d轴分量与第五加法器606输出量相减,得到正向解耦器的输出值第十二乘法器608将第三低通滤波器输出值和正弦值相乘,第十三乘法器609将第四通滤波器输出值与余弦值相乘,第二减法器610将第十二乘法器608输出值和第十三乘法器609输出值相减,第六加法器611将第二减法器610输出值和dq+坐标系的q轴分量相加得到正向解耦器的输出值
反向解耦器7由第十四乘法器701、第四正弦发生器702、第四余弦发生器703、第十五乘法器704、第十六乘法器705、第七加法器706、第三减法器707、第十七乘法器708、第十八乘法器709、第四减法器710、第八加法器711组成。第十四乘法器701将输出角度估计值与系数2相乘,第四正弦发生器702用于产生第十四乘法器701输出值的正弦值第四余弦发生器703用于产生第十四乘法器701输出值的余弦值第十五乘法器704将余弦值和第一低通滤波器输出值相乘,第十六乘法器705将正弦值和第二低通滤波器输出值相乘,第三减法器707将第十六乘法器705输出值和第十五乘法器704的输出值相减,第七加法器706将dq-坐标系的d轴分量与第三减法器707的输出值相加,得到反向解耦器的输出值第十七乘法器708将第一低通滤波器输出值和正弦值相乘,第十八乘法器709将第二低通滤波器输出值与余弦值相乘,第八加法器711将第第十七乘法器708的输出量和第十八乘法器709的输出量相加,第四减法器710将dq-坐标系的q轴分量与第八加法器711的输出量相减,得到反向解耦器输出值 The
低通滤波器8由四个相同的第一低通滤波器801、第二低通滤波器802、第三低通滤波器803、第四低通滤波器804组成,每个滤波器由第十九乘法器81、第九加法器82、第二十乘法器83、第一存储器84组成。其中,第一低通滤波器801包括第十九乘法器81将正向解耦器输出值和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器81输出值和第一存储器84存储的第一低通滤波器输出值的前一时刻的值相加,第二十乘法器83将第九加法器82输出值和(1+T*ωf)的倒数相乘,得到第一低通滤波器输出值 Low-pass filter 8 is made up of four identical first low-
第二低通滤波器802包括第十九乘法器81将正向解耦器输出值和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器输出值和第一存储存储器84存储的第二低通滤波器输出值的前一时刻的值相加,第二十乘法器83将第九加法器输出值和(1+T*ωf)的倒数相乘,得到第二低通滤波器输出值 The second low-
第三低通滤波器803包括第十九乘法器81将反向解耦器输出值和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器81输出值和第一存储器84存储的第三低通滤波器输出值的前一时刻的值相加,第二十乘法器83将第九加法器82输出值和(1+T*ωf)的倒数相乘,得到第三低通滤波器输出值 The third low-
第四低通滤波器804包括第十九乘法器81将反向解耦器输出值和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器81输出值和第一存储器84存储的第四低通滤波器输出值的前一时刻的值相加,第二十乘法器83将第九加法器82输出值和(1+T*ωf)的倒数相乘,得到第四低通滤波器输出值 The fourth low-
运动信息解算器9由PI调节器91和积分器92组成。其中PI调节器91由第二十一乘法器910、第二十二乘法器911、第五减法器912、第十加法器913、第十一加法器914、第二存储器915、第三存储器916组成。The motion information solver 9 is composed of a PI regulator 91 and an integrator 92 . Wherein the PI regulator 91 is composed of the twenty-
积分器92由第二十三乘法器920、第十二加法器921、第四存储器922组成。第二十一乘法器910将正向解耦器输出值比例系数KP相乘,第五减法器912将KI*T与KP相减,第二十二乘法器911将第二存储器915存储的正向解耦器的输出值的前一时刻的值)与第二十一乘法器910输出量相乘,第十加法器913将第二十一乘法器910输出值和第二十二乘法器911输出值相加,第十一加法器914将第三存储器916存储的前一时刻角速度值ω(j-1)与第十加法器913输出值相加,输出角速度值ω(j)。第二十三乘法器920将前一时刻角速度值ω(j-1)与KI*T相乘,第十二加法器921将第二十三乘法器920与第四存储器922存储前一时刻角度值相加,得到角度值 The integrator 92 is composed of a twenty-
本发明实施例提供的磁编码器可以对磁电信号发生器输出两相、三相或者六相信号进行处理。本例以两相信号输出为例说明但不局限于两相信号。其中,正向帕克变换器4的输出满足:和反向帕克变换器5的输出满足:
在本发明实施例中,针对三相输入信号的情形;假设三相输入信号分别为Va、Vb、Vc则此时的正向帕克变换器4的输出满足:In the embodiment of the present invention, for the case of three-phase input signals; assuming that the three-phase input signals are V a , V b , and V c respectively, then the output of the forward park converter 4 at this time satisfies:
则此时的反向帕克变换器5的输出满足:Then the output of the inverse Park converter 5 at this time satisfies:
其余部分完全相同,在此不再赘述。The rest are exactly the same and will not be repeated here.
在本发明实施例中,为便于比较本发明实施例和传统解调方法的精度和速度,进行了仿真实验。假设磁电信号发生器输出Vs(t)=Ke*sin(100*t)、Vc(t)=0.8*Kecos(100*t),即余弦信号幅值是正弦信号幅值的0.8倍。仿真结果显示,本发明在极短时间内即可实现解算角度值对实际角度值的跟踪锁定,解算角速度等于信号实际角速度100rad/s,解算结果不受幅值差别的影响。In the embodiment of the present invention, in order to compare the accuracy and speed of the embodiment of the present invention and the traditional demodulation method, a simulation experiment is carried out. Suppose the magnetoelectric signal generator outputs V s (t)=K e *sin(100*t), V c (t)=0.8*K e cos(100*t), that is, the cosine signal amplitude is the sine signal amplitude 0.8 times. The simulation results show that the present invention can track and lock the calculated angle value to the actual angle value in a very short time, the calculated angular velocity is equal to the actual angular velocity of the signal 100rad/s, and the calculated result is not affected by the amplitude difference.
若磁电信号发生器输出Vs(t)=Kesin(100*t)、Vc(t)=0.8*Kecos(100*t+10°),即此时余弦信号滞后正弦信号10°。仿真结果显示,本发明仍然可以在较短时间内实现解算角速度等于实际角速度100rad/s,但解算角度值受相位偏差影响出现一个恒定偏差,因此可以根据试验测试很容易进行补偿。If the magnetoelectric signal generator outputs V s (t)=K e sin(100*t), V c (t)=0.8*K e cos(100*t+10°), that is, the cosine signal lags the
本领域的技术人员容易理解,以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。Those skilled in the art can easily understand that the above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention, All should be included within the protection scope of the present invention.
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