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CN103776471A - Magnetic encoder based on double synchronous rotation coordinate systems - Google Patents

Magnetic encoder based on double synchronous rotation coordinate systems Download PDF

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CN103776471A
CN103776471A CN201410042188.6A CN201410042188A CN103776471A CN 103776471 A CN103776471 A CN 103776471A CN 201410042188 A CN201410042188 A CN 201410042188A CN 103776471 A CN103776471 A CN 103776471A
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杨凯
谢鸿钦
刘羊
魏续彪
张莹砾
杨星星
朱成
鲁大岱
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Huazhong University of Science and Technology
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Abstract

本发明公开了一种基于双同步旋转坐标系的磁编码器,包括磁电信号发生器、信号调理器、信号采集模块和信号处理单元;由正向帕克变换器、反向帕克变换器、正向解耦器、反向解耦器、低通滤波器和运动信息解算器组成的信号处理单元用于对由信号采集模块输入的数字电信号进行坐标变换、解耦运算、滤波处理和运动信息解算。采用双同步坐标变换的信号处理单元同时对磁电信号中的基波正序和负序两个序分量进行坐标变换,将其分解成正序和负序dq坐标系下的分量,通过解耦网络和滤波环节,实现运动信息的解算,使得由于器件差异和安装误差等导致的信号畸变成分可以通过解耦器和滤波器加以消除,从而大大提高了本发明磁编码器的解算精度和抗干扰能力。

The invention discloses a magnetic encoder based on a double synchronous rotating coordinate system, which includes a magnetoelectric signal generator, a signal conditioner, a signal acquisition module and a signal processing unit; The signal processing unit composed of a decoupler, a reverse decoupler, a low-pass filter and a motion information solver is used to perform coordinate transformation, decoupling operation, filter processing and motion information on the digital electrical signal input by the signal acquisition module. information solution. The signal processing unit using double synchronous coordinate transformation performs coordinate transformation on the two sequence components of the fundamental wave in the magnetoelectric signal, the positive sequence and the negative sequence, and decomposes it into components under the positive sequence and negative sequence dq coordinate system, through the decoupling network and filtering links to realize the calculation of motion information, so that the signal distortion components caused by device differences and installation errors can be eliminated through decouplers and filters, thereby greatly improving the calculation accuracy and resistance of the magnetic encoder of the present invention. Interference ability.

Description

一种基于双同步旋转坐标系的磁编码器A Magnetic Encoder Based on Double Synchronous Rotating Coordinate System

技术领域technical field

本发明属于运动信息检测传感器领域,更具体地,涉及一种基于双同步旋转坐标系的磁编码器。The invention belongs to the field of motion information detection sensors, and more specifically relates to a magnetic encoder based on a double synchronous rotating coordinate system.

背景技术Background technique

磁编码器是一种通过对磁性元件的运动信息进行解算以实现对运动速度和运动距离等运动信息进行测量和提取的传感器,其适用场合不受雾霭、烟尘和油污等因素的影响,其对安装误差和振动的敏感性也不如光电编码器强烈,而且其加工制作工艺简单、成本低廉、编码接口丰富灵活,是运动信息检测应用领域重要的发展方向。A magnetic encoder is a sensor that measures and extracts movement information such as movement speed and movement distance by solving the movement information of magnetic components. Its applicable occasions are not affected by factors such as fog, smoke and oil. The sensitivity to installation errors and vibrations is not as strong as that of photoelectric encoders, and its manufacturing process is simple, low in cost, and the encoding interface is rich and flexible. It is an important development direction in the field of motion information detection applications.

目前在研和在用的磁编码器信号解算方法主要有反正切运算解算法、标定查表法和角度跟踪锁相法等。反正切运算解算法一般采用数值逼近的方法实现反正切运算,通过反正切运算实现对运动信息解算。反正切运算解算法原理简单明晰,但对信号处理单元的运算性能要求较高,且其解算的精确度受磁性元件安放准确性影响大。标定查表法首先通过高精度的光电编码器对磁性元件的磁电信号进行离线标定制表并存储,磁编码器工作时根据磁电信号情况通过查事先存储的标定表对磁性元件的运动信息进行解算。标定查表法的解算思路清晰、解算速度快,但要求磁编码器具有一定容量的存储空间,而且其标定表制作复杂、工艺要求高。角度跟踪锁相法是一种闭环自跟踪的运动信息解算方法,具有较强的抗振动干扰能力,但常规的角度跟踪锁相法对元件性能差异和安装误差等因素导致的运动信息解算误差不具有自屏蔽能力。At present, the magnetic encoder signal solution methods under research and in use mainly include arctangent calculation solution algorithm, calibration look-up table method and angle tracking phase-locking method. The arctangent operation solution algorithm generally adopts the method of numerical approximation to realize the arctangent operation, and realizes the motion information solution through the arctangent operation. The principle of the arctangent calculation algorithm is simple and clear, but it has high requirements on the calculation performance of the signal processing unit, and the accuracy of the calculation is greatly affected by the accuracy of the placement of the magnetic components. Calibration look-up table method First, the magnetoelectric signal of the magnetic element is calibrated and stored offline through a high-precision photoelectric encoder. When the magnetic encoder is working, it checks the calibration table stored in advance to check the motion information of the magnetic element. to solve. The calculation method of the calibration look-up table method is clear and fast, but requires a certain storage space for the magnetic encoder, and the calibration table is complicated and requires high technology. The angle tracking phase-locking method is a closed-loop self-tracking motion information calculation method, which has strong anti-vibration interference ability. Errors are not self-shielding.

目前国内针对磁编码器运动信息解算方法的专利申请文件(公开号为CN102095431A)公开的磁编码器数字转换器。该申请文件默认假定原始磁电信号理想正交,从而没有考虑元件性能差异和安装误差等因素对运动信息解算造成的误差,所以其解算的精确度不可避免受磁编码器安装工艺水平和元件性能一致性水平的影响。At present, the domestic patent application document (publication number is CN102095431A) for the magnetic encoder motion information calculation method discloses the magnetic encoder digital converter. The application document assumes that the original magnetoelectric signal is ideally orthogonal by default, so it does not consider the error caused by factors such as component performance differences and installation errors to the motion information solution, so the accuracy of the solution is inevitably affected by the installation process level of the magnetic encoder and Influence on the level of uniformity of component performance.

发明内容Contents of the invention

针对现有技术的以上缺陷或改进需求,本发明提供了一种基于双同步旋转坐标系的磁编码器,其目的在于使得磁编码器的解算精确度不受器件差异和安装误差等因素影响,由此解决现有技术中磁编码器磁电信号的正交性或对称性必然受到各种误差因素的影响的技术问题。In view of the above defects or improvement needs of the prior art, the present invention provides a magnetic encoder based on a dual synchronous rotating coordinate system, the purpose of which is to make the calculation accuracy of the magnetic encoder not be affected by factors such as device differences and installation errors , thereby solving the technical problem in the prior art that the orthogonality or symmetry of the magnetoelectric signal of the magnetic encoder must be affected by various error factors.

本发明提供了一种基于双同步旋转坐标系的磁编码器,包括依次连接的磁电信号发生器、信号调理器、信号采集模块和信号处理单元;所述信号处理单元包括:正向帕克变换器、反向帕克变换器、正向解耦器、反向解耦器、第一低通滤波器、第二低通滤波器、第三低通滤波器、第四低通滤波器和运动信息解算器;所述磁电信号发生器用于将磁性元件的运动情况转换成包含运动信息的模拟电信号;所述信号调理器用于将所述模拟电信号进行调理和模拟滤波处理后输出与所述信号采集模块相匹配的信号;所述信号采集模块用于对所述信号调理器的输出进行模数转换并输出数字电信号;所述正向帕克变换器的输入端连接至所述信号采集模块的输出端,用于将所述数字电信号以恒幅值变换到以正向基波同步角速度ω旋转的dq+坐标系下,提取所述数字电信号中的基波正序分量幅值,同时分理出所述数字电信号中的基波负序分量两倍频波动分量;所述反向帕克变换器的输入端连接至所述信号采集模块的输出端,用于将所述数字电信号以恒幅值变换到以逆向基波同步角速度-ω旋转的dq-坐标系下,提取所述数字电信号中的基波负序分量幅值,同时分理出所述数字电信号中的基波正序分量两倍频波动分量;所述正向解耦器的输入端与所述正向帕克变换器的输出端连接;用于通过数字电信号基波负序分量的幅值反馈量以消除dq+坐标系下数字电信号中由基波负序分量引起的交流成分;所述反向解耦器的输入端与所述反向帕克变换器的输出端连接;用于通过数字电信号基波正序分量的幅值反馈量以消除dq-坐标系下数字电信号中由基波正序分量引起的交流成分;所述第一低通滤波器的输入端连接至所述正向解耦器的第一输出端,所述第一低通滤波器的输出端连接至所述反向解耦器的第一反馈端;用于滤除正向解耦器输出的dq+坐标系下基波正序分量的两倍频波动分量,得到dq+坐标系下基波正序分量幅值。所述第二低通滤波器的输入端连接至所述正向解耦器的第二输出端,所述第二低通滤波器的输出端连接至所述反向解耦器的第二反馈端,所述第二低通滤波器的输出端还作为数字电信号中基波正序分量幅值输出端;用于滤除正向解耦器输出的dq+坐标系下基波负序分量的两倍频波动分量,得到dq+坐标系下基波负序分量幅值;所述第三低通滤波器的输入端连接至所述反向解耦器的第一输出端,所述第三低通滤波器的输出端连接至所述正向解耦器的第一反馈端,所述第三低通滤波器的输出端还作为数字电信号中基波负序分量幅值输出端;用于滤除负向解耦器输出的dq-坐标系下基波正序分量的两倍频波动分量,得到dq-坐标系下基波正序分量幅值;所述第四低通滤波器的输入端连接至所述反向解耦器的第二输出端,所述第四低通滤波器的输出端连接至所述正向解耦器的第二反馈端,所述第四低通滤波器的输出端还作为数字电信号中基波负序分量幅值输出端;用于滤除负向解耦器输出的dq-坐标系下基波正序分量的两倍频波动分量,得到dq-坐标系下基波正序分量幅值;所述运动信息解算器的输入端连接至所述正向解耦器的第二输出端,用于对包含运动信息的数字电信号进行锁相,并对磁电信号发生器中磁性元件的运动距离和运动速度进行解算后输出磁元件运动的角速度

Figure BDA0000463448260000031
和角度值
Figure BDA0000463448260000032
The invention provides a magnetic encoder based on a double synchronous rotating coordinate system, comprising a magnetoelectric signal generator, a signal conditioner, a signal acquisition module and a signal processing unit connected in sequence; the signal processing unit includes: forward Park transform Converter, Inverse Park Transformer, Forward Decoupler, Inverse Decoupler, First Low Pass Filter, Second Low Pass Filter, Third Low Pass Filter, Fourth Low Pass Filter and Motion Information Resolver; the magnetoelectric signal generator is used to convert the motion of the magnetic element into an analog electrical signal containing motion information; the signal conditioner is used to condition and analog filter the analog electrical signal and output it with the The signal that matches the signal acquisition module; the signal acquisition module is used to perform analog-to-digital conversion on the output of the signal conditioner and output a digital electrical signal; the input end of the forward park converter is connected to the signal acquisition The output terminal of the module is used to transform the digital electrical signal with a constant amplitude into a dq + coordinate system rotating at a positive fundamental synchronous angular velocity ω, and extract the amplitude of the fundamental positive sequence component in the digital electrical signal , and at the same time separate out the fundamental wave negative sequence component in the digital electrical signal and double the frequency fluctuation component; the input end of the reverse Park converter is connected to the output end of the signal acquisition module for converting the digital Transforming the electrical signal with a constant amplitude to a dq - coordinate system that rotates at the reverse fundamental synchronous angular velocity -ω, extracting the amplitude of the negative sequence component of the fundamental wave in the digital electrical signal, and simultaneously sorting out the The fundamental positive sequence component of the double frequency fluctuation component; the input terminal of the positive decoupler is connected to the output terminal of the forward Park converter; it is used for the amplitude feedback of the negative sequence component of the fundamental wave of the digital electrical signal amount to eliminate the AC component caused by the negative sequence component of the fundamental wave in the digital electrical signal under the dq + coordinate system; the input terminal of the reverse decoupler is connected with the output terminal of the reverse Park converter; it is used to pass the digital The magnitude feedback of the fundamental wave positive sequence component of the electric signal is to eliminate the AC component caused by the fundamental wave positive sequence component in the digital electric signal under the dq - coordinate system; the input end of the first low-pass filter is connected to the positive To the first output terminal of the decoupler, the output terminal of the first low-pass filter is connected to the first feedback terminal of the reverse decoupler; for filtering out the dq + coordinates of the forward decoupler output The double-frequency fluctuation component of the positive sequence component of the fundamental wave in the lower coordinate system is used to obtain the amplitude of the positive sequence component of the fundamental wave in the dq + coordinate system. The input end of the second low-pass filter is connected to the second output end of the forward decoupler, and the output end of the second low-pass filter is connected to the second feedback of the reverse decoupler Terminal, the output terminal of the second low-pass filter is also used as the amplitude output terminal of the fundamental positive sequence component in the digital electrical signal; it is used to filter out the negative sequence component of the fundamental wave under the dq + coordinate system output by the forward decoupler The double-frequency fluctuation component of the dq + coordinate system is obtained to obtain the magnitude of the negative sequence component of the fundamental wave; the input end of the third low-pass filter is connected to the first output end of the reverse decoupler, and the first output end of the first low-pass filter The output terminals of the three low-pass filters are connected to the first feedback terminal of the forward decoupler, and the output terminals of the third low-pass filter are also used as the amplitude output terminals of the fundamental negative sequence component in the digital electrical signal; It is used to filter out the double frequency fluctuation component of the fundamental wave positive sequence component under the dq - coordinate system output by the negative decoupler, and obtains the fundamental wave positive sequence component amplitude under the dq - coordinate system; the fourth low-pass filter The input terminal of is connected to the second output terminal of the reverse decoupler, the output terminal of the fourth low-pass filter is connected to the second feedback terminal of the forward decoupler, and the fourth low-pass filter The output terminal of the filter is also used as the amplitude output terminal of the negative sequence component of the fundamental wave in the digital electric signal; it is used to filter out the double frequency fluctuation component of the positive sequence component of the fundamental wave under the dq - coordinate system output by the negative decoupler, and obtain dq - the amplitude of the positive sequence component of the fundamental wave in the coordinate system; the input end of the motion information solver is connected to the second output end of the forward decoupler for locking the digital electrical signal containing motion information Phase, and calculate the moving distance and moving speed of the magnetic element in the magnetoelectric signal generator, and then output the angular velocity of the magnetic element movement
Figure BDA0000463448260000031
and the angle value
Figure BDA0000463448260000032

其中,所述正向帕克变换器包括:第一余弦发生器、第二正弦发生器、第一乘法器、第二乘法器、第一加法器、第一反相器、第三乘法器、第四乘法器和第二加法器;所述第一余弦发生器的输入端用于接收输出角度估计值

Figure BDA0000463448260000041
用于根据所述输出角度估计值
Figure BDA0000463448260000042
输出余弦值
Figure BDA0000463448260000043
所述第二正弦发生器的输入端用于接收输出角度估计值
Figure BDA0000463448260000044
用于根据所述输出角度估计值
Figure BDA0000463448260000045
输出正弦值所述第一乘法器的第一输入端连接所述信号采集模块输出的数字正弦Vs(j),所述第一乘法器的第二输入端连接至所述第一余弦发生器的第一输出端,用于将所述数字正弦Vs(j)和所述余弦值
Figure BDA0000463448260000047
相乘;所述第二乘法器的第一输入端连接至所述第二正弦发生器的第一输出端,所述第二乘法器的第二输入端用于接收数字余弦Vc(j),用于将接收的数字余弦Vc(j)和所述正弦值
Figure BDA0000463448260000048
相乘;所述第一加法器的第一输入端连接至所述第一乘法器的输出端,所述第二加法器的第二输入端连接至所述第二乘法器的输出端,用于将所述第一乘法器的输出量和所述第二乘法器的输出量相加得到dq+坐标系的d轴分量
Figure BDA0000463448260000049
所述第一反相器的输入端连接至所述第二正弦发生器的第二输出端,用于将所述正弦值
Figure BDA00004634482600000410
反相;所述第三乘法器的第一输入端用于接收数字正弦Vs(j),所述第三乘法器的第二输入端连接至所述第一反相器的输出端;用于将所述第一反相器的输出值和数字正弦信号Vs(j)相乘;所述第四乘法器的第一输入端连接至所述第一余弦发生器的第二输出端,所述第四乘法器的第二输入端连接所述信号采集模块输出的数字余弦信号Vc(j),用于将所述数字余弦信号Vc(j)和所述余弦值
Figure BDA00004634482600000411
相乘;所述第二加法器的第一输入端连接至所述第三乘法器的输出端,所述第二加法器的第二输入端连接至所述第四乘法器的输出端,用于将第三乘法器的输出值和所述第四乘法器的输出值相加得到dq+坐标系的q轴分量值
Figure BDA00004634482600000412
Wherein, the forward Park converter includes: a first cosine generator, a second sine generator, a first multiplier, a second multiplier, a first adder, a first inverter, a third multiplier, a fourth multiplier and a second adder; an input of the first cosine generator for receiving an output angle estimate
Figure BDA0000463448260000041
is used to output angle estimates based on the
Figure BDA0000463448260000042
output cosine
Figure BDA0000463448260000043
an input of the second sine generator for receiving an output angle estimate
Figure BDA0000463448260000044
is used to output angle estimates based on the
Figure BDA0000463448260000045
output sine The first input end of the first multiplier is connected to the digital sine V s (j) output by the signal acquisition module, and the second input end of the first multiplier is connected to the first cosine generator of the first cosine generator. an output terminal for converting said digital sine V s (j) and said cosine
Figure BDA0000463448260000047
Multiply; the first input end of the second multiplier is connected to the first output end of the second sine generator, and the second input end of the second multiplier is used to receive the digital cosine V c (j) , for the received digital cosine V c (j) and the sine value
Figure BDA0000463448260000048
multiplication; the first input end of the first adder is connected to the output end of the first multiplier, and the second input end of the second adder is connected to the output end of the second multiplier, with In adding the output of the first multiplier and the output of the second multiplier to obtain the d-axis component of the dq + coordinate system
Figure BDA0000463448260000049
The input terminal of the first inverter is connected to the second output terminal of the second sine generator for converting the sine value
Figure BDA00004634482600000410
Inversion; the first input of the third multiplier is used to receive the digital sine V s (j), and the second input of the third multiplier is connected to the output of the first inverter; multiplied by the output value of the first inverter and the digital sine signal V s (j); the first input end of the fourth multiplier is connected to the second output end of the first cosine generator , the second input terminal of the fourth multiplier is connected to the digital cosine signal V c (j) output by the signal acquisition module, for combining the digital cosine signal V c (j) and the cosine value
Figure BDA00004634482600000411
multiplication; the first input end of the second adder is connected to the output end of the third multiplier, and the second input end of the second adder is connected to the output end of the fourth multiplier, using In adding the output value of the third multiplier and the output value of the fourth multiplier to obtain the q-axis component value of the dq + coordinate system
Figure BDA00004634482600000412

其中,所述反向帕克变换器包括第二余弦发生器、第二正弦发生器、第五乘法器、第六乘法器、第三加法器、第二反相器、第七乘法器、第八乘法器和第四加法器;所述第二余弦发生器的输入端用于接收输出角度估计值

Figure BDA0000463448260000051
用于根据所述角度估计值
Figure BDA0000463448260000052
输出余弦值所述第二正弦发生器的输入端用于接收输出角度估计值用于根据所述角度估计值
Figure BDA0000463448260000055
输出正弦值
Figure BDA0000463448260000056
所述第五乘法器的第一输入端连接至所述第一正弦发生器的输出端,所述第五乘法器的第二输入端连接所述信号采集模块输出的数字正弦Vs(j),用于将所述数字正弦Vs(j)和所述余弦值
Figure BDA0000463448260000057
相乘;所述第二反相器的输入端连接至所述第二正弦发生器的输出端,用于将正弦值
Figure BDA0000463448260000058
反相;所述第六乘法器的第一输入端连接所述信号采集模块输出的数字余弦Vc(j),所述第六乘法器的第二输入端与所述第二反相器的输出端连接,用于将所述数字余弦Vc(j)和所述第二反相器输出值相乘;所述第三加法器的第一输入端连接至所述第五乘法器的输出端,所述第三加法器的第二输入端连接至所述第六乘法器的输出端,用于将所述第五乘法器的输出值和所述第六乘法器的输出值相加得到dq-坐标系的d轴分量
Figure BDA0000463448260000059
所述第七乘法器的第一输入端连接所述信号采集模块输出的数字正弦Vs(j),所述第七乘法器的第二输入端连接至所述第二正弦发生器的输出端,用于将正弦值
Figure BDA00004634482600000510
和数字正弦Vs(j)相乘;所述第八乘法器的第一输入端连接至所述第二余弦发生器的输出端,所述第八乘法器的第二输入端连接所述信号采集模块输出的数字余弦Vc(j),用于将所述数字余弦Vc(j)和所述余弦值
Figure BDA00004634482600000511
相乘;所述第四加法器的第一输入端连接至所述第七乘法器的输出端,所述第四加法器的第二输入端连接至所述第八乘法器的输出端,用于将第七乘法器的输出值和第八乘法器输出值相加得到dq-坐标系的q轴分量 Wherein, the reverse Park converter includes a second cosine generator, a second sine generator, a fifth multiplier, a sixth multiplier, a third adder, a second inverter, a seventh multiplier, a second eight multipliers and a fourth adder; the input of the second cosine generator for receiving an output angle estimate
Figure BDA0000463448260000051
for estimating values based on the angle
Figure BDA0000463448260000052
output cosine an input of the second sine generator for receiving an output angle estimate for estimating values based on the angle
Figure BDA0000463448260000055
output sine
Figure BDA0000463448260000056
The first input of the fifth multiplier is connected to the output of the first sine generator, and the second input of the fifth multiplier is connected to the digital sine V s (j) output by the signal acquisition module. , for converting the digital sine V s (j) and the cosine
Figure BDA0000463448260000057
multiplication; the input end of the second inverter is connected to the output end of the second sine generator for converting the sine value
Figure BDA0000463448260000058
Inversion; the first input terminal of the sixth multiplier is connected to the digital cosine V c (j) output by the signal acquisition module, and the second input terminal of the sixth multiplier is connected to the second inverter of the second inverter The output terminal is connected to multiply the digital cosine V c (j) and the output value of the second inverter; the first input terminal of the third adder is connected to the output of the fifth multiplier end, the second input end of the third adder is connected to the output end of the sixth multiplier, for adding the output value of the fifth multiplier and the output value of the sixth multiplier to obtain dq - the d-axis component of the coordinate system
Figure BDA0000463448260000059
The first input of the seventh multiplier is connected to the digital sine V s (j) output by the signal acquisition module, and the second input of the seventh multiplier is connected to the output of the second sine generator , for the sine value
Figure BDA00004634482600000510
and digital sine V s (j); the first input of the eighth multiplier is connected to the output of the second cosine generator, and the second input of the eighth multiplier is connected to the The digital cosine V c (j) output by the signal acquisition module is used to combine the digital cosine V c (j) and the cosine value
Figure BDA00004634482600000511
multiplication; the first input end of the fourth adder is connected to the output end of the seventh multiplier, and the second input end of the fourth adder is connected to the output end of the eighth multiplier, using To add the output value of the seventh multiplier and the output value of the eighth multiplier to obtain the q-axis component of the dq - coordinate system

其中,所述正向解耦器包括第九乘法器、第三正弦发生器、第三余弦发生器、第十乘法器、第十一乘法器、第五加法器、第一减法器、第十二乘法器、第十三乘法器、第二减法器和第六加法器;所述第九乘法器第一输入端为角度估计值

Figure BDA0000463448260000061
第二输入端为系数2,用于将角度估计值
Figure BDA0000463448260000062
与系数2相乘;所述第三正弦发生器的输入端用于接收第九乘法器的输出端,用于产生第九乘法器输出量的正弦值
Figure BDA0000463448260000063
第三余弦发生器输入端用于接收第九乘法器的输出端,用于产生第九乘法器输出量的余弦值
Figure BDA0000463448260000064
所述第十乘法器第一输入端连接至第三余弦发生器的输出端,第二输入端连接至第三低通滤波器输出端,用于将余弦值
Figure BDA0000463448260000065
和第三低通滤波器输出值
Figure BDA0000463448260000066
相乘;所述第十一乘法器第一输入端连接至第三正弦发生器输出端,第二输入端连接至第三低通滤波器输出端,用于将正弦值和第四通滤波器输出值
Figure BDA0000463448260000068
相乘;所述第五加法器第一输入端连接至将第十乘法器的输出端,第二输入端连接至第十一乘法器输出端,用于将第十乘法器的输出量和第十一乘法器输出量相加;所述第一减法器第一输入端连接至dq+坐标系的d轴输出端,第二输入端连接至第五加法器输出端,用于将dq+坐标系的d轴分量
Figure BDA0000463448260000069
与第五加法器输出量相减,得到正向解耦器的输出值
Figure BDA00004634482600000610
第十二乘法器第一输入端连接至第三低通滤波器输出端,第二输入端连接至第三正弦发生器输出端,用于将第三低通滤波器输出值
Figure BDA00004634482600000611
和正弦值相乘;第十三乘法器第一输入端连接至第四通滤波器输出端,第二输入端连接至第三余弦发生器输出端,用于将第四通滤波器输出值与余弦值
Figure BDA00004634482600000614
相乘;第二减法器第一输入端连接至第十二乘法器输出端,第二输入端连接至第十三乘法器输出端,用于将第十二乘法器输出值和第十三乘法器输出值相减;第六加法器第一输入端连接至第二减法器输出端,第二输入端连接至dq+坐标系的q轴分量输出端,用于将第二减法器输出值和dq+坐标系的q轴分量
Figure BDA00004634482600000615
相加得到正向解耦器的输出值
Figure BDA00004634482600000616
Wherein, the forward decoupler includes a ninth multiplier, a third sine generator, a third cosine generator, a tenth multiplier, an eleventh multiplier, a fifth adder, a first subtractor, a Twelve multipliers, a thirteenth multiplier, a second subtractor and a sixth adder; the first input of the ninth multiplier is an angle estimate
Figure BDA0000463448260000061
The second input is the coefficient 2, which is used to convert the angle estimate
Figure BDA0000463448260000062
Multiplied by coefficient 2; the input terminal of the third sine generator is used to receive the output terminal of the ninth multiplier, and is used to generate the sine value of the output of the ninth multiplier
Figure BDA0000463448260000063
The input end of the third cosine generator is used to receive the output end of the ninth multiplier, and is used to generate the cosine value of the output quantity of the ninth multiplier
Figure BDA0000463448260000064
The first input terminal of the tenth multiplier is connected to the output terminal of the third cosine generator, and the second input terminal is connected to the output terminal of the third low-pass filter for converting the cosine value
Figure BDA0000463448260000065
and the third low-pass filter output value
Figure BDA0000463448260000066
multiplication; the first input terminal of the eleventh multiplier is connected to the output terminal of the third sine generator, and the second input terminal is connected to the output terminal of the third low-pass filter for converting the sine value and the fourth-pass filter output value
Figure BDA0000463448260000068
multiplication; the first input end of the fifth adder is connected to the output end of the tenth multiplier, and the second input end is connected to the output end of the eleventh multiplier, for the output of the tenth multiplier and the output of the tenth multiplier The outputs of the eleven multipliers are added; the first input end of the first subtractor is connected to the d-axis output end of the dq + coordinate system, and the second input end is connected to the output end of the fifth adder for converting dq + coordinates d-axis component of the system
Figure BDA0000463448260000069
Subtract it from the output of the fifth adder to get the output value of the forward decoupler
Figure BDA00004634482600000610
The first input end of the twelfth multiplier is connected to the output end of the third low-pass filter, and the second input end is connected to the output end of the third sine generator, for the output value of the third low-pass filter
Figure BDA00004634482600000611
and the sine Multiply; the first input end of the thirteenth multiplier is connected to the output end of the fourth pass filter, and the second input end is connected to the output end of the third cosine generator for converting the output value of the fourth pass filter and cosine
Figure BDA00004634482600000614
multiplication; the first input end of the second subtractor is connected to the output end of the twelfth multiplier, and the second input end is connected to the output end of the thirteenth multiplier, for the output value of the twelfth multiplier and the thirteenth multiplier The first input end of the sixth adder is connected to the output end of the second subtractor, and the second input end is connected to the q-axis component output end of the dq + coordinate system, which is used to combine the output value of the second subtractor with the output value of the second subtractor dq + the q-axis component of the coordinate system
Figure BDA00004634482600000615
Adding to get the output value of the forward decoupler
Figure BDA00004634482600000616

其中,所述反向解耦器包括第十四乘法器、第四正弦发生器、第四余弦发生器、第十五乘法器、第十六乘法器、第七加法器、第三减法器、第十七乘法器、第十八乘法器、第四减法器和第八加法器;所述第十四乘法器第一输入端连接至角度估计值

Figure BDA0000463448260000071
第二输入端连接至系数2,用于将输出角度估计值
Figure BDA0000463448260000072
与系数2相乘;所述第四正弦发生器输入端连接至第十四乘法器输出端,用于产生第十四乘法器输出值的正弦值所述第四余弦发生器输入端连接至第十四乘法器输出端,用于产生第十四乘法器输出值的余弦值
Figure BDA0000463448260000074
所述第十五乘法器第一输入端连接至第四余弦发生器输出端,第二输入端连接至第一低通滤波器输出端,用于将余弦值
Figure BDA0000463448260000075
和第一低通滤波器输出值
Figure BDA0000463448260000076
相乘;所述第十六乘法器第一输入端连接至第四正弦发生器输出端,第二输入端连接至第二低通滤波器输出端,用于将正弦值
Figure BDA0000463448260000077
和第二低通滤波器输出值
Figure BDA0000463448260000078
相乘;所述第三减法器第一输入端连接至第十六乘法器输出端,第二输入端连接至第十五乘法器的输出端,用于将第十六乘法器输出值和第十五乘法器的输出值相减;所述第七加法器第一输入端连接至dq-坐标系的d轴分量输出端,第二输入端连接至第三减法器的输出端,用于将dq-坐标系的d轴分量
Figure BDA0000463448260000079
与第三减法器的输出值相加,得到反向解耦器的输出值
Figure BDA00004634482600000710
所述第十七乘法器第一输入端连接至第一低通滤波器输出端,第二输入端连接至第四正弦发生器输出端,用于将第一低通滤波器输出值
Figure BDA00004634482600000711
和正弦值
Figure BDA00004634482600000712
相乘;所述第十八乘法器第一输入端连接至第二低通滤波器输出端,第二输入端连接至第四余弦发生器输出端,用于将第二低通滤波器输出值
Figure BDA00004634482600000713
与余弦值
Figure BDA00004634482600000714
相乘;所述第八加法器第一输入端连接至第十七乘法器的输出端,第二输入端连接至第十八乘法器的输出端,用于将第十七乘法器的输出量和第十八乘法器的输出量相加;所述第四减法器第一输入端连接至dq-坐标系的q轴分量输出端,第二输入端连接至第八加法器的输出端,用于将dq-坐标系的q轴分量
Figure BDA0000463448260000081
与第八加法器的输出量相减,得到反向解耦器输出值
Figure BDA0000463448260000082
Wherein, the reverse decoupler includes a fourteenth multiplier, a fourth sine generator, a fourth cosine generator, a fifteenth multiplier, a sixteenth multiplier, a seventh adder, and a third subtractor , the seventeenth multiplier, the eighteenth multiplier, the fourth subtractor and the eighth adder; the first input of the fourteenth multiplier is connected to the angle estimate
Figure BDA0000463448260000071
The second input is connected to Coefficient 2 for converting the output angle estimate
Figure BDA0000463448260000072
multiplied by a factor of 2; the input of the fourth sine generator is connected to the output of the fourteenth multiplier for generating the sine of the output value of the fourteenth multiplier The input end of the fourth cosine generator is connected to the output end of the fourteenth multiplier for generating the cosine value of the output value of the fourteenth multiplier
Figure BDA0000463448260000074
The first input end of the fifteenth multiplier is connected to the output end of the fourth cosine generator, and the second input end is connected to the output end of the first low-pass filter for converting the cosine value
Figure BDA0000463448260000075
and the first low-pass filter output value
Figure BDA0000463448260000076
multiplication; the first input end of the sixteenth multiplier is connected to the output end of the fourth sine generator, and the second input end is connected to the output end of the second low-pass filter for converting the sine value
Figure BDA0000463448260000077
and the second low-pass filter output value
Figure BDA0000463448260000078
multiplication; the first input end of the third subtractor is connected to the output end of the sixteenth multiplier, and the second input end is connected to the output end of the fifteenth multiplier, for combining the output value of the sixteenth multiplier with the output value of the sixteenth multiplier The output values of the fifteen multipliers are subtracted; the first input of the seventh adder is connected to the d-axis component output of the dq - coordinate system, and the second input is connected to the output of the third subtractor for dq - the d-axis component of the coordinate system
Figure BDA0000463448260000079
Add the output value of the third subtractor to get the output value of the reverse decoupler
Figure BDA00004634482600000710
The first input terminal of the seventeenth multiplier is connected to the output terminal of the first low-pass filter, and the second input terminal is connected to the output terminal of the fourth sine generator for converting the output value of the first low-pass filter
Figure BDA00004634482600000711
and the sine
Figure BDA00004634482600000712
multiplication; the first input end of the eighteenth multiplier is connected to the output end of the second low-pass filter, and the second input end is connected to the output end of the fourth cosine generator for outputting the second low-pass filter value
Figure BDA00004634482600000713
and cosine
Figure BDA00004634482600000714
multiplication; the first input end of the eighth adder is connected to the output end of the seventeenth multiplier, and the second input end is connected to the output end of the eighteenth multiplier, for the output of the seventeenth multiplier and the output of the eighteenth multiplier are added; the first input end of the fourth subtractor is connected to the q-axis component output end of the dq - coordinate system, and the second input end is connected to the output end of the eighth adder, with q-axis component of the dq - coordinate system
Figure BDA0000463448260000081
Subtract it from the output of the eighth adder to get the output value of the reverse decoupler
Figure BDA0000463448260000082

其中,所述第一低通滤波器、所述第二低通滤波器、所述第三低通滤波器和所述第四低通滤波器结构相同;所述第一低通滤波器包括第十九乘法器、第九加法器、第二十乘法器和第一存储器;所述第十九乘法器第一输入端连接至正向解耦器输出端,第二输入端连接至采样周期T和滤波截止频率ωf乘积T*ωf,用于将正向解耦器输出值和采样周期T和滤波截止频率ωf乘积T*ωf相乘;所述第九加法器第一输入端连接至第十九乘法器输出端,第二输入端连接至第一存储器输出端,用于将第十九乘法器输出值和第一存储器存储的第一低通滤波器输出值的前一时刻的值相加;第二十乘法器第一输入端连接至第九加法器输出端,第二输入端连接至(1+T*ωf)的倒数,用于将第九加法器输出值和(1+T*ωf)的倒数相乘,得到第一低通滤波器输出值

Figure BDA0000463448260000085
Wherein, the structure of the first low-pass filter, the second low-pass filter, the third low-pass filter and the fourth low-pass filter is the same; the first low-pass filter includes the first low-pass filter Nineteen multipliers, the ninth adder, the twentieth multiplier and the first memory; the first input of the nineteenth multiplier is connected to the output of the forward decoupler, and the second input is connected to the sampling period T and the filter cut-off frequency ω f product T*ω f , which is used to convert the output value of the forward decoupler Multiplied with the sampling period T and the filter cut-off frequency ωf product T* ωf ; the first input terminal of the ninth adder is connected to the output terminal of the nineteenth multiplier, and the second input terminal is connected to the output terminal of the first memory, Used to store the nineteenth multiplier output value and the value of the previous moment of the first low-pass filter output value stored in the first memory Addition; the first input end of the twentieth multiplier is connected to the output end of the ninth adder, and the second input end is connected to the reciprocal of (1+T*ω f ), used to add the output value of the ninth adder to (1 +T*ω f ) multiplied by the reciprocal to get the output value of the first low-pass filter
Figure BDA0000463448260000085

其中,所述运动信息解算器包括PI调节器和积分器;PI调节器包括第二十一乘法器、第二十二乘法器、第五减法器、第十加法器、第十一加法器、第二存储器和第三存储器;所述积分器包括第二十三乘法器、第十二加法器、和第四存储器;所述第二十一乘法器第一输入端连接至正向解耦器输出端,第二输入端连接至比例系数KP,用于将正向解耦器输出值

Figure BDA0000463448260000086
比例系数KP相乘;所述第五减法器第一输入端连接至系数KI*T,第二输入端连接至系数KP,用于将KI*T与KP相减;所述第二十二乘法器第一输入端连接至第二存储器的输出端,第二输入端连接至第二十一乘法器输出端,用于将第二存储器存储的正向解耦器输出值的前一时刻的值
Figure BDA0000463448260000087
)与第二十一乘法器输出量相乘;所述第十加法器第一输入端连接至第二十一乘法器输出端,第二输入端连接至第二十二乘法器输出端,用于将第二十一乘法器输出值和第二十二乘法器输出值相加;所述第十一加法器第一输入端连接至第三存储器输出端,第二输入端连接至第十加法器输出端,用于将第三存储器存储的前一时刻角速度值ω(j-1)与第十加法器输出值相加,输出角速度值ω(j);所述第二十三乘法器第一输入端连接至系数KI*T,第二输入端连接至第三存储器输出端,用于将第三存储器存储的前一时刻角速度值ω(j-1)与KI*T相乘;所述第十二加法器第一输入端连接至第二十三乘法器输出端,第二输入端连接至第四存储器输出端,用于将第二十三乘法器输出值与第四存储器存储前一时刻角度值
Figure BDA0000463448260000091
相加,得到角度值
Figure BDA0000463448260000092
Wherein, the motion information solver includes a PI regulator and an integrator; the PI regulator includes a twenty-first multiplier, a twenty-second multiplier, a fifth subtractor, a tenth adder, and an eleventh adder , a second memory and a third memory; the integrator includes a twenty-third multiplier, a twelfth adder, and a fourth memory; the first input of the twenty-first multiplier is connected to the positive decoupling The output terminal of the decoupler, the second input terminal is connected to the proportional coefficient K P , which is used to convert the output value of the positive decoupler
Figure BDA0000463448260000086
The proportional coefficient K P is multiplied; the first input end of the fifth subtractor is connected to the coefficient K I *T, and the second input end is connected to the coefficient K P for subtracting K I *T and K P ; The first input end of the twenty-second multiplier is connected to the output end of the second memory, and the second input end is connected to the output end of the twenty-first multiplier, for storing the positive decoupler output value of the second memory value at the previous moment
Figure BDA0000463448260000087
) is multiplied with the output of the twenty-first multiplier; the first input end of the tenth adder is connected to the output end of the twenty-first multiplier, and the second input end is connected to the output end of the twenty-second multiplier, using Adding the output value of the twenty-first multiplier and the output value of the twenty-second multiplier; the first input terminal of the eleventh adder is connected to the third memory output terminal, and the second input terminal is connected to the tenth addition The output terminal of the device is used to add the angular velocity value ω(j-1) at the previous moment stored in the third memory to the output value of the tenth adder, and output the angular velocity value ω(j); the second multiplier of the twenty-third multiplier One input end is connected to the coefficient K I * T, and the second input end is connected to the output end of the third memory, for the angular velocity value ω (j-1) of the previous moment stored in the third memory and multiplied by K I * T; The first input end of the twelfth adder is connected to the output end of the twenty-third multiplier, and the second input end is connected to the output end of the fourth memory, for storing the output value of the twenty-third multiplier with the fourth memory Angle value at the previous moment
Figure BDA0000463448260000091
Add up to get the angle value
Figure BDA0000463448260000092

本发明采用采用双同步坐标变换的信号处理单元同时对磁电信号中的基波正序和负序两个序分量进行坐标变换,将其分解成正序和负序dq坐标系下的分量,通过解耦网络和滤波环节,实现运动信息的解算,使得由于器件差异和安装误差等导致的信号畸变成分可以通过解耦器和滤波器加以消除,从而大大提高了磁编码器的解算精度和抗干扰能力。The present invention adopts the signal processing unit adopting double synchronous coordinate transformation to carry out coordinate transformation to the two sequence components of the fundamental wave positive sequence and negative sequence in the magnetoelectric signal at the same time, decompose it into the component under the dq coordinate system of positive sequence and negative sequence, through The decoupling network and filtering links realize the calculation of motion information, so that the signal distortion components caused by device differences and installation errors can be eliminated through decouplers and filters, thus greatly improving the calculation accuracy and accuracy of magnetic encoders. Anti-interference ability.

附图说明Description of drawings

图1为本发明实施例提供的基于双同步旋转坐标系的磁编码器的结构原理示意图;FIG. 1 is a schematic diagram of the structure and principle of a magnetic encoder based on a dual synchronous rotating coordinate system provided by an embodiment of the present invention;

图2为本发明实施例提供的基于双同步旋转坐标系的磁编码器中信号采集模块的原理框图;2 is a functional block diagram of a signal acquisition module in a magnetic encoder based on a dual synchronous rotating coordinate system provided by an embodiment of the present invention;

图3为本发明实施例提供的信号处理单元中正向帕克变换器的原理框图;Fig. 3 is the functional block diagram of the forward Park converter in the signal processing unit provided by the embodiment of the present invention;

图4为本发明实施例提供的信号处理单元中反向帕克变换器原理框图;Fig. 4 is the functional block diagram of the reverse Park converter in the signal processing unit provided by the embodiment of the present invention;

图5为本发明实施例提供的信号处理单元中正向解耦器原理框图;5 is a functional block diagram of the forward decoupler in the signal processing unit provided by the embodiment of the present invention;

图6为本发明实施例提供的信号处理单元中反向解耦器原理框图;6 is a functional block diagram of a reverse decoupler in a signal processing unit provided by an embodiment of the present invention;

图7为本发明实施例提供的信号处理单元中低通滤波器的原理框图;其中图7(a)为第一低通滤波器,图7(b)为第二低通滤波器,图7(c)为第三低通滤波器,图7(d)为第四低通滤波器;Fig. 7 is the functional block diagram of the low-pass filter in the signal processing unit that the embodiment of the present invention provides; Wherein Fig. 7 (a) is the first low-pass filter, Fig. 7 (b) is the second low-pass filter, Fig. 7 (c) is the 3rd low-pass filter, and Fig. 7 (d) is the 4th low-pass filter;

图8为本发明实施例提供的信号处理单元中运动信息解算器的原理框图。Fig. 8 is a functional block diagram of a motion information solver in a signal processing unit provided by an embodiment of the present invention.

具体实施方式Detailed ways

为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。此外,下面所描述的本发明各个实施方式中所涉及到的技术特征只要彼此之间未构成冲突就可以相互组合。In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

本发明具体涉及了一种对磁电传感器(霍尔传感器或磁阻传感器)的输出信号进行解算编码,并可以应用于伺服控制和随动控制领域的磁编码器。The invention specifically relates to a magnetic encoder which can solve and encode the output signal of a magnetoelectric sensor (Hall sensor or magnetoresistive sensor), and can be applied to the fields of servo control and follow-up control.

本发明提供了一种解算精确度不受器件差异和安装误差等因素影响的新型磁编码器。目前国内在研和在用的磁编码器大多基于理想两路正交(或四路差分正交)或三路对称(或六路差分对称)的磁电信号进行运动信息解算。但由于安装误差和元件性能差别等因素的客观存在,所以现实中磁编码器磁电信号的正交性或对称性必然受到各种误差因素的影响。本发明采用双同步坐标变换结算方法,分别提取对磁编码器磁电信号中的基波正序分量和基波负序分量的幅值和两倍频的波动分量,使得由于器件差异和安装误差等导致的信号畸变成分可以通过解耦器和滤波器加以消除,从而大大提高了磁编码器的解算精度和抗干扰能力。The invention provides a novel magnetic encoder whose calculation accuracy is not affected by factors such as component differences and installation errors. At present, most of the magnetic encoders under research and in use in China are based on ideal two-way quadrature (or four-way differential quadrature) or three-way symmetrical (or six-way differential symmetrical) magnetoelectric signals for motion information calculation. However, due to the objective existence of factors such as installation errors and component performance differences, the orthogonality or symmetry of the magnetoelectric signals of magnetic encoders in reality must be affected by various error factors. The present invention adopts the dual synchronous coordinate transformation settlement method to extract the amplitudes of the fundamental positive sequence component and the fundamental negative sequence component in the magnetoelectric signal of the magnetic encoder and the fluctuation component of twice the frequency, so that due to device differences and installation errors The signal distortion components caused by such as can be eliminated by decouplers and filters, thus greatly improving the solution accuracy and anti-interference ability of the magnetic encoder.

总体而言,通过本发明所构思的以上技术方案与现有技术相比,解算精确度不受器件差异和安装误差等因素影响,提高了磁编码器对运动信息解算的精确度。Generally speaking, compared with the prior art, the above technical solution conceived by the present invention is not affected by factors such as device differences and installation errors, and improves the accuracy of the magnetic encoder for motion information calculation.

本发明可以对两路正交(或四路差分正交)或三路对称(或六路差分对称)的磁电信号进行运动信息解算。以下以两路正交信号为例对本发明进行举例说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。此外,下面所描述的本发明各个实施方式中所涉及到的技术特征只要彼此之间未构成冲突就可以相互组合。结合附图及实施例对本发明的目的、技术方案及优点详细说明如下。The present invention can solve the motion information for two-way orthogonal (or four-way differential orthogonal) or three-way symmetrical (or six-way differentially symmetrical) magnetoelectric signals. The present invention will be described below by taking two orthogonal signals as an example. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other. The purpose, technical solutions and advantages of the present invention are described in detail as follows in conjunction with the accompanying drawings and embodiments.

本发明公开了一种可用于运动信息检测的新型磁编码器,其包括依次连接的磁电信号发生器1、信号调理器2、信号采集模块3和信号处理单元几个部分。磁电信号发生器1用于将磁性元件的运动情况转换成包含运动信息的模拟电信号。信号调理器2将磁电信号发生器1输出的模拟电信号进行调理和模拟滤波处理,使之能够匹配信号采集模块的输入要求。信号采集模块3由A/D转换器构成。A/D转换器用于将信号调理器2输出的模拟正弦信号Vs(t)、模拟余弦信号Vc(t)进行模数转换,输出数字正弦信号Vs(j)和数字余弦信号Vc(j)。由正向帕克变换器4、反向帕克变换器5、正向解耦器6、反向解耦器7、低通滤波器8和运动信息解算器9组成的信号处理单元,用于对由信号采集模块输入的数字电信号进行坐标变换、解耦运算、滤波处理和运动信息解算。The invention discloses a novel magnetic encoder that can be used for motion information detection, which includes a magnetoelectric signal generator 1, a signal conditioner 2, a signal acquisition module 3 and a signal processing unit connected in sequence. The magnetoelectric signal generator 1 is used to convert the motion of the magnetic element into an analog electrical signal containing motion information. The signal conditioner 2 performs conditioning and analog filtering processing on the analog electric signal output by the magnetoelectric signal generator 1, so that it can match the input requirements of the signal acquisition module. The signal acquisition module 3 is composed of an A/D converter. The A/D converter is used to perform analog-to-digital conversion on the analog sine signal V s (t) and the analog cosine signal V c (t) output by the signal conditioner 2, and output the digital sine signal V s (j) and the digital cosine signal V c (j). A signal processing unit consisting of a forward Park converter 4, a reverse Park converter 5, a forward decoupler 6, a reverse decoupler 7, a low-pass filter 8 and a motion information solver 9, for Coordinate transformation, decoupling operation, filter processing and motion information calculation are performed on the digital electrical signal input by the signal acquisition module.

正向帕克变换器4由第一余弦发生器41、第二正弦发生器42、第一乘法器43、第二乘法器44、第一加法器45、第一反相器46、第三乘法器47、第四乘法器48、第二加法器49组成。第一余弦发生器41用于产生输出角度估计值

Figure BDA0000463448260000111
的余弦值第二正弦发生器42用于产生输出角度估计值
Figure BDA0000463448260000113
的正弦值
Figure BDA0000463448260000114
第一乘法器43将接收的数字正弦Vs(j)和余弦值
Figure BDA0000463448260000115
相乘,第二乘法器44将接收的数字余弦Vc(j)和正弦值
Figure BDA0000463448260000116
相乘,第一加法器45将第一乘法器43的输出量和第二乘法器44的输出量相加得到dq+坐标系的d轴分量
Figure BDA0000463448260000117
第一反相器46将正弦值
Figure BDA0000463448260000118
反相,第三乘法器47将反相器46的输出值和数字正弦信号Vs(j)相乘,第四乘法器48将数字余弦信号Vc(j)和余弦值
Figure BDA0000463448260000121
相乘,第二加法器49将第三乘法器47的输出值和第四乘法器48的输出值相加得到dq+坐标系的q轴分量值
Figure BDA0000463448260000122
The forward Park converter 4 is composed of the first cosine generator 41, the second sine generator 42, the first multiplier 43, the second multiplier 44, the first adder 45, the first inverter 46, the third multiplier device 47, a fourth multiplier 48, and a second adder 49. The first cosine generator 41 is used to generate the output angle estimate
Figure BDA0000463448260000111
cosine of The second sine generator 42 is used to generate the output angle estimate
Figure BDA0000463448260000113
the sine of
Figure BDA0000463448260000114
The first multiplier 43 will receive the digital sine V s (j) and cosine
Figure BDA0000463448260000115
multiplied, the second multiplier 44 will receive the digital cosine V c (j) and the sine value
Figure BDA0000463448260000116
multiplication, the first adder 45 adds the output of the first multiplier 43 and the output of the second multiplier 44 to obtain the d-axis component of the dq + coordinate system
Figure BDA0000463448260000117
The first inverter 46 converts the sine value
Figure BDA0000463448260000118
Inversion, the third multiplier 47 multiplies the output value of the inverter 46 and the digital sine signal V s (j), and the fourth multiplier 48 multiplies the digital cosine signal V c (j) and the cosine value
Figure BDA0000463448260000121
multiplication, the second adder 49 adds the output value of the third multiplier 47 and the output value of the fourth multiplier 48 to obtain the q-axis component value of the dq + coordinate system
Figure BDA0000463448260000122

反向帕克变换器5由第二余弦发生器51、第二正弦发生器52、第五乘法器53、第六乘法器54、第三加法器55、第二反相器56、第七乘法器57、第八乘法器58、第四加法器59组成。第二余弦发生器51用于产生角度估计值的余弦值

Figure BDA0000463448260000124
第二正弦发生器52用于产生角度估计值
Figure BDA0000463448260000125
的正弦值
Figure BDA0000463448260000126
第五乘法器53将接收的数字正弦Vs(j)和余弦值相乘,第二反相器56将正弦值
Figure BDA0000463448260000128
反相,第六乘法器54将接收的数字余弦Vc(j)和第二反相器56输出值相乘,第三加法器55将第五乘法器53的输出值和第六乘法器54的输出值相加得到dq-坐标系的d轴分量
Figure BDA0000463448260000129
第七乘法器57将正弦值
Figure BDA00004634482600001210
和数字正弦Vs(j)相乘,第八乘法器58将数字余弦Vc(j)和余弦值
Figure BDA00004634482600001211
相乘,第四加法器59将第七乘法器57的输出值和第八乘法器58输出值相加得到dq-坐标系的q轴分量
Figure BDA00004634482600001212
Inverse Park converter 5 is composed of second cosine generator 51, second sine generator 52, fifth multiplier 53, sixth multiplier 54, third adder 55, second inverter 56, seventh multiplier device 57, the eighth multiplier 58, and the fourth adder 59. The second cosine generator 51 is used to generate the angle estimate cosine of
Figure BDA0000463448260000124
The second sine generator 52 is used to generate the angle estimate
Figure BDA0000463448260000125
the sine of
Figure BDA0000463448260000126
The fifth multiplier 53 will receive the digital sine V s (j) and the cosine value multiplied, the second inverter 56 converts the sine value
Figure BDA0000463448260000128
Inversion, the sixth multiplier 54 multiplies the received digital cosine V c (j) and the output value of the second inverter 56, and the third adder 55 multiplies the output value of the fifth multiplier 53 and the sixth multiplier 54 Adding the output values of dq - the d-axis component of the coordinate system
Figure BDA0000463448260000129
The seventh multiplier 57 converts the sine value
Figure BDA00004634482600001210
and the digital sine V s (j) are multiplied, and the eighth multiplier 58 converts the digital cosine V c (j) and the cosine value
Figure BDA00004634482600001211
multiplication, the fourth adder 59 adds the output value of the seventh multiplier 57 and the output value of the eighth multiplier 58 to obtain the q-axis component of the dq - coordinate system
Figure BDA00004634482600001212

正向解耦器6由第九乘法器601、第三正弦发生器602、第三余弦发生器603、第十乘法器604、第十一乘法器605、第五加法器606、第一减法器607、第十二乘法器608、第十三乘法器609、第二减法器610、第六加法器611组成。第九乘法器601将角度估计值

Figure BDA00004634482600001213
与系数2相乘,第三正弦发生器602用于产生第九乘法器输出量的正弦值第三余弦发生器603用于产生第九乘法器输出量的余弦值
Figure BDA00004634482600001215
第十乘法器604将余弦值
Figure BDA00004634482600001216
和第三低通滤波器输出值
Figure BDA00004634482600001217
相乘,第十一乘法器605将正弦值和第四通滤波器输出值
Figure BDA00004634482600001219
相乘,第五加法器606将第十乘法器604的输出量和第十一乘法器605输出量相加,第一减法器607将dq+坐标系的d轴分量与第五加法器606输出量相减,得到正向解耦器的输出值
Figure BDA0000463448260000131
第十二乘法器608将第三低通滤波器输出值
Figure BDA0000463448260000132
和正弦值
Figure BDA0000463448260000133
相乘,第十三乘法器609将第四通滤波器输出值
Figure BDA0000463448260000134
与余弦值
Figure BDA0000463448260000135
相乘,第二减法器610将第十二乘法器608输出值和第十三乘法器609输出值相减,第六加法器611将第二减法器610输出值和dq+坐标系的q轴分量
Figure BDA0000463448260000136
相加得到正向解耦器的输出值 Forward decoupler 6 is composed of the ninth multiplier 601, the third sine generator 602, the third cosine generator 603, the tenth multiplier 604, the eleventh multiplier 605, the fifth adder 606, the first subtraction 607, the twelfth multiplier 608, the thirteenth multiplier 609, the second subtractor 610, and the sixth adder 611. The ninth multiplier 601 converts the angle estimate
Figure BDA00004634482600001213
Multiplied with coefficient 2, the third sine generator 602 is used to generate the sine value of the output of the ninth multiplier The third cosine generator 603 is used to generate the cosine value of the output of the ninth multiplier
Figure BDA00004634482600001215
The tenth multiplier 604 converts the cosine value
Figure BDA00004634482600001216
and the third low-pass filter output value
Figure BDA00004634482600001217
multiplied, the eleventh multiplier 605 converts the sine value and the fourth-pass filter output value
Figure BDA00004634482600001219
multiplication, the fifth adder 606 adds the output of the tenth multiplier 604 and the output of the eleventh multiplier 605, and the first subtractor 607 adds the d-axis component of the dq + coordinate system subtracted from the output of the fifth adder 606 to obtain the output value of the forward decoupler
Figure BDA0000463448260000131
The twelfth multiplier 608 converts the third low-pass filter output value
Figure BDA0000463448260000132
and the sine
Figure BDA0000463448260000133
multiplied, the thirteenth multiplier 609 converts the fourth-pass filter output value
Figure BDA0000463448260000134
and cosine
Figure BDA0000463448260000135
Multiplication, the second subtractor 610 subtracts the output value of the twelfth multiplier 608 and the output value of the thirteenth multiplier 609, and the sixth adder 611 subtracts the output value of the second subtractor 610 and the q axis of the dq + coordinate system weight
Figure BDA0000463448260000136
Adding to get the output value of the forward decoupler

反向解耦器7由第十四乘法器701、第四正弦发生器702、第四余弦发生器703、第十五乘法器704、第十六乘法器705、第七加法器706、第三减法器707、第十七乘法器708、第十八乘法器709、第四减法器710、第八加法器711组成。第十四乘法器701将输出角度估计值与系数2相乘,第四正弦发生器702用于产生第十四乘法器701输出值的正弦值

Figure BDA0000463448260000139
第四余弦发生器703用于产生第十四乘法器701输出值的余弦值第十五乘法器704将余弦值和第一低通滤波器输出值
Figure BDA00004634482600001312
相乘,第十六乘法器705将正弦值
Figure BDA00004634482600001313
和第二低通滤波器输出值相乘,第三减法器707将第十六乘法器705输出值和第十五乘法器704的输出值相减,第七加法器706将dq-坐标系的d轴分量
Figure BDA00004634482600001315
与第三减法器707的输出值相加,得到反向解耦器的输出值
Figure BDA00004634482600001316
第十七乘法器708将第一低通滤波器输出值
Figure BDA00004634482600001317
和正弦值
Figure BDA00004634482600001318
相乘,第十八乘法器709将第二低通滤波器输出值
Figure BDA00004634482600001319
与余弦值相乘,第八加法器711将第第十七乘法器708的输出量和第十八乘法器709的输出量相加,第四减法器710将dq-坐标系的q轴分量
Figure BDA00004634482600001321
与第八加法器711的输出量相减,得到反向解耦器输出值
Figure BDA00004634482600001322
The reverse decoupler 7 is composed of the fourteenth multiplier 701, the fourth sine generator 702, the fourth cosine generator 703, the fifteenth multiplier 704, the sixteenth multiplier 705, the seventh adder 706, the fourth The third subtractor 707, the seventeenth multiplier 708, the eighteenth multiplier 709, the fourth subtractor 710, and the eighth adder 711 are composed. The fourteenth multiplier 701 will output the angle estimate Multiplied by coefficient 2, the fourth sine generator 702 is used to generate the sine value of the output value of the fourteenth multiplier 701
Figure BDA0000463448260000139
The fourth cosine generator 703 is used to generate the cosine value of the output value of the fourteenth multiplier 701 The fifteenth multiplier 704 converts the cosine value and the first low-pass filter output value
Figure BDA00004634482600001312
multiplied, the sixteenth multiplier 705 converts the sine value
Figure BDA00004634482600001313
and the second low-pass filter output value multiplied, the third subtractor 707 subtracts the output value of the sixteenth multiplier 705 and the output value of the fifteenth multiplier 704, and the seventh adder 706 takes the d-axis component of the dq - coordinate system
Figure BDA00004634482600001315
is added to the output value of the third subtractor 707 to obtain the output value of the reverse decoupler
Figure BDA00004634482600001316
The seventeenth multiplier 708 converts the first low-pass filter output value
Figure BDA00004634482600001317
and the sine
Figure BDA00004634482600001318
multiplied, the eighteenth multiplier 709 converts the second low-pass filter output value
Figure BDA00004634482600001319
and cosine multiplication, the eighth adder 711 adds the output of the seventeenth multiplier 708 and the output of the eighteenth multiplier 709, and the fourth subtractor 710 adds the q-axis component of the dq - coordinate system
Figure BDA00004634482600001321
subtracted from the output of the eighth adder 711 to obtain the output value of the reverse decoupler
Figure BDA00004634482600001322

低通滤波器8由四个相同的第一低通滤波器801、第二低通滤波器802、第三低通滤波器803、第四低通滤波器804组成,每个滤波器由第十九乘法器81、第九加法器82、第二十乘法器83、第一存储器84组成。其中,第一低通滤波器801包括第十九乘法器81将正向解耦器输出值

Figure BDA0000463448260000141
和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器81输出值和第一存储器84存储的第一低通滤波器输出值的前一时刻的值相加,第二十乘法器83将第九加法器82输出值和(1+T*ωf)的倒数相乘,得到第一低通滤波器输出值
Figure BDA0000463448260000143
Low-pass filter 8 is made up of four identical first low-pass filter 801, second low-pass filter 802, the 3rd low-pass filter 803, the 4th low-pass filter 804, each filter is made up of tenth low-pass filter Nine multipliers 81, ninth adders 82, twentieth multipliers 83, and first memory 84. Among them, the first low-pass filter 801 includes a nineteenth multiplier 81 that converts the forward decoupler output value
Figure BDA0000463448260000141
Multiplied with the sampling period T and the filter cut-off frequency ω f product T*ω f , the ninth adder 82 is the previous one of the nineteenth multiplier 81 output value and the first low-pass filter output value stored in the first memory 84 value of moment In addition, the twentieth multiplier 83 multiplies the output value of the ninth adder 82 and the reciprocal of (1+T*ω f ) to obtain the first low-pass filter output value
Figure BDA0000463448260000143

第二低通滤波器802包括第十九乘法器81将正向解耦器输出值

Figure BDA0000463448260000144
和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器输出值和第一存储存储器84存储的第二低通滤波器输出值的前一时刻的值
Figure BDA0000463448260000145
相加,第二十乘法器83将第九加法器输出值和(1+T*ωf)的倒数相乘,得到第二低通滤波器输出值
Figure BDA0000463448260000146
The second low-pass filter 802 includes a nineteenth multiplier 81 that converts the forward decoupler output value
Figure BDA0000463448260000144
Multiplied with the sampling period T and the filter cut-off frequency ω f product T*ω f , the 9th adder 82 is the previous one of the 19th multiplier output value and the second low-pass filter output value stored in the first storage memory 84 value of moment
Figure BDA0000463448260000145
In addition, the twentieth multiplier 83 multiplies the output value of the ninth adder and the reciprocal of (1+T*ω f ) to obtain the second low-pass filter output value
Figure BDA0000463448260000146

第三低通滤波器803包括第十九乘法器81将反向解耦器输出值

Figure BDA0000463448260000147
和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器81输出值和第一存储器84存储的第三低通滤波器输出值的前一时刻的值
Figure BDA0000463448260000148
相加,第二十乘法器83将第九加法器82输出值和(1+T*ωf)的倒数相乘,得到第三低通滤波器输出值
Figure BDA0000463448260000149
The third low-pass filter 803 includes the nineteenth multiplier 81 to reverse the decoupler output value
Figure BDA0000463448260000147
Multiplied with the sampling period T and the filter cut-off frequency ω f product T*ω f , the ninth adder 82 is the previous one of the nineteenth multiplier 81 output value and the third low-pass filter output value stored in the first memory 84 value of moment
Figure BDA0000463448260000148
In addition, the twentieth multiplier 83 multiplies the output value of the ninth adder 82 and the reciprocal of (1+T*ω f ) to obtain the third low-pass filter output value
Figure BDA0000463448260000149

第四低通滤波器804包括第十九乘法器81将反向解耦器输出值

Figure BDA00004634482600001410
和采样周期T和滤波截止频率ωf乘积T*ωf相乘,第九加法器82将第十九乘法器81输出值和第一存储器84存储的第四低通滤波器输出值的前一时刻的值
Figure BDA00004634482600001411
相加,第二十乘法器83将第九加法器82输出值和(1+T*ωf)的倒数相乘,得到第四低通滤波器输出值
Figure BDA00004634482600001412
The fourth low-pass filter 804 includes the nineteenth multiplier 81 to reverse the decoupler output value
Figure BDA00004634482600001410
Multiplied with the sampling period T and the filter cut-off frequency ω f product T*ω f , the ninth adder 82 is the previous one of the 19th multiplier 81 output value and the fourth low-pass filter output value stored in the first memory 84 value of moment
Figure BDA00004634482600001411
In addition, the twentieth multiplier 83 multiplies the output value of the ninth adder 82 and the reciprocal of (1+T*ω f ) to obtain the fourth low-pass filter output value
Figure BDA00004634482600001412

运动信息解算器9由PI调节器91和积分器92组成。其中PI调节器91由第二十一乘法器910、第二十二乘法器911、第五减法器912、第十加法器913、第十一加法器914、第二存储器915、第三存储器916组成。The motion information solver 9 is composed of a PI regulator 91 and an integrator 92 . Wherein the PI regulator 91 is composed of the twenty-first multiplier 910, the twenty-second multiplier 911, the fifth subtractor 912, the tenth adder 913, the eleventh adder 914, the second memory 915, the third memory 916 composition.

积分器92由第二十三乘法器920、第十二加法器921、第四存储器922组成。第二十一乘法器910将正向解耦器输出值

Figure BDA0000463448260000151
比例系数KP相乘,第五减法器912将KI*T与KP相减,第二十二乘法器911将第二存储器915存储的正向解耦器的输出值的前一时刻的值
Figure BDA0000463448260000152
)与第二十一乘法器910输出量相乘,第十加法器913将第二十一乘法器910输出值和第二十二乘法器911输出值相加,第十一加法器914将第三存储器916存储的前一时刻角速度值ω(j-1)与第十加法器913输出值相加,输出角速度值ω(j)。第二十三乘法器920将前一时刻角速度值ω(j-1)与KI*T相乘,第十二加法器921将第二十三乘法器920与第四存储器922存储前一时刻角度值
Figure BDA0000463448260000153
相加,得到角度值
Figure BDA0000463448260000154
The integrator 92 is composed of a twenty-third multiplier 920 , a twelfth adder 921 , and a fourth memory 922 . The twenty-first multiplier 910 will forward the decoupler output value
Figure BDA0000463448260000151
The proportional coefficient K P is multiplied, the fifth subtractor 912 subtracts K I *T and K P , and the twenty-second multiplier 911 stores the output value of the forward decoupler stored in the second memory 915 at the previous moment value
Figure BDA0000463448260000152
) is multiplied with the twenty-first multiplier 910 output, the tenth adder 913 adds the twenty-first multiplier 910 output value and the twenty-second multiplier 911 output value, and the eleventh adder 914 adds the first The angular velocity value ω(j−1) stored in the third memory 916 at the previous moment is added to the output value of the tenth adder 913 to output the angular velocity value ω(j). The twenty-third multiplier 920 multiplies the previous moment angular velocity value ω (j-1) and K I * T, and the twelfth adder 921 stores the previous moment in the twenty-third multiplier 920 and the fourth memory 922 angle value
Figure BDA0000463448260000153
Add up to get the angle value
Figure BDA0000463448260000154

本发明实施例提供的磁编码器可以对磁电信号发生器输出两相、三相或者六相信号进行处理。本例以两相信号输出为例说明但不局限于两相信号。其中,正向帕克变换器4的输出满足:

Figure BDA0000463448260000155
Figure BDA0000463448260000156
反向帕克变换器5的输出满足: V sd - ( j ) = V s ( j ) * cos θ ^ ( j ) - V c * sin θ ^ ( j ) V sq - ( j ) = V c ( j ) * cos θ ^ ( j ) + V s * sin θ ^ ( j ) . 正向解耦器6的输出满足: V sd + * ( j ) = V sd - ( j ) - V sd + ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) + V sq + ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) V sq + * ( j ) = V sq + ( j ) + V sq - ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) - V sd - ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) . 反向解耦器7的输出满足: V sd - * ( j ) = V sd - ( j ) - V sd + ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) + V sq + ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) V sq - * ( j ) = V sq - ( j ) - V sq + ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) - V sd + ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) . 低通滤波器8中第一低通滤波器801的输出满足: V sd + ‾ ( j ) = V sd + ‾ ( j - 1 ) + K P * V sd + * ( j ) + ( - K P + K I * T ) * V sd + * ( j - 1 ) . 第二低通滤波器802的输出满足: V sq + ‾ ( j ) = V sq + ‾ ( j - 1 ) + K P * V sq + * ( j ) + ( - K P + K I * T ) * V sq + * ( j - 1 ) . 第三低通滤波器803的输出满足: V sd - ‾ ( j ) = V sd - ‾ ( j - 1 ) + K P * V sd - * ( j ) + ( - K P + K I * T ) * V sd - * ( j - 1 ) . 第四低通滤波器804的输出满足: V sq - ‾ ( j ) = V sq - ‾ ( j - 1 ) + K P * V sq - * ( j ) + ( - K P + K I * T ) * V sq - * ( j - 1 ) . 运动信息解算器9的输出满足: ω ( j ) = ω ( j - 1 ) + K P * V sq + * ( j ) + ( - K P + K I * T ) * V sq + * ( j - 1 ) θ ^ ( j ) = θ ^ ( j - 1 ) + K I * T * ω ( j - 1 ) . The magnetic encoder provided by the embodiment of the present invention can process the two-phase, three-phase or six-phase signals output by the magnetoelectric signal generator. This example takes two-phase signal output as an example to illustrate but not limited to two-phase signal. Wherein, the output of the forward park converter 4 satisfies:
Figure BDA0000463448260000155
and
Figure BDA0000463448260000156
The output of the inverse park converter 5 satisfies: V sd - ( j ) = V the s ( j ) * cos θ ^ ( j ) - V c * sin θ ^ ( j ) and V sq - ( j ) = V c ( j ) * cos θ ^ ( j ) + V the s * sin θ ^ ( j ) . The output of forward decoupler 6 satisfies: V sd + * ( j ) = V sd - ( j ) - V sd + ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) + V sq + ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) and V sq + * ( j ) = V sq + ( j ) + V sq - ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) - V sd - ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) . The output of reverse decoupler 7 satisfies: V sd - * ( j ) = V sd - ( j ) - V sd + ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) + V sq + ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) and V sq - * ( j ) = V sq - ( j ) - V sq + ‾ ( j ) * cos ( 2 * θ ^ ( j ) ) - V sd + ‾ ( j ) * sin ( 2 * θ ^ ( j ) ) . The output of the first low-pass filter 801 in the low-pass filter 8 satisfies: V sd + ‾ ( j ) = V sd + ‾ ( j - 1 ) + K P * V sd + * ( j ) + ( - K P + K I * T ) * V sd + * ( j - 1 ) . The output of the second low-pass filter 802 satisfies: V sq + ‾ ( j ) = V sq + ‾ ( j - 1 ) + K P * V sq + * ( j ) + ( - K P + K I * T ) * V sq + * ( j - 1 ) . The output of the third low-pass filter 803 satisfies: V sd - ‾ ( j ) = V sd - ‾ ( j - 1 ) + K P * V sd - * ( j ) + ( - K P + K I * T ) * V sd - * ( j - 1 ) . The output of the fourth low-pass filter 804 satisfies: V sq - ‾ ( j ) = V sq - ‾ ( j - 1 ) + K P * V sq - * ( j ) + ( - K P + K I * T ) * V sq - * ( j - 1 ) . The output of motion information solver 9 satisfies: ω ( j ) = ω ( j - 1 ) + K P * V sq + * ( j ) + ( - K P + K I * T ) * V sq + * ( j - 1 ) and θ ^ ( j ) = θ ^ ( j - 1 ) + K I * T * ω ( j - 1 ) .

在本发明实施例中,针对三相输入信号的情形;假设三相输入信号分别为Va、Vb、Vc则此时的正向帕克变换器4的输出满足:In the embodiment of the present invention, for the case of three-phase input signals; assuming that the three-phase input signals are V a , V b , and V c respectively, then the output of the forward park converter 4 at this time satisfies:

VV sdsd ++ (( jj )) == VV aa ** coscos θθ ^^ (( jj )) ++ VV bb ** (( 33 22 ** sinsin θθ ^^ (( jj )) -- 11 22 ** coscos θθ ^^ (( jj )) )) -- VV cc ** (( 33 22 ** sinsin θθ ^^ (( jj )) ++ 11 22 ** coscos θθ ^^ (( jj )) ))

VV sqsq ++ (( jj )) == VV aa ** sinsin θθ ^^ (( jj )) -- VV bb ** (( 33 22 ** coscos θθ ^^ (( jj )) ++ 11 22 ** sinsin θθ ^^ (( jj )) )) ++ VV cc ** (( 33 22 ** coscos θθ ^^ (( jj )) -- 11 22 ** sinsin θθ ^^ (( jj )) ))

则此时的反向帕克变换器5的输出满足:Then the output of the inverse Park converter 5 at this time satisfies:

VV sdsd -- (( jj )) == VV aa ** coscos θθ ^^ (( jj )) ++ VV bb ** (( 33 22 ** sinsin θθ ^^ (( jj )) -- 11 22 ** coscos θθ ^^ (( jj )) -- VV cc ** (( 33 22 ** sinsin θθ ^^ (( jj )) ++ 11 22 ** coscos θθ ^^ (( jj )) ))

VV sqsq -- (( jj )) == -- VV aa ** sinsin θθ ^^ (( jj )) -- VV bb ** (( 33 22 ** coscos θθ ^^ (( jj )) ++ 11 22 ** sinsin θθ ^^ (( jj )) ++ VV cc ** (( 11 22 ** sinsin θθ ^^ (( jj )) -- 33 22 ** coscos θθ ^^ (( jj )) ))

其余部分完全相同,在此不再赘述。The rest are exactly the same and will not be repeated here.

在本发明实施例中,为便于比较本发明实施例和传统解调方法的精度和速度,进行了仿真实验。假设磁电信号发生器输出Vs(t)=Ke*sin(100*t)、Vc(t)=0.8*Kecos(100*t),即余弦信号幅值是正弦信号幅值的0.8倍。仿真结果显示,本发明在极短时间内即可实现解算角度值对实际角度值的跟踪锁定,解算角速度等于信号实际角速度100rad/s,解算结果不受幅值差别的影响。In the embodiment of the present invention, in order to compare the accuracy and speed of the embodiment of the present invention and the traditional demodulation method, a simulation experiment is carried out. Suppose the magnetoelectric signal generator outputs V s (t)=K e *sin(100*t), V c (t)=0.8*K e cos(100*t), that is, the cosine signal amplitude is the sine signal amplitude 0.8 times. The simulation results show that the present invention can track and lock the calculated angle value to the actual angle value in a very short time, the calculated angular velocity is equal to the actual angular velocity of the signal 100rad/s, and the calculated result is not affected by the amplitude difference.

若磁电信号发生器输出Vs(t)=Kesin(100*t)、Vc(t)=0.8*Kecos(100*t+10°),即此时余弦信号滞后正弦信号10°。仿真结果显示,本发明仍然可以在较短时间内实现解算角速度等于实际角速度100rad/s,但解算角度值受相位偏差影响出现一个恒定偏差,因此可以根据试验测试很容易进行补偿。If the magnetoelectric signal generator outputs V s (t)=K e sin(100*t), V c (t)=0.8*K e cos(100*t+10°), that is, the cosine signal lags the sine signal 10°. The simulation results show that the present invention can still achieve the calculated angular velocity equal to the actual angular velocity of 100rad/s in a relatively short period of time, but the calculated angular value is affected by the phase deviation and has a constant deviation, so it can be easily compensated according to the test.

本领域的技术人员容易理解,以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。Those skilled in the art can easily understand that the above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention, All should be included within the protection scope of the present invention.

Claims (7)

1.一种基于双同步旋转坐标系的磁编码器,其特征在于,包括依次连接的磁电信号发生器(1)、信号调理器(2)、信号采集模块(3)和信号处理单元;所述信号处理单元包括:正向帕克变换器(4)、反向帕克变换器(5)、正向解耦器(6)、反向解耦器(7)、第一低通滤波器(801)、第二低通滤波器(802)、第三低通滤波器(803)、第四低通滤波器(804)和运动信息解算器(9);1. A magnetic encoder based on double synchronous rotating coordinate system, is characterized in that, comprises the magnetoelectric signal generator (1), signal conditioner (2), signal acquisition module (3) and signal processing unit connected successively; The signal processing unit comprises: a forward Parker converter (4), a reverse Parker converter (5), a forward decoupler (6), a reverse decoupler (7), a first low-pass filter ( 801), a second low-pass filter (802), a third low-pass filter (803), a fourth low-pass filter (804) and a motion information solver (9); 所述磁电信号发生器(1)用于将磁性元件的运动情况转换成包含运动信息的模拟电信号;所述信号调理器(2)用于将所述模拟电信号进行调理和模拟滤波处理后输出与所述信号采集模块(3)相匹配的信号;所述信号采集模块(3)用于对所述信号调理器(2)的输出进行模数转换并输出数字电信号;The magnetoelectric signal generator (1) is used to convert the motion of the magnetic element into an analog electrical signal containing motion information; the signal conditioner (2) is used to condition and analog filter the analog electrical signal After outputting a signal matched with the signal acquisition module (3); the signal acquisition module (3) is used to perform analog-to-digital conversion on the output of the signal conditioner (2) and output a digital electrical signal; 所述正向帕克变换器(4)的输入端连接至所述信号采集模块(3)的输出端,用于将所述数字电信号以恒幅值变换到以正向基波同步角速度ω旋转的dq+坐标系下,提取所述数字电信号中的基波正序分量幅值,同时分离出所述数字电信号中的基波负序分量两倍频波动分量;The input terminal of the forward park converter (4) is connected to the output terminal of the signal acquisition module (3), and is used to convert the digital electrical signal to rotate at a forward fundamental wave synchronous angular velocity ω with a constant amplitude Under the dq + coordinate system, the amplitude of the fundamental positive sequence component in the digital electrical signal is extracted, and the fundamental negative sequence component in the digital electrical signal is separated at twice the frequency fluctuation component; 所述反向帕克变换器(5)的输入端连接至所述信号采集模块(3)的输出端,用于将所述数字电信号以恒幅值变换到以逆向基波同步角速度-ω旋转的dq-坐标系下,提取所述数字电信号中的基波负序分量幅值,同时分离出所述数字电信号中的基波正序分量两倍频波动分量;The input end of the reverse Park converter (5) is connected to the output end of the signal acquisition module (3), and is used to convert the digital electrical signal to rotate at the reverse fundamental synchronous angular velocity -ω with a constant amplitude Under the dq - coordinate system, extract the magnitude of the fundamental wave negative sequence component in the digital electrical signal, and simultaneously separate the fundamental wave positive sequence component twice the frequency fluctuation component in the digital electrical signal; 所述正向解耦器(6)的输入端与所述正向帕克变换器(4)的输出端连接;用于通过数字电信号基波负序分量的幅值反馈量以消除dq+坐标系下数字电信号中由基波负序分量引起的交流成分;The input end of the forward decoupler (6) is connected to the output end of the forward Park converter (4); it is used to eliminate the dq + coordinates by the magnitude feedback of the fundamental negative sequence component of the digital electrical signal The AC component caused by the negative sequence component of the fundamental wave in the digital electrical signal under the system; 所述反向解耦器(7)的输入端与所述反向帕克变换器(5)的输出端连接;用于通过数字电信号基波正序分量的幅值反馈量以消除dq-坐标系下数字电信号中由基波正序分量引起的交流成分;The input terminal of the reverse decoupler (7) is connected with the output terminal of the reverse Park converter (5); it is used to eliminate the dq - coordinate by the magnitude feedback of the fundamental wave positive sequence component of the digital electrical signal The AC component caused by the positive sequence component of the fundamental wave in the digital electrical signal under the system; 所述第一低通滤波器(801)的输入端连接至所述正向解耦器(6)的第一输出端,所述第一低通滤波器(801)的输出端连接至所述反向解耦器(7)的第一反馈端;用于滤除正向解耦器输出的dq+坐标系下基波正序分量的两倍频波动分量,得到dq+坐标系下基波正序分量幅值。The input end of the first low-pass filter (801) is connected to the first output end of the forward decoupler (6), and the output end of the first low-pass filter (801) is connected to the The first feedback terminal of the reverse decoupler (7); used to filter out the double frequency fluctuation component of the fundamental wave positive sequence component under the dq + coordinate system output by the forward decoupler, and obtain the fundamental wave under the dq + coordinate system The magnitude of the positive sequence component. 所述第二低通滤波器(802)的输入端连接至所述正向解耦器(6)的第二输出端,所述第二低通滤波器(802)的输出端连接至所述反向解耦器(7)的第二反馈端,所述第二低通滤波器(802)的输出端还作为数字电信号中基波正序分量幅值输出端;用于滤除正向解耦器输出的dq+坐标系下基波负序分量的两倍频波动分量,得到dq+坐标系下基波负序分量幅值;The input end of the second low-pass filter (802) is connected to the second output end of the forward decoupler (6), and the output end of the second low-pass filter (802) is connected to the The second feedback terminal of the reverse decoupler (7), the output terminal of the second low-pass filter (802) is also used as the fundamental wave positive sequence component amplitude output terminal in the digital electric signal; The double-frequency fluctuation component of the fundamental negative sequence component in the dq + coordinate system output by the decoupler is obtained to obtain the amplitude of the fundamental negative sequence component in the dq + coordinate system; 所述第三低通滤波器(803)的输入端连接至所述反向解耦器(7)的第一输出端,所述第三低通滤波器(803)的输出端连接至所述正向解耦器(6)的第一反馈端,所述第三低通滤波器(803)的输出端还作为数字电信号中基波负序分量幅值输出端;用于滤除负向解耦器输出的dq-坐标系下基波正序分量的两倍频波动分量,得到dq-坐标系下基波正序分量幅值;The input end of the third low-pass filter (803) is connected to the first output end of the reverse decoupler (7), and the output end of the third low-pass filter (803) is connected to the The first feedback terminal of the positive decoupler (6), the output terminal of the third low-pass filter (803) is also used as the amplitude output terminal of the fundamental wave negative sequence component in the digital electrical signal; The double-frequency fluctuation component of the fundamental wave positive sequence component under the dq - coordinate system output by the decoupler, obtains the fundamental wave positive sequence component amplitude under the dq - coordinate system; 所述第四低通滤波器(804)的输入端连接至所述反向解耦器(7)的第二输出端,所述第四低通滤波器(804)的输出端连接至所述正向解耦器(6)的第二反馈端,所述第四低通滤波器(804)的输出端还作为数字电信号中基波负序分量幅值输出端;用于滤除负向解耦器输出的dq-坐标系下基波正序分量的两倍频波动分量,得到dq-坐标系下基波正序分量幅值;所述运动信息解算器(9)的输入端连接至所述正向解耦器(6)的第二输出端,用于对包含运动信息的数字电信号进行锁相,并对磁电信号发生器中磁性元件的运动距离和运动速度进行解算后输出磁元件运动的角速度
Figure FDA0000463448250000021
和角度值
Figure FDA0000463448250000022
The input end of the fourth low-pass filter (804) is connected to the second output end of the reverse decoupler (7), and the output end of the fourth low-pass filter (804) is connected to the The second feedback terminal of the positive decoupler (6), the output terminal of the fourth low-pass filter (804) is also used as the fundamental negative sequence component amplitude output terminal in the digital electrical signal; for filtering the negative Under the dq - coordinate system of the decoupler output, the double-frequency fluctuation component of the fundamental wave positive sequence component obtains the amplitude value of the fundamental wave positive sequence component under the dq - coordinate system; the input terminal of the described motion information solver (9) is connected To the second output terminal of the forward decoupler (6), used for phase-locking the digital electric signal containing motion information, and solving the motion distance and motion speed of the magnetic element in the magnetoelectric signal generator The angular velocity of the movement of the rear output magnetic element
Figure FDA0000463448250000021
and the angle value
Figure FDA0000463448250000022
2.如权利要求1所述的磁编码器,其特征在于,所述正向帕克变换器(4)包括:第一余弦发生器(41)、第二正弦发生器(42)、第一乘法器(43)、第二乘法器(44)、第一加法器(45)、第一反相器(46)、第三乘法器(47)、第四乘法器(48)和第二加法器(49);2. The magnetic encoder according to claim 1, characterized in that, the forward Park converter (4) comprises: a first cosine generator (41), a second sine generator (42), a first Multiplier (43), second multiplier (44), first adder (45), first inverter (46), third multiplier (47), fourth multiplier (48) and second adder device (49); 所述第一余弦发生器(41)的输入端用于接收输出角度估计值
Figure FDA0000463448250000031
用于根据所述输出角度估计值
Figure FDA0000463448250000032
输出余弦值
Figure FDA0000463448250000033
The input end of described first cosine generator (41) is used for receiving output angle estimation value
Figure FDA0000463448250000031
is used to output angle estimates based on the
Figure FDA0000463448250000032
output cosine
Figure FDA0000463448250000033
所述第二正弦发生器(42)的输入端用于接收输出角度估计值
Figure FDA0000463448250000034
用于根据所述输出角度估计值
Figure FDA0000463448250000035
输出正弦值
Figure FDA0000463448250000036
The input of the second sine generator (42) is used to receive the output angle estimate
Figure FDA0000463448250000034
is used to output angle estimates based on the
Figure FDA0000463448250000035
output sine
Figure FDA0000463448250000036
所述第一乘法器(43)的第一输入端连接所述信号采集模块(3)输出的数字正弦Vs(j),所述第一乘法器(43)的第二输入端连接至所述第一余弦发生器(41)的第一输出端,用于将所述数字正弦Vs(j)和所述余弦值相乘;The first input end of the first multiplier (43) is connected to the digital sine V s (j) output by the signal acquisition module (3), and the second input end of the first multiplier (43) is connected to the The first output terminal of the first cosine generator (41) is used to convert the digital sine V s (j) and the cosine value multiplied; 所述第二乘法器(44)的第一输入端连接至所述第二正弦发生器(42)的第一输出端,所述第二乘法器(44)的第二输入端用于接收数字余弦Vc(j),用于将接收的数字余弦Vc(j)和所述正弦值
Figure FDA0000463448250000038
相乘;
The first input of the second multiplier (44) is connected to the first output of the second sine generator (42), and the second input of the second multiplier (44) is used to receive digital cosine V c (j), for combining the received digital cosine V c (j) and the sine
Figure FDA0000463448250000038
multiplied;
所述第一加法器(45)的第一输入端连接至所述第一乘法器(43)的输出端,所述第二加法器(45)的第二输入端连接至所述第二乘法器(44)的输出端,用于将所述第一乘法器(43)的输出量和所述第二乘法器(44)的输出量相加得到dq+坐标系的d轴分量
Figure FDA0000463448250000039
The first input end of the first adder (45) is connected to the output end of the first multiplier (43), and the second input end of the second adder (45) is connected to the second multiplier The output terminal of device (44), is used to add the output quantity of described first multiplier (43) and the output quantity of described second multiplier (44) to obtain the d axis component of dq + coordinate system
Figure FDA0000463448250000039
所述第一反相器(46)的输入端连接至所述第二正弦发生器(42)的第二输出端,用于将所述正弦值
Figure FDA00004634482500000310
反相;
The input terminal of the first inverter (46) is connected to the second output terminal of the second sine generator (42) for converting the sine value
Figure FDA00004634482500000310
inversion;
所述第三乘法器(47)的第一输入端用于接收数字正弦Vs(j),所述第三乘法器(47)的第二输入端连接至所述第一反相器(46)的输出端;用于将所述第一反相器(46)的输出值和数字正弦信号Vs(j)相乘;The first input terminal of the third multiplier (47) is used to receive the digital sine V s (j), and the second input terminal of the third multiplier (47) is connected to the first inverter (46 ) output terminal; for multiplying the output value of the first inverter (46) and the digital sinusoidal signal V s (j); 所述第四乘法器(48)的第一输入端连接至所述第一余弦发生器(41)的第二输出端,所述第四乘法器(48)的第二输入端连接所述信号采集模块(3)输出的数字余弦信号Vc(j),用于将所述数字余弦信号Vc(j)和所述余弦值
Figure FDA0000463448250000041
相乘;
The first input end of the fourth multiplier (48) is connected to the second output end of the first cosine generator (41), and the second input end of the fourth multiplier (48) is connected to the The digital cosine signal V c (j) output by the signal acquisition module (3) is used to combine the digital cosine signal V c (j) and the cosine value
Figure FDA0000463448250000041
multiplied;
所述第二加法器(49)的第一输入端连接至所述第三乘法器(47)的输出端,所述第二加法器(49)的第二输入端连接至所述第四乘法器(48)的输出端,用于将第三乘法器(47)的输出值和所述第四乘法器(48)的输出值相加得到dq+坐标系的q轴分量值
Figure FDA0000463448250000042
The first input end of the second adder (49) is connected to the output end of the third multiplier (47), and the second input end of the second adder (49) is connected to the fourth multiplier The output terminal of device (48), is used for the output value of the 3rd multiplier (47) and the output value of described 4th multiplier (48) are added and obtains the q-axis component value of dq + coordinate system
Figure FDA0000463448250000042
3.如权利要求1或2所述的磁编码器,其特征在于,所述反向帕克变换器(5)包括第二余弦发生器(51)、第二正弦发生器(52)、第五乘法器(53)、第六乘法器(54)、第三加法器(55)、第二反相器(56)、第七乘法器(57)、第八乘法器(58)和第四加法器(59);3. The magnetic encoder as claimed in claim 1 or 2, characterized in that, the reverse Park converter (5) comprises a second cosine generator (51), a second sine generator (52), a second Five multipliers (53), sixth multipliers (54), third adders (55), second inverters (56), seventh multipliers (57), eighth multipliers (58) and fourth adder (59); 所述第二余弦发生器(51)的输入端用于接收输出角度估计值
Figure FDA0000463448250000043
用于根据所述角度估计值
Figure FDA0000463448250000044
输出余弦值
Figure FDA0000463448250000045
The input end of described second cosine generator (51) is used for receiving output angle estimation value
Figure FDA0000463448250000043
for estimating values based on the angle
Figure FDA0000463448250000044
output cosine
Figure FDA0000463448250000045
所述第二正弦发生器(52)的输入端用于接收输出角度估计值
Figure FDA0000463448250000046
用于根据所述角度估计值
Figure FDA0000463448250000047
输出正弦值
Figure FDA0000463448250000048
The input of the second sine generator (52) is used to receive the output angle estimate
Figure FDA0000463448250000046
for estimating values based on the angle
Figure FDA0000463448250000047
output sine
Figure FDA0000463448250000048
所述第五乘法器(53)的第一输入端连接至所述第一正弦发生器(51)的输出端,所述第五乘法器(53)的第二输入端连接所述信号采集模块(3)输出的数字正弦Vs(j),用于将所述数字正弦Vs(j)和所述余弦值
Figure FDA0000463448250000049
相乘;
The first input of the fifth multiplier (53) is connected to the output of the first sinusoidal generator (51), and the second input of the fifth multiplier (53) is connected to the signal acquisition module (3) The output digital sine V s (j), which is used to combine the digital sine V s (j) and the cosine value
Figure FDA0000463448250000049
multiplied;
所述第二反相器(56)的输入端连接至所述第二正弦发生器(52)的输出端,用于将正弦值
Figure FDA00004634482500000410
反相;
The input terminal of the second inverter (56) is connected to the output terminal of the second sine generator (52) for converting the sine value
Figure FDA00004634482500000410
inversion;
所述第六乘法器(54)的第一输入端连接所述信号采集模块(3)输出的数字余弦Vc(j),所述第六乘法器(54)的第二输入端与所述第二反相器(56)的输出端连接,用于将所述数字余弦Vc(j)和所述第二反相器(56)输出值相乘;The first input end of the sixth multiplier (54) is connected to the digital cosine V c (j) output by the signal acquisition module (3), and the second input end of the sixth multiplier (54) is connected to the The output end of the second inverter (56) is connected for multiplying the digital cosine V c (j) and the output value of the second inverter (56); 所述第三加法器(55)的第一输入端连接至所述第五乘法器(53)的输出端,所述第三加法器(55)的第二输入端连接至所述第六乘法器(54)的输出端,用于将所述第五乘法器(53)的输出值和所述第六乘法器(54)的输出值相加得到dq-坐标系的d轴分量
Figure FDA0000463448250000051
The first input end of the third adder (55) is connected to the output end of the fifth multiplier (53), and the second input end of the third adder (55) is connected to the sixth multiplier The output terminal of device (54), is used to add the output value of described the 5th multiplier (53) and the output value of described sixth multiplier (54) to obtain the d axis component of dq - coordinate system
Figure FDA0000463448250000051
所述第七乘法器(57)的第一输入端连接所述信号采集模块(3)输出的数字正弦Vs(j),所述第七乘法器(57)的第二输入端连接至所述第二正弦发生器(52)的输出端,用于将正弦值
Figure FDA0000463448250000052
和数字正弦Vs(j)相乘;
The first input end of the seventh multiplier (57) is connected to the digital sine V s (j) output by the signal acquisition module (3), and the second input end of the seventh multiplier (57) is connected to the Describe the output end of the second sine generator (52), for the sine value
Figure FDA0000463448250000052
Multiply with digital sine V s (j);
所述第八乘法器(58)的第一输入端连接至所述第二余弦发生器(51)的输出端,所述第八乘法器(58)的第二输入端连接所述信号采集模块(3)输出的数字余弦Vc(j),用于将所述数字余弦Vc(j)和所述余弦值
Figure FDA0000463448250000053
相乘;
The first input end of the eighth multiplier (58) is connected to the output end of the second cosine generator (51), and the second input end of the eighth multiplier (58) is connected to the signal acquisition The digital cosine V c (j) that module (3) outputs, is used for described digital cosine V c (j) and described cosine value
Figure FDA0000463448250000053
multiplied;
所述第四加法器(59)的第一输入端连接至所述第七乘法器(57)的输出端,所述第四加法器(59)的第二输入端连接至所述第八乘法器(58)的输出端,用于将第七乘法器(57)的输出值和第八乘法器(58)输出值相加得到dq-坐标系的q轴分量
Figure FDA0000463448250000054
The first input end of the fourth adder (59) is connected to the output end of the seventh multiplier (57), and the second input end of the fourth adder (59) is connected to the eighth multiplier The output terminal of device (58), is used to add the output value of the seventh multiplier (57) and the eighth multiplier (58) output value to obtain the q axis component of dq - coordinate system
Figure FDA0000463448250000054
4.如权利要求1-3任一项所述的磁编码器,其特征在于,所述正向解耦器(6)包括第九乘法器(601)、第三正弦发生器(602)、第三余弦发生器(603)、第十乘法器(604)、第十一乘法器(605)、第五加法器(606)、第一减法器(607)、第十二乘法器(608)、第十三乘法器(609)、第二减法器(610)和第六加法器(611);4. The magnetic encoder according to any one of claims 1-3, characterized in that, the forward decoupler (6) comprises a ninth multiplier (601), a third sinusoidal generator (602), The third cosine generator (603), the tenth multiplier (604), the eleventh multiplier (605), the fifth adder (606), the first subtractor (607), the twelfth multiplier (608 ), the thirteenth multiplier (609), the second subtractor (610) and the sixth adder (611); 所述第九乘法器(601)第一输入端为角度估计值第二输入端为系数2,用于将角度估计值
Figure FDA0000463448250000056
与系数2相乘;
The first input terminal of the ninth multiplier (601) is an angle estimate The second input is the coefficient 2, which is used to convert the angle estimate
Figure FDA0000463448250000056
Multiply with factor 2;
所述第三正弦发生器(602)的输入端用于接收第九乘法器(601)的输出端,用于产生第九乘法器输出量的正弦值
Figure FDA0000463448250000057
The input terminal of the third sine generator (602) is used to receive the output terminal of the ninth multiplier (601), and is used to generate the sine value of the output quantity of the ninth multiplier
Figure FDA0000463448250000057
第三余弦发生器(603)输入端用于接收第九乘法器(601)的输出端,用于产生第九乘法器输出量的余弦值
Figure FDA0000463448250000061
The third cosine generator (603) input is used to receive the output of the ninth multiplier (601), for producing the cosine value of the output of the ninth multiplier
Figure FDA0000463448250000061
所述第十乘法器(604)第一输入端连接至第三余弦发生器(603)的输出端,第二输入端连接至第三低通滤波器输出端,用于将余弦值
Figure FDA0000463448250000062
和第三低通滤波器输出值
Figure FDA0000463448250000063
相乘;
The first input terminal of the tenth multiplier (604) is connected to the output terminal of the third cosine generator (603), and the second input terminal is connected to the output terminal of the third low-pass filter for converting the cosine value
Figure FDA0000463448250000062
and the third low-pass filter output value
Figure FDA0000463448250000063
multiplied;
所述第十一乘法器(605)第一输入端连接至第三正弦发生器(602)输出端,第二输入端连接至第三低通滤波器输出端,用于将正弦值
Figure FDA0000463448250000064
和第四通滤波器输出值
Figure FDA0000463448250000065
相乘;
The first input terminal of the eleventh multiplier (605) is connected to the output terminal of the third sine generator (602), and the second input terminal is connected to the output terminal of the third low-pass filter for converting the sine value
Figure FDA0000463448250000064
and the fourth-pass filter output value
Figure FDA0000463448250000065
multiplied;
所述第五加法器(606)第一输入端连接至将第十乘法器(604)的输出端,第二输入端连接至第十一乘法器(605)输出端,用于将第十乘法器(604)的输出量和第十一乘法器(605)输出量相加;The first input of the fifth adder (606) is connected to the output of the tenth multiplier (604), and the second input is connected to the output of the eleventh multiplier (605), for multiplying the tenth The output of device (604) and the output of the eleventh multiplier (605) are added; 所述第一减法器(607)第一输入端连接至dq+坐标系的d轴输出端,第二输入端连接至第五加法器(606)输出端,用于将dq+坐标系的d轴分里
Figure FDA0000463448250000066
与第五加法器(606)输出量相减,得到正向解耦器的输出值
Figure FDA0000463448250000067
The first input end of the first subtractor (607) is connected to the d-axis output end of the dq + coordinate system, and the second input end is connected to the output end of the fifth adder (606), which is used to convert the d of the dq + coordinate system axis
Figure FDA0000463448250000066
Subtract from the output of the fifth adder (606) to obtain the output value of the forward decoupler
Figure FDA0000463448250000067
第十二乘法器(608)第一输入端连接至第三低通滤波器输出端,第二输入端连接至第三正弦发生器(602)输出端,用于将第三低通滤波器输出值
Figure FDA0000463448250000068
和正弦值
Figure FDA0000463448250000069
相乘;
The first input terminal of the twelfth multiplier (608) is connected to the output terminal of the third low-pass filter, and the second input terminal is connected to the output terminal of the third sine generator (602) for outputting the third low-pass filter value
Figure FDA0000463448250000068
and the sine
Figure FDA0000463448250000069
multiplied;
第十三乘法器(609)第一输入端连接至第四通滤波器输出端,第二输入端连接至第三余弦发生器(603)输出端,用于将第四通滤波器输出值
Figure FDA00004634482500000610
与余弦值
Figure FDA00004634482500000611
相乘;
The first input end of the thirteenth multiplier (609) is connected to the fourth pass filter output end, and the second input end is connected to the third cosine generator (603) output end, for the fourth pass filter output value
Figure FDA00004634482500000610
and cosine
Figure FDA00004634482500000611
multiplied;
第二减法器(610)第一输入端连接至第十二乘法器(608)输出端,第二输入端连接至第十三乘法器(609)输出端,用于将第十二乘法器(608)输出值和第十三乘法器(609)输出值相减;The first input of the second subtractor (610) is connected to the output of the twelfth multiplier (608), and the second input is connected to the output of the thirteenth multiplier (609), for the twelfth multiplier ( 608) output value and the thirteenth multiplier (609) output value are subtracted; 第六加法器(611)第一输入端连接至第二减法器(610)输出端,第二输入端连接至dq+坐标系的q轴分量输出端,用于将第二减法器(610)输出值和dq+坐标系的q轴分量相加得到正向解耦器的输出值
Figure FDA0000463448250000072
The first input end of the sixth adder (611) is connected to the output end of the second subtractor (610), and the second input end is connected to the q-axis component output end of the dq + coordinate system, which is used to connect the second subtractor (610) Output value and q-axis component of the dq + coordinate system Adding to get the output value of the forward decoupler
Figure FDA0000463448250000072
5.如权利要求1-4任一项所述的磁编码器,其特征在于,所述反向解耦器(7)包括第十四乘法器(701)、第四正弦发生器(702)、第四余弦发生器(703)、第十五乘法器(704)、第十六乘法器(705)、第七加法器(706)、第三减法器(707)、第十七乘法器(708)、第十八乘法器(709)、第四减法器(710)和第八加法器(711);5. The magnetic encoder according to any one of claims 1-4, characterized in that, said reverse decoupler (7) comprises a fourteenth multiplier (701), a fourth sinusoidal generator (702) , the fourth cosine generator (703), the fifteenth multiplier (704), the sixteenth multiplier (705), the seventh adder (706), the third subtractor (707), the seventeenth multiplier (708), eighteenth multiplier (709), fourth subtractor (710) and eighth adder (711); 所述第十四乘法器(701)第一输入端连接至角度估计值
Figure FDA0000463448250000073
第二输入端连接至系数2,用于将输出角度估计值
Figure FDA0000463448250000074
与系数2相乘;
The first input of the fourteenth multiplier (701) is connected to the angle estimate
Figure FDA0000463448250000073
The second input is connected to Coefficient 2 for converting the output angle estimate
Figure FDA0000463448250000074
Multiply with factor 2;
所述第四正弦发生器(702)输入端连接至第十四乘法器(701)输出端,用于产生第十四乘法器(701)输出值的正弦值
Figure FDA0000463448250000075
The input of the fourth sine generator (702) is connected to the output of the fourteenth multiplier (701), for generating the sine value of the output value of the fourteenth multiplier (701)
Figure FDA0000463448250000075
所述第四余弦发生器(703)输入端连接至第十四乘法器(701)输出端,用于产生第十四乘法器(701)输出值的余弦值
Figure FDA0000463448250000076
The input of the fourth cosine generator (703) is connected to the output of the fourteenth multiplier (701), for generating the cosine value of the output value of the fourteenth multiplier (701)
Figure FDA0000463448250000076
所述第十五乘法器(704)第一输入端连接至第四余弦发生器(703)输出端,第二输入端连接至第一低通滤波器输出端,用于将余弦值
Figure FDA0000463448250000077
和第一低通滤波器输出值
Figure FDA0000463448250000078
相乘;
The first input end of the fifteenth multiplier (704) is connected to the output end of the fourth cosine generator (703), and the second input end is connected to the output end of the first low-pass filter for converting the cosine value
Figure FDA0000463448250000077
and the first low-pass filter output value
Figure FDA0000463448250000078
multiplied;
所述第十六乘法器(705)第一输入端连接至第四正弦发生器(702)输出端,第二输入端连接至第二低通滤波器输出端,用于将正弦值
Figure FDA0000463448250000079
和第二低通滤波器输出值
Figure FDA00004634482500000710
相乘;
The first input terminal of the sixteenth multiplier (705) is connected to the output terminal of the fourth sine generator (702), and the second input terminal is connected to the output terminal of the second low-pass filter for converting the sine value
Figure FDA0000463448250000079
and the second low-pass filter output value
Figure FDA00004634482500000710
multiplied;
所述第三减法器(707)第一输入端连接至第十六乘法器(705)输出端,第二输入端连接至第十五乘法器(704)的输出端,用于将第十六乘法器(705)输出值和第十五乘法器(704)的输出值相减;The first input end of the third subtractor (707) is connected to the output end of the sixteenth multiplier (705), and the second input end is connected to the output end of the fifteenth multiplier (704), for the sixteenth The output value of the multiplier (705) and the fifteenth multiplier (704) are subtracted; 所述第七加法器(706)第一输入端连接至dq-坐标系的d轴分量输出端,第二输入端连接至第三减法器(707)的输出端,用于将dq-坐标系的d轴分量
Figure FDA00004634482500000711
与第三减法器(707)的输出值相加,得到反向解耦器的输出值 V sd - * ( j ) ;
The first input terminal of the seventh adder (706) is connected to the d-axis component output terminal of the dq - coordinate system, and the second input terminal is connected to the output terminal of the third subtractor (707), which is used to convert the dq - coordinate system to the output terminal of the third subtractor (707). d-axis component of
Figure FDA00004634482500000711
Add the output value of the third subtractor (707) to obtain the output value of the reverse decoupler V sd - * ( j ) ;
所述第十七乘法器(708)第一输入端连接至第一低通滤波器输出端,第二输入端连接至第四正弦发生器(702)输出端,用于将第一低通滤波器输出值和正弦值相乘;The first input terminal of the seventeenth multiplier (708) is connected to the output terminal of the first low-pass filter, and the second input terminal is connected to the output terminal of the fourth sine generator (702), for the first low-pass filter output value and the sine multiplied; 所述第十八乘法器(709)第一输入端连接至第二低通滤波器输出端,第二输入端连接至第四余弦发生器(703)输出端,用于将第二低通滤波器输出值
Figure FDA0000463448250000084
与余弦值
Figure FDA0000463448250000085
相乘;
The first input of the eighteenth multiplier (709) is connected to the output of the second low-pass filter, and the second input is connected to the output of the fourth cosine generator (703) for converting the second low-pass Filter output value
Figure FDA0000463448250000084
and cosine
Figure FDA0000463448250000085
multiplied;
所述第八加法器(711)第一输入端连接至第十七乘法器(708)的输出端,第二输入端连接至第十八乘法器(709)的输出端,用于将第十七乘法器(708)的输出量和第十八乘法器(709)的输出量相加;The first input end of the eighth adder (711) is connected to the output end of the seventeenth multiplier (708), and the second input end is connected to the output end of the eighteenth multiplier (709), for combining the tenth The output of the seventh multiplier (708) and the output of the eighteenth multiplier (709) are added; 所述第四减法器(710)第一输入端连接至dq-坐标系的q轴分量输出端,第二输入端连接至第八加法器(711)的输出端,用于将dq-坐标系的q轴分量
Figure FDA0000463448250000086
与第八加法器(711)的输出量相减,得到反向解耦器输出值
Figure FDA0000463448250000087
The first input terminal of the fourth subtractor (710) is connected to the output terminal of the q-axis component of the dq - coordinate system, and the second input terminal is connected to the output terminal of the eighth adder (711), for converting the dq - coordinate system to the output terminal of the eighth adder (711). The q-axis component of
Figure FDA0000463448250000086
Subtract the output of the eighth adder (711) to obtain the reverse decoupler output value
Figure FDA0000463448250000087
6.如权利要求1-5任一项所述的磁编码器,其特征在于,所述第一低通滤波器(801)、所述第二低通滤波器(802)、所述第三低通滤波器(803)和所述第四低通滤波器(804)结构相同;所述第一低通滤波器(801)包括第十九乘法器(81)、第九加法器(82)、第二十乘法器(83)和第一存储器(84);6. The magnetic encoder according to any one of claims 1-5, characterized in that, the first low-pass filter (801), the second low-pass filter (802), the third Low-pass filter (803) is identical in structure with described 4th low-pass filter (804); Described first low-pass filter (801) comprises the 19th multiplier (81), the 9th adder (82) , the twentieth multiplier (83) and the first memory (84); 所述第十九乘法器(81)第一输入端连接至正向解耦器输出端,第二输入端连接至采样周期T和滤波截止频率ωf乘积T*ωf,用于将正向解耦器输出值
Figure FDA0000463448250000088
和采样周期T和滤波截止频率ωf乘积T*ωf相乘;
The first input terminal of the nineteenth multiplier (81) is connected to the output terminal of the forward decoupler, and the second input terminal is connected to the product T*ω f of the sampling period T and the filter cut-off frequency ω f , which is used to convert the forward Decoupler output value
Figure FDA0000463448250000088
Multiply with the sampling period T and the filter cut-off frequency ω f product T*ω f ;
所述第九加法器(82)第一输入端连接至第十九乘法器(81)输出端,第二输入端连接至第一存储器(84)输出端,用于将第十九乘法器(81)输出值和第一存储器(84)存储的第一低通滤波器输出值的前一时刻的值 V sd + ‾ ( j - 1 ) 相加;The first input end of the ninth adder (82) is connected to the output end of the nineteenth multiplier (81), and the second input end is connected to the output end of the first memory (84), for the nineteenth multiplier ( 81) the value of the previous moment of the first low-pass filter output value stored in the output value and the first memory (84) V sd + ‾ ( j - 1 ) Add; 第二十乘法器(83)第一输入端连接至第九加法器(82)输出端,第二输入端连接至(1+T*ωf)的倒数,用于将第九加法器(82)输出值和(1+T*ωf)的倒数相乘,得到第一低通滤波器输出值 The first input of the twentieth multiplier (83) is connected to the output of the ninth adder (82), and the second input is connected to the reciprocal of (1+T*ω f ), for the ninth adder (82 ) output value and the reciprocal of (1+T*ω f ) are multiplied to obtain the output value of the first low-pass filter
7.如权利要求1-6任一项所述的磁编码器,其特征在于,所述运动信息解算器(9)包括PI调节器(91)和积分器(92);7. The magnetic encoder according to any one of claims 1-6, wherein said motion information solver (9) comprises a PI regulator (91) and an integrator (92); PI调节器(91)包括第二十一乘法器(910)、第二十二乘法器(911)、第五减法器(912)、第十加法器(913)、第十一加法器(914)、第二存储器(915)和第三存储器(916);The PI regulator (91) includes a twenty-first multiplier (910), a twenty-second multiplier (911), a fifth subtractor (912), a tenth adder (913), an eleventh adder (914 ), a second memory (915) and a third memory (916); 所述积分器(92)包括第二十三乘法器(920)、第十二加法器(921)、和第四存储器(922);The integrator (92) includes a twenty-third multiplier (920), a twelfth adder (921), and a fourth memory (922); 所述第二十一乘法器(910)第一输入端连接至正向解耦器输出端,第二输入端连接至比例系数KP,用于将正向解耦器输出值
Figure FDA0000463448250000093
比例系数KP相乘;
The first input terminal of the twenty-first multiplier (910) is connected to the output terminal of the forward decoupler, and the second input terminal is connected to the proportional coefficient K P for converting the output value of the forward decoupler
Figure FDA0000463448250000093
The proportional coefficient K P is multiplied;
所述第五减法器(912)第一输入端连接至系数KI*T,第二输入端连接至系数KP,用于将KI*T与KP相减;The first input terminal of the fifth subtractor (912) is connected to the coefficient K I *T, and the second input terminal is connected to the coefficient K P for subtracting K I *T from K P ; 所述第二十二乘法器(911)第一输入端连接至第二存储器(915)的输出端,第二输入端连接至第二十一乘法器(910)输出端,用于将第二存储器(915)存储的正向解耦器输出值的前一时刻的值
Figure FDA0000463448250000094
)与第二十一乘法器(910)输出量相乘;
The first input of the twenty-second multiplier (911) is connected to the output of the second memory (915), and the second input is connected to the output of the twenty-first multiplier (910), for the second The value at the previous moment of the forward decoupler output value stored in the memory (915)
Figure FDA0000463448250000094
) is multiplied with the twenty-first multiplier (910) output;
所述第十加法器(913)第一输入端连接至第二十一乘法器(910)输出端,第二输入端连接至第二十二乘法器(911)输出端,用于将第二十一乘法器(910)输出值和第二十二乘法器(911)输出值相加;The first input of the tenth adder (913) is connected to the output of the twenty-first multiplier (910), and the second input is connected to the output of the twenty-second multiplier (911), for the second The eleventh multiplier (910) output value and the twenty-second multiplier (911) output value are added; 所述第十一加法器(914)第一输入端连接至第三存储器(916)输出端,第二输入端连接至第十加法器(913)输出端,用于将第三存储器(916)存储的前一时刻角速度值ω(j-1)与第十加法器(913)输出值相加,输出角速度值ω(j);The first input end of the eleventh adder (914) is connected to the output end of the third memory (916), and the second input end is connected to the output end of the tenth adder (913), for the third memory (916) Stored previous moment angular velocity value ω (j-1) is added to the output value of the tenth adder (913), output angular velocity value ω (j); 所述第二十三乘法器(920)第一输入端连接至系数KI*T,第二输入端连接至第三存储器(916)输出端,用于将第三存储器(916)存储的前一时刻角速度值ω(j-1)与KI*T相乘;The first input terminal of the twenty-third multiplier (920) is connected to the coefficient K I *T, and the second input terminal is connected to the output terminal of the third memory (916), which is used to store the previous Multiply the angular velocity value ω(j-1) by K I *T at one moment; 所述第十二加法器(921)第一输入端连接至第二十三乘法器(920)输出端,第二输入端连接至第四存储器(922)输出端,用于将第二十三乘法器(920)输出值与第四存储器(922)存储前一时刻角度值
Figure FDA0000463448250000101
相加,得到角度值
Figure FDA0000463448250000102
The first input terminal of the twelfth adder (921) is connected to the output terminal of the twenty-third multiplier (920), and the second input terminal is connected to the output terminal of the fourth memory (922), for combining the twenty-third The multiplier (920) output value and the fourth memory (922) store the previous moment angle value
Figure FDA0000463448250000101
Add up to get the angle value
Figure FDA0000463448250000102
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