CN103730344B - The method forming the monox lateral wall of metallic silicon tangsten silicide grid - Google Patents
The method forming the monox lateral wall of metallic silicon tangsten silicide grid Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 87
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 17
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 16
- 239000010703 silicon Substances 0.000 title claims abstract description 16
- 229910021332 silicide Inorganic materials 0.000 title claims 5
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title claims 5
- 229910052751 metal Inorganic materials 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 46
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims abstract description 38
- 229910021342 tungsten silicide Inorganic materials 0.000 claims abstract description 38
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 23
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 15
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 239000008367 deionised water Substances 0.000 claims abstract description 7
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 7
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims abstract description 4
- 238000001020 plasma etching Methods 0.000 claims description 19
- 230000003647 oxidation Effects 0.000 claims description 15
- 238000007254 oxidation reaction Methods 0.000 claims description 15
- 239000007789 gas Substances 0.000 claims description 12
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 11
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 11
- 229910052721 tungsten Inorganic materials 0.000 claims description 11
- 239000010937 tungsten Substances 0.000 claims description 11
- 238000000137 annealing Methods 0.000 claims description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 10
- 239000001301 oxygen Substances 0.000 claims description 10
- 229910052760 oxygen Inorganic materials 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 8
- 239000011241 protective layer Substances 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000007788 roughening Methods 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims 1
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 25
- 229920005591 polysilicon Polymers 0.000 abstract description 20
- 230000015556 catabolic process Effects 0.000 abstract description 6
- 230000007547 defect Effects 0.000 abstract description 5
- 239000013078 crystal Substances 0.000 abstract description 2
- 239000000853 adhesive Substances 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 19
- 238000010586 diagram Methods 0.000 description 4
- 229910052731 fluorine Inorganic materials 0.000 description 4
- 239000011737 fluorine Substances 0.000 description 4
- -1 fluorine ions Chemical class 0.000 description 4
- 206010010144 Completed suicide Diseases 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28247—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/28132—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects conducting part of electrode is difined by a sidewall spacer or a similar technique, e.g. oxidation under mask, plating
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Abstract
本发明公开了一种形成金属硅化钨栅极的氧化硅侧墙的方法，包括步骤：形成由栅极氧化层、栅极多晶硅和金属硅化钨组成的栅极结构，栅极结构顶部被光刻胶保护；利用工艺气体包括四氟化碳的RIE工艺对光刻胶进行灰化处理；对RIE工艺后的硅衬底进行去离子水冲洗；进行RTO工艺，在栅极结构侧壁形成氧化硅侧墙。本发明方法能够避免生长氧化硅侧墙时使金属硅化钨的晶粒长大而形成球状凸起，也能避免由于避免由球状凸起引起的尖端放电，提高器件的击穿电压；本发明还能降低工艺成本。本发明方法形成的氧化硅侧墙能减少氮化硅层和栅极多晶硅侧壁之间的应力以及能修复栅极多晶硅侧壁的晶格缺陷。
The invention discloses a method for forming a silicon oxide side wall of a metal tungsten silicide gate, comprising the steps of: forming a gate structure composed of a gate oxide layer, gate polysilicon and metal tungsten silicide, and the top of the gate structure is photoetched Adhesive protection; use process gas including carbon tetrafluoride RIE process to ash the photoresist; rinse the silicon substrate after the RIE process with deionized water; perform RTO process to form silicon oxide on the side wall of the gate structure side wall. The method of the present invention can avoid growing the crystal grains of metal tungsten silicide to form spherical protrusions when growing silicon oxide sidewalls, and can also avoid tip discharge caused by spherical protrusions and improve the breakdown voltage of the device; the present invention also The process cost can be reduced. The silicon oxide side wall formed by the method of the invention can reduce the stress between the silicon nitride layer and the gate polysilicon side wall, and can repair the lattice defects of the gate polysilicon side wall.
Description
技术领域 technical field
本发明涉及一种半导体集成电路制造工艺方法，特别是涉及一种形成金属硅化钨栅极的氧化硅侧墙的方法。The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a method for forming silicon oxide sidewalls of metal tungsten silicide gates.
背景技术 Background technique
在金属硅化钨栅极（Tungsten Polycide）的MOS工艺中，栅极图形刻蚀完成后，需要在栅极结构的侧壁表面形成一层厚度大约为 的氧化硅侧墙做保护层。如图1所示，为现有方法形成的金属硅化钨栅极的氧化硅侧墙的结构示意图；现有方法通常采用炉管的方法在栅极结构的侧壁生长氧化硅侧墙，其中栅极结构包括依次形成于硅衬底101表面的栅极氧化层102、栅极多晶硅103和金属硅化钨104，在金属硅化钨104的表面还形成有氮化硅保护层105，通过在炉管中高温氧化，在所述栅极结构的侧壁表面形成氧化硅侧墙106。现有方法形成的氧化硅侧墙106能够减小后续为自对准工艺（Self-Alignment Contact）生长的氮化硅层与栅极多晶硅103的侧壁之间的应力，可以起到缓冲层的作用；氧化硅侧墙106是通过炉管的高温氧化形成的，所以也能够起到高温修复作用，减少图形刻蚀过程中多晶硅侧壁产生的晶格缺陷；同时，氧化硅侧墙106还能有效地起到绝缘效果，避免了尖端放电，减少了电荷在氮化硅层中聚集，这样对于提高MOS管的侧壁击穿电压起到了很好的作用。In the MOS process of metal tungsten polycide gate (Tungsten Polycide), after the gate pattern is etched, it is necessary to form a layer with a thickness of about The silicon oxide sidewall is used as a protective layer. As shown in Figure 1, it is a schematic structural diagram of the silicon oxide sidewall of the metal tungsten suicide gate formed by the existing method; The electrode structure includes gate oxide layer 102, gate polysilicon 103 and metal tungsten silicide 104 sequentially formed on the surface of silicon substrate 101, and a silicon nitride protective layer 105 is also formed on the surface of metal tungsten silicide 104. High temperature oxidation to form silicon oxide sidewalls 106 on the sidewall surfaces of the gate structure. The silicon oxide sidewall 106 formed by the existing method can reduce the stress between the silicon nitride layer grown in the subsequent self-alignment process (Self-Alignment Contact) and the sidewall of the gate polysilicon 103, and can act as a buffer layer. function; the silicon oxide sidewall 106 is formed by high-temperature oxidation of the furnace tube, so it can also play a role in high-temperature repair and reduce the lattice defects generated by the polysilicon sidewall during pattern etching; at the same time, the silicon oxide sidewall 106 can also It effectively plays an insulating effect, avoids tip discharge, and reduces charge accumulation in the silicon nitride layer, which plays a very good role in improving the sidewall breakdown voltage of the MOS transistor.
虽然炉管方法生长的氧化硅侧墙106，膜质结构致密，但是炉管作业温度较高，容易引起金属硅化钨氧化再结晶，造成晶粒尺寸（Grain Size）长大形成球状(pilling)凸起（pilling）107，球状凸起107对栅极的形貌有较大的影响，情况严重时容易造成尖端放电击穿栅极侧墙，降低MOS管的侧墙击穿电压。Although the silicon oxide side wall 106 grown by the furnace tube method has a dense film structure, the high operating temperature of the furnace tube is likely to cause the oxidation and recrystallization of metal tungsten silicide, resulting in the growth of the grain size (Grain Size) and the formation of spherical (pilling) protrusions. Pilling 107, the spherical protrusion 107 has a great influence on the morphology of the gate, and in severe cases, it is easy to cause tip discharge to break down the sidewall of the gate and reduce the breakdown voltage of the sidewall of the MOS transistor.
发明内容 Contents of the invention
本发明所要解决的技术问题是提供一种形成金属硅化钨栅极的氧化硅侧墙的方法，能避免在金属硅化钨的侧壁形成球状凸起以及避免由球状凸起引起的尖端放电，提高器件的击穿电压，能够降低形成氧化硅侧墙的工艺成本，形成的氧化硅侧墙能很好的减少氮化硅层和栅极多晶硅侧壁之间的应力以及能修复栅极多晶硅侧壁的晶格缺陷。The technical problem to be solved by the present invention is to provide a method for forming the silicon oxide sidewall of the metal tungsten silicide gate, which can avoid the formation of spherical protrusions on the side walls of the metal tungsten silicide and avoid the tip discharge caused by the spherical protrusions, and improve The breakdown voltage of the device can reduce the process cost of forming silicon oxide sidewalls, and the formed silicon oxide sidewalls can well reduce the stress between the silicon nitride layer and the gate polysilicon sidewalls and can repair the gate polysilicon sidewalls lattice defects.
为解决上述技术问题，本发明提供的形成金属硅化钨栅极的氧化硅侧墙的方法包括如下步骤：In order to solve the above-mentioned technical problems, the method for forming the silicon oxide sidewall of the metal tungsten silicide gate provided by the present invention includes the following steps:
步骤一、在硅衬底表面依次形成栅极氧化层、栅极多晶硅和金属硅化钨；采用光刻工艺用光刻胶定义出栅极结构图形区域，以光刻胶为掩模采用刻蚀工艺依次对所述金属硅化钨、所述栅极多晶硅和所述栅极氧化层进行刻蚀形成栅极结构图形。Step 1. Form a gate oxide layer, gate polysilicon and metal tungsten silicide sequentially on the surface of the silicon substrate; use a photolithography process to define a gate structure pattern area with a photoresist, and use the photoresist as a mask to use an etching process The gate structure pattern is formed by etching the metal tungsten silicide, the gate polysilicon and the gate oxide layer in sequence.
步骤二、进行反应离子刻蚀工艺，利用反应离子刻蚀工艺对所述光刻胶进行灰化处理并将所述光刻胶去除；反应离子刻蚀工艺的工艺气体中包括四氟化碳(CF4)，在反应离子刻蚀工艺过程中通过产生的氟离子轰击所述金属硅化钨的侧壁表面并利用氟离子与硅化钨的化学反应使所述金属硅化钨的侧壁表面变粗糙，从而提高所述金属硅化钨的侧壁表面被氧化速率。Step 2, carry out reactive ion etching process, utilize reactive ion etching process to carry out ashing treatment to described photoresist and remove described photoresist; In the process gas of reactive ion etching process, include carbon tetrafluoride ( CF 4 ), bombarding the side wall surface of the metal tungsten silicide by the generated fluorine ions during the reactive ion etching process and roughening the side wall surface of the metal tungsten silicide by the chemical reaction between the fluorine ion and the tungsten silicide, Therefore, the oxidation rate of the sidewall surface of the metal tungsten silicide is increased.
步骤三、对反应离子刻蚀工艺后的所述硅衬底进行去离子水冲洗。Step 3: Rinse the silicon substrate after the reactive ion etching process with deionized water.
步骤四、对去离子水冲洗后的所述硅衬底进行快速热氧化退火处理；所述快速热氧化退火使所述金属硅化钨、所述栅极多晶硅的侧壁表面形成一厚度为100埃～150埃的氧化硅侧墙。Step 4. Perform rapid thermal oxidation annealing treatment on the silicon substrate rinsed with deionized water; the rapid thermal oxidation annealing forms a layer with a thickness of 100 angstroms on the side wall surface of the metal tungsten silicide and the gate polysilicon. ~150 Angstroms of silicon oxide spacers.
进一步的改进是，步骤一中在所述金属硅化钨的表面还形成有氮化硅保护层，用于对所述金属硅化钨进行保护。A further improvement is that in the first step, a silicon nitride protective layer is formed on the surface of the metal tungsten silicide for protecting the metal tungsten silicide.
进一步的改进是，步骤二中所述反应离子刻蚀工艺的工艺气体中还包括三氟甲烷(CHF3)和氧气(O2)。A further improvement is that the process gas of the reactive ion etching process described in the second step also includes trifluoromethane (CHF 3 ) and oxygen (O 2 ).
进一步的改进是，步骤四中的所述快速热氧化退火的工艺温度为975℃、工艺时间为20秒～30秒，工艺气体由氧气和氮气组成，氮气流量为20厘米3/分钟～50厘米3/分钟，氧气的含量为工艺气体的总量的1%～2%。A further improvement is that the process temperature of the rapid thermal oxidation annealing in step 4 is 975°C, the process time is 20 seconds to 30 seconds, the process gas is composed of oxygen and nitrogen, and the flow rate of nitrogen gas is 20 cm 3 /min to 50 cm 3 /min, the content of oxygen is 1% to 2% of the total amount of process gas.
本发明方法通过在用RIE工艺去除栅极结构上方的光刻胶时通入CF4、氧气和CHF3，能够通过CF4和CHF3气体电离产生的氟离子对栅极结构特别是金属硅化钨的侧壁表面进行轰击并使金属硅化钨的侧壁表面变粗糙；金属硅化钨的侧壁表面变粗糙之后，能够提高所述金属硅化钨的侧壁表面被氧化速率、使所述金属硅化钨的侧壁表面更容易被氧化，不需要采用温度高且时间长的炉管工艺来形成氧化硅侧墙，而只需采用RTO工艺就能在栅极结构的侧壁表面形成氧化硅侧墙，采用RTO工艺的时间要短于炉管工艺的高温加热时间，所以本发明方法能够避免由于长时间的高温氧化而使金属硅化钨的晶粒长大而形成球状凸起，也能避免由于避免由球状凸起引起的尖端放电，提高器件的击穿电压。同时本发明采用RTO工艺形成氧化硅侧墙，该工艺的成本更低。本发明方法形成的氧化硅侧墙还能很好的减少氮化硅层和栅极多晶硅侧壁之间的应力以及能修复栅极多晶硅侧壁的晶格缺陷。The method of the present invention passes through CF 4 , oxygen and CHF 3 when removing the photoresist above the gate structure by the RIE process, so that the fluorine ions produced by the ionization of CF 4 and CHF 3 can affect the gate structure, especially the metal tungsten silicide The surface of the side wall of the metal tungsten silicide is bombarded and the surface of the side wall of the metal tungsten silicide is roughened; after the surface of the side wall of the metal tungsten silicide is roughened, the oxidation rate of the side wall surface of the metal tungsten silicide can be increased, so that the metal tungsten silicide The sidewall surface of the gate structure is easier to be oxidized, and there is no need to use a high-temperature and long-time furnace tube process to form a silicon oxide sidewall, but only need to use the RTO process to form a silicon oxide sidewall on the sidewall surface of the gate structure. The time of adopting the RTO process is shorter than the high-temperature heating time of the furnace tube process, so the method of the present invention can avoid the formation of spherical protrusions due to the long-time high-temperature oxidation and the growth of the crystal grains of metal tungsten silicide, and can also avoid the formation of spherical protrusions due to The tip discharge caused by the spherical bump increases the breakdown voltage of the device. At the same time, the present invention adopts the RTO process to form the silicon oxide sidewall, and the cost of the process is lower. The silicon oxide sidewall formed by the method of the invention can also well reduce the stress between the silicon nitride layer and the gate polysilicon sidewall, and can repair the lattice defect of the gate polysilicon sidewall.
附图说明 Description of drawings
下面结合附图和具体实施方式对本发明作进一步详细的说明：Below in conjunction with accompanying drawing and specific embodiment the present invention will be described in further detail:
图1是现有方法形成的金属硅化钨栅极的氧化层侧壁的结构示意图；Fig. 1 is the structure schematic diagram of the side wall of the oxide layer of the metal tungsten silicide gate formed by the existing method;
图2是本发明实施例方法流程图；Fig. 2 is a flow chart of the method of the embodiment of the present invention;
图3A-图3C是本发明实施例方法各步骤中的器件结构示意图。3A-3C are schematic diagrams of device structures in each step of the method of the embodiment of the present invention.
具体实施方式 detailed description
如图2所示，是本发明实施例方法流程图；如图3A至图3C所示，是本发明实施例方法各步骤中的器件结构示意图。本发明实施例形成金属硅化钨栅极的氧化硅侧墙的方法包括如下步骤：As shown in FIG. 2 , it is a flowchart of the method of the embodiment of the present invention; as shown in FIGS. 3A to 3C , it is a schematic diagram of the device structure in each step of the method of the embodiment of the present invention. The method for forming the silicon oxide sidewall of the metal tungsten silicide gate in the embodiment of the present invention includes the following steps:
步骤一、如图3A所示，在硅衬底1表面依次形成栅极氧化层2、栅极多晶硅3、金属硅化钨4，以及在所述金属硅化钨4的表面形成氮化硅保护层5；采用光刻工艺用光刻胶6定义出栅极结构图形区域，以光刻胶6为掩模采用刻蚀工艺依次对所述氮化硅保护层5、所述金属硅化钨4、所述栅极多晶硅3和所述栅极氧化层2进行刻蚀并形成由所述栅极氧化层2、所述栅极多晶硅3和所述金属硅化钨4组成的栅极结构图形，刻蚀时是栅极结构图形区域的所述氮化硅保护层5被光刻胶6保护。Step 1, as shown in FIG. 3A , sequentially form a gate oxide layer 2 , gate polysilicon 3 , metal tungsten silicide 4 on the surface of the silicon substrate 1 , and form a silicon nitride protective layer 5 on the surface of the metal tungsten silicide 4 ; Use the photoresist 6 to define the gate structure pattern area, use the photoresist 6 as a mask and use the etching process to sequentially process the silicon nitride protective layer 5, the metal tungsten silicide 4, the The gate polysilicon 3 and the gate oxide layer 2 are etched to form a gate structure pattern composed of the gate oxide layer 2, the gate polysilicon 3 and the metal tungsten silicide 4, during etching The silicon nitride protection layer 5 in the pattern area of the gate structure is protected by a photoresist 6 .
步骤二、如图3B所示，进行反应离子刻蚀工艺，利用反应离子刻蚀工艺对所述光刻胶6进行灰化处理并将所述光刻胶6去除；反应离子刻蚀工艺的工艺气体中包括四氟化碳、三氟甲烷和氧气，在反应离子刻蚀工艺过程中工艺气体会电离并通过产生的氟离子轰击所述金属硅化钨4的侧壁表面并利用氟离子与硅化钨的化学反应使所述金属硅化钨的侧壁表面变粗糙，反应离子刻蚀工艺后，所述栅极多晶硅3、所述金属硅化钨4和所述氮化硅保护层5的侧壁表面形成一粗糙层7，该粗糙层7更容易被氧化并形成氧化硅。Step 2, as shown in FIG. 3B, perform a reactive ion etching process, and use the reactive ion etching process to ash the photoresist 6 and remove the photoresist 6; the process of the reactive ion etching process The gas includes carbon tetrafluoride, trifluoromethane and oxygen. During the reactive ion etching process, the process gas will be ionized and bombard the side wall surface of the metal tungsten silicide 4 through the generated fluorine ions, and use the fluorine ions to interact with the tungsten silicide. The chemical reaction makes the sidewall surface of the metal tungsten silicide rough, and after the reactive ion etching process, the sidewall surfaces of the gate polysilicon 3, the metal tungsten silicide 4 and the silicon nitride protective layer 5 are formed A rough layer 7 which is more easily oxidized and forms silicon oxide.
步骤三、对反应离子刻蚀工艺后的所述硅衬底1进行去离子水冲洗。Step 3: Rinse the silicon substrate 1 after the reactive ion etching process with deionized water.
步骤四、如图3C所示，对去离子水冲洗后的所述硅衬底1进行快速热氧化退火处理；所述快速热氧化退火使所述氮化硅保护层5、所述金属硅化钨4、所述栅极多晶硅3的侧壁表面形成一厚度为100埃～150埃的氧化硅侧墙8。所述快速热氧化退火的工艺温度为975℃、工艺时间为20秒～30秒，工艺气体由氧气和氮气组成，氮气流量为20厘米3/分钟～50厘米3/分钟，氧气的含量为工艺气体的总量的1%～2%。Step 4, as shown in FIG. 3C , perform rapid thermal oxidation annealing treatment on the silicon substrate 1 rinsed with deionized water; the rapid thermal oxidation annealing makes the silicon nitride protective layer 5 and the metal tungsten silicide 4. A silicon oxide sidewall 8 with a thickness of 100 angstroms to 150 angstroms is formed on the sidewall surface of the gate polysilicon 3 . The process temperature of the rapid thermal oxidation annealing is 975°C, the process time is 20 seconds to 30 seconds, the process gas is composed of oxygen and nitrogen, the flow rate of nitrogen is 20 cm 3 /min to 50 cm 3 /min, and the content of oxygen is the process 1% to 2% of the total amount of gas.
形成上述栅极和侧墙结构之后，后续可以采用和其它现有MOS工艺相同的工艺步骤，形成一个完整的MOS器件，后续工艺如形成轻掺杂源漏区、形成源漏区，形成接触孔以及形成金属连线等步骤。After the above gate and sidewall structures are formed, the same process steps as other existing MOS processes can be used to form a complete MOS device. Subsequent processes such as forming lightly doped source and drain regions, forming source and drain regions, and forming contact holes And steps such as forming metal connection.
本发明实施例中通过含有CF4、CHF3和O2的反应离子刻蚀工艺对栅极结构的侧壁表面进行处理后，形成了一层更加容易氧化的粗糙层7，粗糙层7的形成，使得本发明实施例中不必要采用炉管工艺，而只采用快速热氧化退火就能形成氧化硅侧墙8。这样不仅能够降低工艺成本，还能避免采用炉管工艺时球形凸起的形成，从而能防止栅极侧墙的击穿，提高栅极侧墙的耐压能力。本发明方法形成的氧化硅侧墙8还能很好的减少氮化硅层和栅极多晶硅3侧壁之间的应力以及能修复栅极多晶硅3侧壁的晶格缺陷。In the embodiment of the present invention, after the sidewall surface of the gate structure is treated by a reactive ion etching process containing CF 4 , CHF 3 and O 2 , a rough layer 7 that is easier to oxidize is formed. The formation of the rough layer 7 , so that the furnace tube process is unnecessary in the embodiment of the present invention, and the silicon oxide sidewall 8 can be formed only by rapid thermal oxidation annealing. This can not only reduce the process cost, but also avoid the formation of spherical protrusions when the furnace tube process is adopted, thereby preventing the breakdown of the grid side wall and improving the voltage resistance of the grid side wall. The silicon oxide sidewall 8 formed by the method of the present invention can also well reduce the stress between the silicon nitride layer and the sidewall of the gate polysilicon 3 and can repair the lattice defects of the sidewall of the gate polysilicon 3 .
以上通过具体实施例对本发明进行了详细的说明，但这些并非构成对本发明的限制。在不脱离本发明原理的情况下，本领域的技术人员还可做出许多变形和改进，这些也应视为本发明的保护范围。The present invention has been described in detail through specific examples above, but these do not constitute a limitation to the present invention. Without departing from the principle of the present invention, those skilled in the art can also make many modifications and improvements, which should also be regarded as the protection scope of the present invention.
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