CN103681815A - Transversal bipolar transistor with low-ratio on-resistance - Google Patents

Abstract

The invention discloses a lateral bipolar transistor with low specific on-resistance, comprising: a substrate; a first RESURF region arranged on the substrate; a collector region, a base region, and an emitter region arranged in sequence; wherein, the base A base ohmic contact area is formed in the area, and a base is arranged on the ohmic contact area of the base area; a collector ohmic contact area is formed in the collector area, and a collector is arranged on the ohmic contact area of the collector area. An electrode; the emitting region is provided with an emitter, which is used for the second RESURF region to smooth the change of the electric field in the drift region. By setting the second RESURF region, the electric field in the drift region of the lateral bipolar transistor can be flattened, so that a higher reverse blocking voltage and lower on-resistance can be achieved under the same length of the drift region.

Description

Lateral Bipolar Transistor with Low Specific On-Resistance

technical field

The invention relates to a power semiconductor device and a manufacturing method thereof, in particular to a lateral bipolar transistor with low specific on-resistance.

Background technique

Power semiconductor devices are also called electronic power devices. With the development of power integrated circuits, especially single-chip power integrated systems, power semiconductor devices are booming. The electrodes of the lateral power device are located on the surface of the chip, and it is easy to realize mutual integration with low-voltage signal circuits and other devices through internal connections. Therefore, lateral power devices are widely used in power integrated circuits. In power integrated circuits, lateral power devices often account for more than half of the entire chip area, and are the core and key of the entire power integrated circuit. Moreover, with the development of modern power integrated circuits, higher requirements are put forward for the performance of lateral power devices, requiring lateral power devices to have higher breakdown voltage capability, low on-resistance, high operating frequency and so on.

As one of the mainstream lateral power devices, the lateral bipolar transistor LBJT is a power electronic device with a basic structure of NPN or PNP composed of two reversely connected PN junctions, and obtains its switching effects through base-collector current drive. It has the advantages of large small signal transconductance, high cut-off frequency, and good noise characteristics, and is widely used in power integrated circuits. Lateral bipolar transistors are also called planar bipolar transistors.

Chinese patent document CN102610638A discloses a Si-BJT device for power integrated circuits and its manufacturing method, including SiC substrate, p-type buffer layer, n-type collector region, p-type base region, n-type Type emitter region, passivation layer, p-type ohmic contact region on both sides of p-type base region, n-type ohmic contact region on both sides of n-type emitter region, emitter on n-type emitter region, base on p-type ohmic contact The upper and collector electrodes are located on the n-type ohmic contact region, a guard ring with a length of 0.2-0.6um is provided at the interface between the collector region and the base region, and a field plate is arranged at the base collector electrode. The above-mentioned patent documents disclose a single RESURF structure, but in this structure, the doping dose of the drift region has an opposite effect on the reverse blocking voltage and the specific on-resistance, that is, the doping dose increases, and the reverse blocking voltage is obtained As it increases, the specific on-resistance also increases. This property makes it necessary to sacrifice specific on-resistance and increase power consumption in order to obtain high withstand voltage in device design.

Contents of the invention

For this reason, what the present invention is to solve is that the dopant dose in the drift region of the lateral bipolar transistor of the existing SINGLE RESURF structure has an opposite effect on the reverse blocking voltage and the specific on-resistance. Voltage and at the same time reduce the technical problem of specific on-resistance, and provide a lateral bipolar transistor with low specific on-resistance.

In order to solve the problems of the technologies described above, the technical scheme adopted in the present invention is as follows:

A lateral bipolar transistor with low specific on-resistance comprising,

substrate;

a first RESURF region disposed on the substrate;

A collector region, a base region, and an emitter region arranged in sequence; wherein, a base ohmic contact region is formed in the base region, and a base is arranged on the base region ohmic contact region; a collector region is formed in the collector region The ohmic contact area of the electric region, the collector electrode is arranged on the ohmic contact region of the collector region; the emitter electrode is arranged on the emission region, which is used for the second RESURF region to smooth the electric field change of the drift region.

The second RESURF region is formed in the collector region by ion implantation.

The length of the second RESURF region is two-thirds of the length of the drift region of the lateral bipolar transistor.

The second RESURF region is a P-type RESURF region.

The substrate is a silicon carbide substrate;

The first RESURF region is a silicon carbide epitaxial layer disposed on the upper surface of the silicon carbide substrate;

The collector region is an N-type collector region disposed on the upper surface of the first RESURF region;

The base region is a P-type base region disposed on the upper surface of the N-type collector region;

The emitting region is an N-type emitting region arranged on the upper surface of the P-type base region.

The substrate is a gallium nitride substrate;

The first RESURF region is a gallium nitride epitaxial layer disposed on the upper surface of the gallium nitride substrate;

The collector region is an N-type collector region disposed on the upper surface of the first RESURF region;

The base region is a P-type base region disposed on the upper surface of the N-type collector region;

The emitting region is an N-type emitting region arranged on the upper surface of the P-type base region.

The first RESURF region is a P-type RESURF region.

The above technical solution of the present invention has the following advantages compared with the prior art:

The lateral bipolar transistor of the present invention includes a substrate; a first RESURF region disposed on the substrate; a collector region, a base region, and an emitter region arranged in sequence; wherein, a base region ohmic contact is formed in the base region A base is provided on the ohmic contact area of the base area; a collector ohmic contact area is formed in the collector area, and a collector is provided on the ohmic contact area of the collector area; There is an emitter electrode, which is used for the second RESURF region to gently change the electric field in the drift region; by setting the second RESURF region, the electric field in the drift region of the lateral bipolar transistor can be flattened, so that under the same drift region length, it can reach Higher reverse blocking voltage; at the same time, the specific on-resistance of the entire device is reduced, and the specific on-resistance of the device is increased by at least two times compared with the case of single resurf while improving the same withstand voltage level of the device. Power consumption is greatly reduced. .

The second RESURF region is set in the collector region by means of ion implantation, which does not occupy the external space of the lateral bipolar transistor and has a more compact structure.

By setting the length of the second RESURF region to two-thirds of the length of the drift region of the lateral bipolar transistor, higher reverse blocking voltage and lower on-resistance can be obtained.

Description of drawings

In order to make the content of the present invention more easily understood, the present invention will be described in further detail below according to specific embodiments of the present invention in conjunction with the accompanying drawings, wherein

FIG. 1 is a schematic structural view of an NPN type lateral bipolar transistor according to an embodiment of the present invention;

FIG. 2 is a schematic structural diagram of a lateral bipolar transistor according to a second embodiment of the present invention.

The reference numerals in the figure are expressed as: 2-substrate, 3-first RESURF region, 4-collector region 4,5-implanted second RESURF region, 51-epitaxial second RESURF region, 6-collector region Ohmic contact area, 7-base area, 8-base area ohmic contact area 8, 9-collector 9, 10-emitter 10, 11-base, 12-emitter 12.

Detailed ways

Referring to Fig. 1, the NPN lateral bipolar transistor according to Embodiment 1 of the present invention includes, from bottom to top:

P+ silicon carbide substrate 2;

P-silicon carbide epitaxial layer, the P-silicon carbide epitaxial layer constitutes a P-type first RESURF region 3;

An N-type collector region 4 is formed by epitaxy on the P-silicon carbide, and an N ⁺ collector region ohmic contact region 6 and an implanted second collector region 4 are formed by ion implantation near the upper surface of the N-type collector region 4 RESURF region 5, wherein, collector electrode 9 is arranged on the ohmic contact region 6 of the N+ collector region; the injection-type second RESURF region 5 is used to smooth the electric field change in the drift region, as a specific embodiment of the present invention, the The second RESURF region 5 is a P-type RESURF region, and the length of the second RESURF region 5 is two-thirds of the length of the drift region of the lateral bipolar transistor, and the thickness is the length of the drift region of the lateral bipolar transistor. one-third of

A P-type base region 7, a base ohmic contact region 8 is formed by ion implantation near the upper surface of the P-type base region 7, and a base 11 is disposed on the base ohmic contact region 8;

An N-type emitter region 10, on which an emitter 12 is arranged.

In this embodiment, corresponding ion implantation and high-temperature annealing are required after each epitaxy, which has ensured minimal negative impact on the performance of the lateral bipolar transistor.

Referring to FIG. 2, the NPN lateral bipolar transistor according to Embodiment 2 of the present invention includes, from bottom to top:

GaN substrate 2;

a gallium nitride epitaxial layer, the gallium nitride epitaxial layer constituting the P-type first RESURF region 3;

An N-type collector region 4, wherein a collector ohmic contact region 6 is formed by ion implantation near the upper surface of the N-type collector region 4, and a collector electrode 9 is arranged on the collector ohmic contact region 6;

A P-type base region 7, a base ohmic contact region 8 is formed by ion implantation near the upper surface of the P-type base region 7, and a base 11 is disposed on the base ohmic contact region 8;

An N-type emitter region 10, an emitter 12 is arranged on the N-type emitter region 10;

The epitaxial second RESURF region 51 is epitaxially disposed on the upper surface of the collector region 4 for smoothing the electric field change in the drift region. As a specific embodiment of the present invention, the second RESURF region 51 is a P-type RESURF region, and the length of the second RESURF region 51 is two-thirds of the length of the drift region of the lateral bipolar transistor, which can obtain Better effect of increasing reverse blocking voltage and reducing specific on-resistance.

As a modification of the above two embodiments, the P-type second RESURF region in the above embodiments can be replaced by an N-type RESURF region, which can also achieve the purpose of the invention and belongs to the protection scope of the present invention.

As other embodiments, the length of the second RESURF region is not limited to two-thirds of the drift region length, and other embodiments are the same as the above embodiments, and the purpose of the present invention can be achieved, which belongs to the protection scope of the present invention.

As other embodiments of the present invention, the second RESURF can also be set in a PNP type lateral bipolar transistor to play the same role and achieve the purpose of the present invention, which belongs to the protection scope of the present invention.

In the lateral bipolar transistor of the present invention, by setting the second RESURF, the potential lines in the drift region can be more uniformly distributed, and the doping in the drift region is also higher, so that under the same length of the drift region, a higher High reverse blocking voltage and lower on-resistance.

Apparently, the above-mentioned embodiments are only examples for clear description, rather than limiting the implementation. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. And the obvious changes or changes derived therefrom are still within the scope of protection of the present invention.

Claims (7)

1. a lateral bipolar transistor npn npn for low conduction resistance, comprises,

Substrate;

Be arranged at the Yi RESURF district on substrate;

The collector region setting gradually, base and emitter region; Wherein, be formed with ohmic contact regions, base in described base, described base is provided with base stage on ohmic contact regions; In described collector region, be formed with ohmic contact regions, collector region, described collector region is provided with collector electrode on ohmic contact regions; On described emitter region, be provided with emitter, it is characterized in that, also comprise: for the Er RESURF district of mild drift region electric field change.

2. lateral bipolar transistor npn npn according to claim 1, is characterized in that: described Er RESURF district is formed in described collector region by Implantation.

3. lateral bipolar transistor npn npn according to claim 1 and 2, is characterized in that: described the 2nd RESURF section length is 2/3rds of described lateral bipolar transistor npn npn drift region length.

4. lateral bipolar transistor npn npn according to claim 3, is characterized in that: described Er RESURF district is P type RESURF district.

5. lateral bipolar transistor npn npn according to claim 4, is characterized in that:

Described substrate is silicon carbide substrates;

Described Yi RESURF district is the silicon carbide epitaxial layers that is arranged on described silicon carbide substrates upper surface;

Described collector region is the N-type collector region that is arranged at described Yi RESURF district upper surface;

Described base is the P type base that is arranged at described N-type collector region upper surface;

Described emitter region is the N-type emitter region that is arranged on described P type base upper surface.

6. lateral bipolar transistor npn npn according to claim 4, is characterized in that:

Described substrate is gallium nitride substrate;

Described Yi RESURF district is the epitaxial layer of gallium nitride that is arranged on described gallium nitride substrate upper surface;

Described collector region is the N-type collector region that is arranged at described Yi RESURF district upper surface;

Described base is the P type base that is arranged at described N-type collector region upper surface;

Described emitter region is the N-type emitter region that is arranged on described P type base upper surface.

7. according to the lateral bipolar transistor npn npn described in claim 5 or 6, it is characterized in that: described Yi RESURF district is P type RESURF district.

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