CN109768090A - A silicon carbide trench field oxygen power MOS device with built-in heterojunction diode self-protection - Google Patents
A silicon carbide trench field oxygen power MOS device with built-in heterojunction diode self-protection Download PDFInfo
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 48
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 48
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 title claims abstract description 32
- 229910052760 oxygen Inorganic materials 0.000 title claims abstract description 32
- 239000001301 oxygen Substances 0.000 title claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 26
- 229910052751 metal Inorganic materials 0.000 claims abstract description 26
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 39
- 229920005591 polysilicon Polymers 0.000 claims description 31
- 239000004065 semiconductor Substances 0.000 claims description 16
- 108010075750 P-Type Calcium Channels Proteins 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 9
- 238000009792 diffusion process Methods 0.000 claims description 8
- 239000010410 layer Substances 0.000 abstract description 33
- 239000011241 protective layer Substances 0.000 abstract description 15
- 230000004888 barrier function Effects 0.000 abstract description 4
- 230000005684 electric field Effects 0.000 abstract description 4
- 238000000137 annealing Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 230000015556 catabolic process Effects 0.000 abstract description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 9
- 150000004706 metal oxides Chemical class 0.000 description 9
- 238000010586 diagram Methods 0.000 description 4
- 108091006146 Channels Proteins 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000002779 inactivation Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
- H10D84/141—VDMOS having built-in components
- H10D84/146—VDMOS having built-in components the built-in components being Schottky barrier diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
- H10D62/107—Buried supplementary regions, e.g. buried guard rings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/157—Impurity concentrations or distributions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/82—Heterojunctions
- H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
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- Electrodes Of Semiconductors (AREA)
Abstract
本发明公开了一种具有内嵌异质结二极管自保护的碳化硅槽型场氧功率MOS器件，一方面在常规的槽型场氧器件基础上采用异质结肖特基二极管结构，即多晶硅与碳化硅直接接触，在降低器件制造成本的同时，降低JFET区域的电阻从而减小器件的导通损耗，消除由于肖特基金属退火温度差引起的肖特基势垒不可控的可靠性问题，从而达到降低具有二极管结构的碳化硅槽型场氧器件的工艺制造难度。另一方面，在槽型结构底部采用P型保护层来有效降低栅极氧化层的电场强度，增加器件的可靠性，缓解MOS器件击穿电压与导通电阻之间的问题。
The invention discloses a silicon carbide trough field oxygen power MOS device with self-protection of embedded heterojunction diodes. Direct contact with silicon carbide reduces the manufacturing cost of the device, reduces the resistance of the JFET region and thus reduces the conduction loss of the device, and eliminates the uncontrollable reliability problem of the Schottky barrier caused by the difference in the Schottky metal annealing temperature , so as to reduce the manufacturing difficulty of the silicon carbide trench field oxygen device with the diode structure. On the other hand, a P-type protective layer is used at the bottom of the trench structure to effectively reduce the electric field strength of the gate oxide layer, increase the reliability of the device, and alleviate the problem between the breakdown voltage and on-resistance of the MOS device.
Description
Technical field
The invention belongs to field of semiconductor, and in particular to a kind of with embedded heterojunction diode self-shield
Silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device.
Background technique
Due to highdensity cellular, ultralow conducting resistance and outstanding switching characteristic, silicon carbide (SiC) groove MOSFET
It is widely used in power-supply system, excellent electrical characteristic is verified in many electric system application.So
And a critical issue of silicon carbide groove MOSFET is the gate oxide reliability for increasing channel bottom, but does not increase knot
The resistance in the region type field effect transistor (JFET).The silicon carbide groove MOSFET of improvement has p-type protective layer structure and current-carrying
Sub- diffusion layer (CSL), principle are respectively under trench oxide layer and channel using highly doped p+ layers and n-layer, and current power
Weigh one of gate oxide reliability and the solution of resistance in the region JFET.
As shown in Figure 1,1 is N-type substrate layer, 2 drift about typical silicon carbide groove profile field oxygen power MOS device construction for N-type
Area, 3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N-type source region, and 6 be grid oxide layer, and 7 be grid polycrystalline silicon, and 8 protect for P+
Sheath, 10 be source metal, and 11 be drain metal.The more traditional groove profile device of the structure can greatly reduce the electric field of grid oxic horizon
Intensity, and grid capacitance is reduced, increase devices switch speed.In general, when silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device is in electricity
When working in the system of source, silicon carbide schottky barrier diode (SiC SBD) answer it is connected in parallel, to prevent by silicon carbide groove profile field
There is P-type channel area, drift region and substrate form a parasitic body diode movement and cause body inside oxygen power MOS device construction
Diode deterioration, causes entire device reliability to reduce.A SiC schottky diode in parallel cause additional chip at
This, electric system loss and undesirable stray inductance.These factors are the design band of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device
Challenge newly is carried out.
On this basis, a kind of silicon carbide groove profile field oxide structure with built-in Schottky diode is suggested, and sees Fig. 2, and 1
It is N-type drift region for N-type substrate layer, 2,3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N-type source region, and 6 be grid oxygen
Layer, 7 be grid polycrystalline silicon, and 9 be P protective layer, and 10 be source metal, and 11 be drain metal, and 12 be schottky metal knot.Compare figure
1, the maximum improvement of the silicon carbide groove profile field oxide structure with built-in Schottky diode is to use integrated groove profile Schottky
Diode structure, therefore transistor size can be maximally reduced, it also lays the foundation for the miniaturization of system, related content
It can be seen that bibliography: Kobayashi, Yusuke, et al. " Body PiN diode inactivation with low on-
resistance achieved by a 1.2kV-class 4H-SiC SWITCH-MOS."2017 IEEE
International of Electron Devices Meeting(IEDM).IEEE,2017。
Therefore in order to further decrease the technique manufacture difficulty of the silicon carbide groove profile field oxide device with diode structure, delay
The problem of solving between device electric breakdown strength and conducting resistance has the silicon carbide groove profile field oxygen device of similar Schottky diode structure
The further research of part becomes worldwide research hotspot.
Summary of the invention
In view of this, the purpose of the present invention is to provide a kind of silicon carbide tanks with embedded heterojunction diode self-shield
Type field oxygen power MOS (Metal Oxide Semiconductor) device.
For achieving the above object, the invention provides the following technical scheme:
1, a kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with embedded heterojunction diode self-shield, the MOS device
Part successively includes drain metal 11, N-type substrate layer 1, N-type drift region 2, N-type carrier diffusion region 3, P-type channel layer from the bottom up
4, source metal 10, the MOS device are additionally provided with P protective layer 9, N-type source region 5, source polysilicon 8 and groove profile gate electrode,
The groove profile gate electrode uses splitting grid structure, and the P protective layer 9 is set to below groove profile gate electrode and side, the slot
Type gate electrode and the source polysilicon 8 share the P protective layer 9, the 9 semi-surrounding groove profile gate electrode of P protective layer and leakage
Pole polysilicon 8.
Preferably, the groove profile gate electrode includes grid oxide layer 6 and grid polycrystalline silicon 7, and the grid oxide layer 6 surrounds gate polycrystalline
Silicon 7.
Preferably, the grid polycrystalline silicon 7 is N-type or p-type polysilicon.
Preferably, the 8 semi-surrounding grid oxide layer 6 of source polysilicon or it is placed in the lower section of grid oxide layer 6.
Preferably, the part source electrode includes source polysilicon 8.
Preferably, the source polysilicon 8 is p-type polysilicon.
Preferably, the source polysilicon 8 is set to the lower part of the source metal 10.
Preferably, the groove profile gate electrode and the lower part of the source metal 10, the side of N-type source region 5, P-type channel layer 4
Side contact.
Preferably, the side of the N-type source region 5 is contacted with the side of the groove profile gate electrode, the bottom of the N-type source region 5
Portion is contacted with another side with the P-type channel layer 4, and the top of the N-type source region 5 and the lower part of the source metal 10 connect
Touching.
Preferably, the material of the P protective layer 9 is semiconductor material with wide forbidden band.
Preferably, the semiconductor material with wide forbidden band is GaN.
The beneficial effects of the present invention are:
1, a kind of silicon carbide groove profile field oxygen power MOS devices with embedded heterojunction diode self-shield disclosed by the invention
Groove profile gate electrode uses splitting grid structure in part, i.e. gate electrode is filled only with part trench structure, and another part formation one is different
Matter junction Schottky diode structure, i.e. source polysilicon are directly contacted with silicon carbide.This structure is on the one hand in the device system of reduction
It causes this while that can eliminate the uncontrollable reliability of Schottky barrier due to caused by schottky metal annealing temperature difference to ask
Topic；On the other hand, existing silicon carbide and silicon carbide are compared with the Built-in potential region that silicon carbide contact is formed due to polysilicon
It is small to contact the Built-in potential region formed, therefore silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device JFET resistance can be effectively reduced；
2, a kind of silicon carbide groove profile field oxygen power MOS devices with embedded heterojunction diode self-shield disclosed by the invention
Part uses p-type protective layer below groove profile grid, channel bottom can be effectively reduced on the basis of conventional groove profile field oxide device
Grid oxic horizon and heterojunction schottky diode structure electric field strength, to effectively increase device reliability.
Detailed description of the invention
In order to keep the purpose of the present invention, technical scheme and beneficial effects clearer, the present invention provides following attached drawing:
Fig. 1 is conventional silicon carbide groove profile field oxide device structural schematic diagram；
Fig. 2 is the silicon carbide groove profile field oxide device structural schematic diagram with Schottky diode；
Fig. 3 is a kind of silicon carbide groove profile field oxygen power MOS devices with embedded heterojunction diode self-shield of the invention
Part structural schematic diagram；
Fig. 4 is the silicon carbide groove profile field oxygen power MOS that another kind of the invention has embedded heterojunction diode self-shield
Device architecture schematic diagram；
Wherein, 1 is N-type substrate layer, and 2 be N-type drift region, and 3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N-type
Source region, 6 be grid oxide layer, and 7 be grid polycrystalline silicon, and 8 be source polysilicon, and 9 be P protective layer, and 10 be source metal, and 11 be drain electrode gold
Belong to.
Specific embodiment
Below by a preferred embodiment of the present invention will be described in detail.The experiment of actual conditions is not specified in embodiment
Method, usually according to conventional conditions or according to the manufacturer's recommendations.
A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with embedded heterojunction diode self-shield, 1 is N-type substrate
Layer, 2 be N-type drift region, and 3 be N-type carrier diffusion region, and 4 be P-type channel layer, and 5 be N-type source region, and 6 be grid oxide layer, and 7 be grid
Polysilicon, 8 be source polysilicon, and 9 be P protective layer, and 10 be source metal, and 11 be drain metal, and structure is as shown in Figures 3 and 4,
Wherein 8 semi-surrounding grid oxide layer of source polysilicon in Fig. 3, and source polysilicon 8 is placed in the lower section of grid oxide layer in Fig. 4.
A kind of silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device with embedded heterojunction diode self-shield, the MOS device
Including from the bottom up successively including drain metal 11, N-type substrate layer 1, N-type drift region 2, N-type carrier diffusion region 3, P-type channel
Layer 4, source metal 10, are arranged P protective layer 9, N-type source region 5, groove profile gate electrode, the 9 semi-surrounding source polysilicon 8 of P protective layer
And grid.
Above-mentioned groove profile gate electrode includes grid oxide layer 6 and grid polycrystalline silicon 7 in the present invention, wherein the grid polycrystalline silicon 7 is N
Type or p-type polysilicon.
Above-mentioned polysilicon 8 is p-type polysilicon in the present invention.
Also have following positional relationship in MOS device structure of the invention: the groove profile source electrode is set to the source electrode
The lower part of metal 10；The groove profile gate electrode and the lower part of the source metal 10, the side of N-type source region 5, P-type channel layer 4
Side contact；The side of the N-type source region 5 is contacted with the side of the groove profile gate electrode, the bottom and the other side of N-type source region 5
Face is contacted with the P-type channel layer 4, the lower contacts on the top of the N-type source region 5 and the source metal 10.
In addition the material of the P protective layer 9 is semiconductor material with wide forbidden band, and the semiconductor material with wide forbidden band is GaN.
A kind of silicon carbide groove profile field oxygen power MOS devices with embedded heterojunction diode self-shield disclosed by the invention
Part is arranged p-type protective layer using groove profile gate electrode, entire grid can be effectively reduced on the basis of conventional groove profile field oxide device
The electric field strength of oxide layer increases the reliability of device；In addition one kind disclosed by the invention has embedded heterojunction diode certainly
Trench structure uses splitting grid structure in the silicon carbide groove profile field oxygen power MOS (Metal Oxide Semiconductor) device of protection, i.e. gate electrode only takes up part
Trench structure；With heterojunction schottky diode structure, i.e. polysilicon is directly contacted with silicon carbide.Reducing device JFET resistance
Meanwhile eliminating the uncontrollable integrity problem of Schottky barrier due to caused by schottky metal annealing temperature difference.
Finally, it is stated that preferred embodiment above is only used to illustrate the technical scheme of the present invention and not to limit it, although logical
It crosses above preferred embodiment the present invention is described in detail, however, those skilled in the art should understand that, can be
Various changes are made to it in form and in details, without departing from claims of the present invention limited range.
Claims (10)
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111029398A (en) * | 2019-11-24 | 2020-04-17 | 中电国基南方集团有限公司 | Groove type MOSFET power device and preparation method thereof |
| CN111403486A (en) * | 2020-03-30 | 2020-07-10 | 中国科学院微电子研究所 | A trench MOSFET structure and method of making the same |
| CN117038737A (en) * | 2023-09-21 | 2023-11-10 | 重庆大学 | A silicon carbide MOSFET device with integrated JFET structure |
| CN117080269A (en) * | 2023-10-13 | 2023-11-17 | 深圳基本半导体有限公司 | Silicon carbide MOSFET device and preparation method thereof |
| CN117393585A (en) * | 2023-12-07 | 2024-01-12 | 深圳市冠禹半导体有限公司 | A high drive capability MOSFET device and its drive circuit |
| CN118099221A (en) * | 2024-04-19 | 2024-05-28 | 深圳天狼芯半导体有限公司 | Silicon carbide power device and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117038737A (en) * | 2023-09-21 | 2023-11-10 | 重庆大学 | A silicon carbide MOSFET device with integrated JFET structure |
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| CN117393585A (en) * | 2023-12-07 | 2024-01-12 | 深圳市冠禹半导体有限公司 | A high drive capability MOSFET device and its drive circuit |
| CN117393585B (en) * | 2023-12-07 | 2024-04-05 | 深圳市冠禹半导体有限公司 | A MOSFET device with high driving capability and its driving circuit |
| CN118099221A (en) * | 2024-04-19 | 2024-05-28 | 深圳天狼芯半导体有限公司 | Silicon carbide power device and manufacturing method thereof |
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Application publication date: 20190517 |