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CN103606513B - A kind of manufacture method of semiconductor capacitor - Google Patents

A kind of manufacture method of semiconductor capacitor Download PDF

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CN103606513B
CN103606513B CN201310557608.XA CN201310557608A CN103606513B CN 103606513 B CN103606513 B CN 103606513B CN 201310557608 A CN201310557608 A CN 201310557608A CN 103606513 B CN103606513 B CN 103606513B
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silicon oxide
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张翠
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Liyang Technology Development Center
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LIYANG JIANGDA TECHNOLOGY TRANSFER CENTER Co Ltd
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    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
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Abstract

本发明公开了一种半导体电容器的制造方法,包括提供衬底,在衬底上形成金属层-氧化硅层-氮化硅层-氧化硅层-金属层(MONOM)的堆栈结构,以形成半导体电容器。

The invention discloses a method for manufacturing a semiconductor capacitor, which includes providing a substrate and forming a stack structure of metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer (MONOM) on the substrate to form a semiconductor capacitor. capacitor.

Description

一种半导体电容器的制造方法A method of manufacturing a semiconductor capacitor

技术领域technical field

本发明属于半导体集成电路领域的制造领域,特别涉及一种半导体电容器的制造方法。The invention belongs to the manufacturing field of the semiconductor integrated circuit field, and in particular relates to a manufacturing method of a semiconductor capacitor.

背景技术Background technique

随着半导体技术的发展,集成电路器件结构越来越复杂。电容器是集成电路芯片中的重要器件。现有技术中,集成电路芯片中的电容器通常为金属-绝缘体-金属结构。这种电容器结构简单,易于集成,因此在集成电路中应用广泛。但是现有技术中的这种电容器结构一般采用单电介质层结构,也就是在两块金属极板之间形成单层绝缘电介质层以组成电容器。绝缘层一般由单层氧化硅或者氮化硅来构成,这种电容器虽然结构简单,但其最大的缺陷是电容值不稳定。这是因为绝缘层会产生界面态以及静电荷等多种状态的改变,从而导致电容值随电压变化,因此会影响到电路的正常工作。With the development of semiconductor technology, the structure of integrated circuit devices is becoming more and more complex. Capacitors are important devices in integrated circuit chips. In the prior art, capacitors in integrated circuit chips are usually metal-insulator-metal structures. This kind of capacitor has a simple structure and is easy to integrate, so it is widely used in integrated circuits. However, the capacitor structure in the prior art generally adopts a single dielectric layer structure, that is, a single insulating dielectric layer is formed between two metal plates to form a capacitor. The insulating layer is generally composed of a single layer of silicon oxide or silicon nitride. Although this type of capacitor has a simple structure, its biggest defect is that the capacitance value is unstable. This is because the insulating layer will produce changes in various states such as interface states and electrostatic charges, which will cause the capacitance value to change with the voltage, thus affecting the normal operation of the circuit.

而且,目前形成氧化硅、氮化硅绝缘层的方法通常采用全流程热氧化工艺,这种工艺不仅具有低密度结构,而且制造过程缓慢,不利于提高产能。Moreover, the current method of forming silicon oxide and silicon nitride insulating layers usually adopts a full-process thermal oxidation process, which not only has a low-density structure, but also has a slow manufacturing process, which is not conducive to increasing production capacity.

发明内容Contents of the invention

有鉴于此,本发明针对现有技术的问题,提出了一种半导体电容器的制造方法。通过本发明的方法可以制得致密的氧化硅绝缘层,从而降低低缺陷的密度,克服电容值不稳定的问题,而且制造过程快速简便,从而有利于产能的提高。In view of this, the present invention proposes a method for manufacturing a semiconductor capacitor aiming at the problems of the prior art. A dense silicon oxide insulating layer can be prepared by the method of the invention, thereby reducing the density of low defects, overcoming the problem of unstable capacitance value, and the manufacturing process is fast and simple, which is beneficial to the improvement of production capacity.

本发明提出的半导体电容器的制造方法包括如下步骤:提供衬底,在衬底上形成金属层-氧化硅层-氮化硅层-氧化硅层-金属层(MONOM)的堆栈结构,以形成半导体电容器;The manufacturing method of the semiconductor capacitor proposed by the present invention includes the following steps: providing a substrate, and forming a stack structure of metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer (MONOM) on the substrate to form a semiconductor capacitor;

其中,金属层-氧化硅层-氮化硅层-氧化硅层-金属层堆栈结构通过如下方法来形成:Among them, the metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer stack structure is formed by the following method:

(1)在衬底上溅射第一金属电极层;(1) sputtering the first metal electrode layer on the substrate;

(2)在第一金属电极层上淀积第一氧化硅层;(2) Depositing a first silicon oxide layer on the first metal electrode layer;

(3)在干氧环境中,通过热氧化工艺在第一氧化硅层上形成第一致密氧化硅层;(3) In a dry oxygen environment, a first dense silicon oxide layer is formed on the first silicon oxide layer by a thermal oxidation process;

(4)在第一致密氧化硅层上淀积形成氮化硅层;(4) Depositing a silicon nitride layer on the first dense silicon oxide layer;

(5)在干氧环境中,通过热氧化工艺在氮化硅层上热氧化形成第二致密氧化硅层;(5) In a dry oxygen environment, a second dense silicon oxide layer is formed by thermal oxidation on the silicon nitride layer through a thermal oxidation process;

(6)在第二致密氧化硅层上淀积形成第二氧化硅层;(6) Depositing a second silicon oxide layer on the second dense silicon oxide layer;

(7)在第二氧化硅层上溅射形成第二金属电极层;(7) forming a second metal electrode layer by sputtering on the second silicon oxide layer;

(8)采用刻蚀工艺,形成第一凹槽和第二凹槽,所述第一凹槽穿透第一氧化硅层、第一致密氧化硅层、氮化硅层、第二致密氧化硅层、第二氧化硅层和第二金属电极层;所述第二凹槽仅穿入第二金属电极层的一部分;(8) Using an etching process to form a first groove and a second groove, the first groove penetrates the first silicon oxide layer, the first dense silicon oxide layer, the silicon nitride layer, the second dense oxide layer a silicon layer, a second silicon oxide layer, and a second metal electrode layer; the second groove penetrates only a part of the second metal electrode layer;

(9)在第一凹槽中淀积绝缘材料;然后对绝缘材料进行垂直刻蚀直至穿入第一金属电极层的一部分,从而在第一凹槽的垂直侧边形成第一引出电极隔离层;(9) Deposit insulating material in the first groove; then vertically etch the insulating material until it penetrates a part of the first metal electrode layer, thereby forming the first extraction electrode isolation layer on the vertical side of the first groove ;

(10)在第一凹槽和第二凹槽中溅射金属材料以形成第一引出电极和第二引出电极;(10) sputtering a metal material in the first groove and the second groove to form a first lead-out electrode and a second lead-out electrode;

其中,第一金属电极层、第二金属电极层、第一引出电极以及第二引出电极采用相同的金属材料形成,例如铝或铜;第一引出电极隔离可采用各种绝缘材料形成,例如氧化硅、氮化硅等材料;Wherein, the first metal electrode layer, the second metal electrode layer, the first lead-out electrode and the second lead-out electrode are formed of the same metal material, such as aluminum or copper; the isolation of the first lead-out electrode can be formed by various insulating materials, such as oxide Silicon, silicon nitride and other materials;

其中,步骤(2)和步骤(6)中淀积形成第一氧化硅层和第二氧化硅层是通过低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积工艺来完成的;Wherein, depositing and forming the first silicon oxide layer and the second silicon oxide layer in step (2) and step (6) is accomplished by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition process;

其中,第一氧化硅层、第一致密氧化硅层、第二致密氧化硅层和第二氧化硅层的总厚度与氮化硅层的厚度之比介于0.38至0.42之间,这可以保证电容器的电容值变化最小,也即电容值的稳定性最佳。Wherein, the ratio of the total thickness of the first silicon oxide layer, the first dense silicon oxide layer, the second dense silicon oxide layer and the second silicon oxide layer to the thickness of the silicon nitride layer is between 0.38 and 0.42, which can be It is guaranteed that the capacitance value of the capacitor changes minimally, that is, the stability of the capacitance value is the best.

例如,第一氧化硅层的厚度为25-30nm,第一致密氧化硅层的厚度为5-10nm,氮化硅层的厚度为20-30nm;第二致密氧化硅层的厚度为5-10nm,第二氧化硅层的厚度为20-25nm。For example, the thickness of the first silicon oxide layer is 25-30nm, the thickness of the first dense silicon oxide layer is 5-10nm, and the thickness of the silicon nitride layer is 20-30nm; the thickness of the second dense silicon oxide layer is 5-10nm. 10nm, the thickness of the second silicon oxide layer is 20-25nm.

其中,步骤(3)和步骤(5)的热氧化温度分别为:900-910摄氏度以及890-900摄氏度;Wherein, the thermal oxidation temperatures of step (3) and step (5) are respectively: 900-910 degrees Celsius and 890-900 degrees Celsius;

其中,第一金属电极层和第二金属电极层的厚度可以相同,也可以不同。第一金属电极层的厚度为80-100nm,第二金属电极层的厚度为90-120nm。Wherein, the thicknesses of the first metal electrode layer and the second metal electrode layer may be the same or different. The thickness of the first metal electrode layer is 80-100 nm, and the thickness of the second metal electrode layer is 90-120 nm.

对于第一引出电极,其穿入第一金属电极层的一部分形成,穿入深度为第一金属电极层厚度的1/3至1/2;第二引出电极同样穿入第二金属电极层的一部分形成,穿入深度为第二金属电极层厚度的1/2至2/3。For the first extraction electrode, it is formed by penetrating a part of the first metal electrode layer, and the penetration depth is 1/3 to 1/2 of the thickness of the first metal electrode layer; the second extraction electrode also penetrates into the second metal electrode layer. A part is formed, and the penetration depth is 1/2 to 2/3 of the thickness of the second metal electrode layer.

附图说明Description of drawings

图1-3是本发明提出的半导体电容器的制造方法的流程示意图。1-3 are schematic flowcharts of the manufacturing method of the semiconductor capacitor proposed by the present invention.

具体实施方式detailed description

实施例1Example 1

以下参考图1-3详细说明本发明提出的半导体电容器的制造过程。需要说明的是,附图中所示的各个结构均未按比例绘制。The manufacturing process of the semiconductor capacitor proposed by the present invention will be described in detail below with reference to FIGS. 1-3 . It should be noted that each structure shown in the drawings is not drawn to scale.

提供衬底1,在衬底上形成金属层-氧化硅层-氮化硅层-氧化硅层-金属层(MONOM)的堆栈结构,以形成半导体电容器;Provide a substrate 1, and form a metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer (MONOM) stack structure on the substrate to form a semiconductor capacitor;

其中,金属层-氧化硅层-氮化硅层-氧化硅层-金属层堆栈结构通过如下方法来形成:Among them, the metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer stack structure is formed by the following method:

(1)在衬底1上溅射第一金属电极层2;(1) Sputtering the first metal electrode layer 2 on the substrate 1;

(2)在第一金属电极层2上淀积第一氧化硅层3;(2) depositing a first silicon oxide layer 3 on the first metal electrode layer 2;

(3)在干氧环境中,通过热氧化工艺在第一氧化硅层3上形成第一致密氧化硅层4;(3) In a dry oxygen environment, a first dense silicon oxide layer 4 is formed on the first silicon oxide layer 3 by a thermal oxidation process;

(4)在第一致密氧化硅层4上淀积形成氮化硅层5;(4) depositing and forming a silicon nitride layer 5 on the first dense silicon oxide layer 4;

(5)在干氧环境中,通过热氧化工艺在氮化硅层5上热氧化形成第二致密氧化硅层6;(5) In a dry oxygen environment, a second dense silicon oxide layer 6 is formed by thermal oxidation on the silicon nitride layer 5 through a thermal oxidation process;

(6)在第二致密氧化硅层上淀积形成第二氧化硅层7;(6) Depositing and forming a second silicon oxide layer 7 on the second dense silicon oxide layer;

(7)在第二氧化硅层7上溅射形成第二金属电极层8;(7) Forming the second metal electrode layer 8 on the second silicon oxide layer 7 by sputtering;

(8)采用刻蚀工艺,形成第一凹槽100和第二凹槽200,所述第一凹槽100穿透第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7和第二金属电极层8;所述第二凹槽200仅穿入第二金属电极层8的一部分;(8) Using an etching process to form a first groove 100 and a second groove 200, the first groove 100 penetrates the first silicon oxide layer 3, the first dense silicon oxide layer 4, and the silicon nitride layer 5. The second dense silicon oxide layer 6, the second silicon oxide layer 7 and the second metal electrode layer 8; the second groove 200 only penetrates a part of the second metal electrode layer 8;

(9)在第一凹槽100中淀积绝缘材料;然后对绝缘材料进行垂直刻蚀直至穿入第一金属电极层2的一部分,从而在第一凹槽100的垂直侧边形成第一引出电极隔离层31;(9) Deposit an insulating material in the first groove 100; then vertically etch the insulating material until it penetrates a part of the first metal electrode layer 2, thereby forming a first lead-out on the vertical side of the first groove 100 Electrode isolation layer 31;

(10)在第一凹槽100和第二凹槽200中溅射金属材料以形成第一引出电极11和第二引出电极21;(10) Sputtering a metal material in the first groove 100 and the second groove 200 to form the first extraction electrode 11 and the second extraction electrode 21 ;

其中,第一金属电极层2、第二金属电极层8、第一引出电极11以及第二引出电极21采用相同的金属材料形成,例如铝或铜;第一引出电极隔离31可采用各种绝缘材料形成,例如氧化硅、氮化硅等材料;Wherein, the first metal electrode layer 2, the second metal electrode layer 8, the first lead-out electrode 11 and the second lead-out electrode 21 are formed of the same metal material, such as aluminum or copper; the first lead-out electrode isolation 31 can adopt various insulating Material formation, such as silicon oxide, silicon nitride and other materials;

其中,步骤(2)和步骤(6)中淀积形成第一氧化硅层3和第二氧化硅层7是通过低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积工艺来完成的;Wherein, the deposition and formation of the first silicon oxide layer 3 and the second silicon oxide layer 7 in step (2) and step (6) is accomplished by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition process ;

其中,第一氧化硅层3、第一致密氧化硅层4、第二致密氧化硅层6和第二氧化硅层7的总厚度与氮化硅层5的厚度之比介于0.38至0.42之间,这可以保证电容器的电容值变化最小,也即电容值的稳定性最佳。Wherein, the ratio of the total thickness of the first silicon oxide layer 3, the first dense silicon oxide layer 4, the second dense silicon oxide layer 6 and the second silicon oxide layer 7 to the thickness of the silicon nitride layer 5 is between 0.38 and 0.42 Between, this can ensure that the capacitance value of the capacitor changes the least, that is, the stability of the capacitance value is the best.

例如,第一氧化硅层3的厚度为25-30nm,第一致密氧化硅层4的厚度为5-10nm,氮化硅层5的厚度为20-30nm;第二致密氧化硅层6的厚度为5-10nm,第二氧化硅层7的厚度为20-25nm。For example, the thickness of the first silicon oxide layer 3 is 25-30nm, the thickness of the first dense silicon oxide layer 4 is 5-10nm, and the thickness of the silicon nitride layer 5 is 20-30nm; The thickness is 5-10 nm, and the thickness of the second silicon oxide layer 7 is 20-25 nm.

其中,步骤(3)和步骤(5)的热氧化温度分别为:900-910摄氏度以及890-900摄氏度;Wherein, the thermal oxidation temperatures of step (3) and step (5) are respectively: 900-910 degrees Celsius and 890-900 degrees Celsius;

其中,第一金属电极层2和第二金属电极层8的厚度可以相同,也可以不同。第一金属电极层2的厚度为80-100nm,第二金属电极层8的厚度为90-120nm。Wherein, the thicknesses of the first metal electrode layer 2 and the second metal electrode layer 8 may be the same or different. The thickness of the first metal electrode layer 2 is 80-100 nm, and the thickness of the second metal electrode layer 8 is 90-120 nm.

对于第一引出电极11,其穿入第一金属电极层2的一部分形成,穿入深度为第一金属电极层2厚度的1/3至1/2;第二引出电极21同样穿入第二金属电极层8的一部分形成,穿入深度为第二金属电极层8厚度的1/2至2/3,之所以第二引出电极21穿入的深度更深,其目的是第二引出电极21的穿入更深的深度,从而能够更牢固的安装在第二金属电极层8上。而第一引出电极11无需穿入更深,是因为第一引出电极11已经穿透了半导体电容器的多个层,因此其牢固性无需多虑。For the first lead-out electrode 11, it is formed through a part of the first metal electrode layer 2, and the penetration depth is 1/3 to 1/2 of the thickness of the first metal electrode layer 2; the second lead-out electrode 21 also penetrates into the second A part of the metal electrode layer 8 is formed, and the penetration depth is 1/2 to 2/3 of the thickness of the second metal electrode layer 8. The reason why the penetration depth of the second extraction electrode 21 is deeper is that the second extraction electrode 21 Penetrating deeper, so that it can be more firmly installed on the second metal electrode layer 8 . The reason why the first lead-out electrode 11 does not need to penetrate deeper is because the first lead-out electrode 11 has already penetrated multiple layers of the semiconductor capacitor, so there is no need to worry about its firmness.

实施例2Example 2

下面介绍本发明的优选实施例。Preferred embodiments of the present invention are described below.

依然参考图1-3,本发明提出的制造方法为:Still referring to Fig. 1-3, the manufacturing method that the present invention proposes is:

提供衬底1,在衬底上形成金属层-氧化硅层-氮化硅层-氧化硅层-金属层(MONOM)的堆栈结构,以形成半导体电容器;Provide a substrate 1, and form a metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer (MONOM) stack structure on the substrate to form a semiconductor capacitor;

其中,金属层-氧化硅层-氮化硅层-氧化硅层-金属层堆栈结构通过如下方法来形成:Among them, the metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer stack structure is formed by the following method:

(1)在衬底1上溅射第一金属电极层2;(1) Sputtering the first metal electrode layer 2 on the substrate 1;

(2)在第一金属电极层2上淀积第一氧化硅层3;(2) depositing a first silicon oxide layer 3 on the first metal electrode layer 2;

(3)在干氧环境中,通过热氧化工艺在第一氧化硅层3上形成第一致密氧化硅层4;(3) In a dry oxygen environment, a first dense silicon oxide layer 4 is formed on the first silicon oxide layer 3 by a thermal oxidation process;

(4)在第一致密氧化硅层4上淀积形成氮化硅层5;(4) depositing and forming a silicon nitride layer 5 on the first dense silicon oxide layer 4;

(5)在干氧环境中,通过热氧化工艺在氮化硅层5上热氧化形成第二致密氧化硅层6;(5) In a dry oxygen environment, a second dense silicon oxide layer 6 is formed by thermal oxidation on the silicon nitride layer 5 through a thermal oxidation process;

(6)在第二致密氧化硅层上淀积形成第二氧化硅层7;(6) Depositing and forming a second silicon oxide layer 7 on the second dense silicon oxide layer;

(7)在第二氧化硅层7上溅射形成第二金属电极层8;(7) Forming the second metal electrode layer 8 on the second silicon oxide layer 7 by sputtering;

(8)采用刻蚀工艺,形成第一凹槽100和第二凹槽200,所述第一凹槽100穿透第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7和第二金属电极层8;所述第二凹槽200仅穿入第二金属电极层8的一部分;(8) Using an etching process to form a first groove 100 and a second groove 200, the first groove 100 penetrates the first silicon oxide layer 3, the first dense silicon oxide layer 4, and the silicon nitride layer 5. The second dense silicon oxide layer 6, the second silicon oxide layer 7 and the second metal electrode layer 8; the second groove 200 only penetrates a part of the second metal electrode layer 8;

(9)在第一凹槽100中淀积绝缘材料;然后对绝缘材料进行垂直刻蚀直至穿入第一金属电极层2的一部分,从而在第一凹槽100的垂直侧边形成第一引出电极隔离层31;(9) Deposit an insulating material in the first groove 100; then vertically etch the insulating material until it penetrates a part of the first metal electrode layer 2, thereby forming a first lead-out on the vertical side of the first groove 100 Electrode isolation layer 31;

(10)在第一凹槽100和第二凹槽200中溅射金属材料以形成第一引出电极11和第二引出电极21;(10) Sputtering a metal material in the first groove 100 and the second groove 200 to form the first extraction electrode 11 and the second extraction electrode 21 ;

其中,第一金属电极层2、第二金属电极层8、第一引出电极11以及第二引出电极21采用相同的金属材料形成,例如铝或铜;第一引出电极隔离31可采用各种绝缘材料形成,例如氧化硅、氮化硅等材料;Wherein, the first metal electrode layer 2, the second metal electrode layer 8, the first lead-out electrode 11 and the second lead-out electrode 21 are formed of the same metal material, such as aluminum or copper; the first lead-out electrode isolation 31 can adopt various insulating Material formation, such as silicon oxide, silicon nitride and other materials;

其中,步骤(2)和步骤(6)中淀积形成第一氧化硅层3和第二氧化硅层7是通过低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积工艺来完成的;Wherein, the deposition and formation of the first silicon oxide layer 3 and the second silicon oxide layer 7 in step (2) and step (6) is accomplished by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition process ;

其中,第一氧化硅层3、第一致密氧化硅层4、第二致密氧化硅层6和第二氧化硅层7的总厚度与氮化硅层5的厚度之比为0.4,这可以保证电容器的电容值变化最小,也即电容值的稳定性最佳。Wherein, the ratio of the total thickness of the first silicon oxide layer 3, the first dense silicon oxide layer 4, the second dense silicon oxide layer 6 and the second silicon oxide layer 7 to the thickness of the silicon nitride layer 5 is 0.4, which can It is guaranteed that the capacitance value of the capacitor changes minimally, that is, the stability of the capacitance value is the best.

例如,第一氧化硅层3的厚度为27nm,第一致密氧化硅层4的厚度为8nm,氮化硅层5的厚度为26nm;第二致密氧化硅层6的厚度为8nm,第二氧化硅层7的厚度为22nm。For example, the thickness of the first silicon oxide layer 3 is 27nm, the thickness of the first dense silicon oxide layer 4 is 8nm, the thickness of the silicon nitride layer 5 is 26nm; the thickness of the second dense silicon oxide layer 6 is 8nm, the second The silicon oxide layer 7 has a thickness of 22 nm.

其中,步骤(3)和步骤(5)的热氧化温度分别为:905摄氏度以及895摄氏度;Wherein, the thermal oxidation temperatures of step (3) and step (5) are respectively: 905 degrees Celsius and 895 degrees Celsius;

其中,第一金属电极层2和第二金属电极层8的厚度可以相同,也可以不同。第一金属电极层2的厚度为90nm,第二金属电极层8的厚度为100nm。Wherein, the thicknesses of the first metal electrode layer 2 and the second metal electrode layer 8 may be the same or different. The thickness of the first metal electrode layer 2 is 90 nm, and the thickness of the second metal electrode layer 8 is 100 nm.

对于第一引出电极11,其穿入第一金属电极层2的一部分形成,穿入深度为第一金属电极层2厚度的1/3至1/2;第二引出电极21同样穿入第二金属电极层8的一部分形成,穿入深度为第二金属电极层8厚度的1/2至2/3。For the first lead-out electrode 11, it is formed through a part of the first metal electrode layer 2, and the penetration depth is 1/3 to 1/2 of the thickness of the first metal electrode layer 2; the second lead-out electrode 21 also penetrates into the second A part of the metal electrode layer 8 is formed, and the penetration depth is 1/2 to 2/3 of the thickness of the second metal electrode layer 8 .

至此,上述描述已经详细的说明了本发明,前文描述的实施例仅仅只是本发明的优选实施例,其并非用于限定本发明。本领域技术人员在不脱离本发明精神的前提下,可对本发明做任何的修改,而本发明的保护范围由所附的权利要求来限定。So far, the above description has explained the present invention in detail, and the above-described embodiments are only preferred embodiments of the present invention, and are not intended to limit the present invention. Those skilled in the art can make any modifications to the present invention without departing from the spirit of the present invention, and the protection scope of the present invention is defined by the appended claims.

Claims (3)

1.一种半导体电容器的制造方法,其特征在于:1. A method for manufacturing a semiconductor capacitor, characterized in that: 提供衬底,在衬底上形成金属层-氧化硅层-氮化硅层-氧化硅层-金属层(MONOM)的堆栈结构,以形成半导体电容器;Provide a substrate, and form a metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer (MONOM) stack structure on the substrate to form a semiconductor capacitor; 其中,形成金属层-氧化硅层-氮化硅层-氧化硅层-金属层堆栈结构依次包括如下步骤:Wherein, forming the metal layer-silicon oxide layer-silicon nitride layer-silicon oxide layer-metal layer stack structure includes the following steps in sequence: (1)在衬底上溅射第一金属电极层;(1) sputtering the first metal electrode layer on the substrate; (2)在第一金属电极层上淀积第一氧化硅层;(2) depositing a first silicon oxide layer on the first metal electrode layer; (3)在干氧环境中,通过热氧化工艺在第一氧化硅层上形成第一致密氧化硅层;(3) In a dry oxygen environment, a first dense silicon oxide layer is formed on the first silicon oxide layer by a thermal oxidation process; (4)在第一致密氧化硅层上淀积形成氮化硅层;(4) depositing and forming a silicon nitride layer on the first dense silicon oxide layer; (5)在干氧环境中,通过热氧化工艺在氮化硅层上热氧化形成第二致密氧化硅层;(5) In a dry oxygen environment, thermally oxidize the silicon nitride layer by a thermal oxidation process to form a second dense silicon oxide layer; (6)在第二致密氧化硅层上淀积形成第二氧化硅层;(6) depositing and forming a second silicon oxide layer on the second dense silicon oxide layer; (7)在第二氧化硅层上溅射形成第二金属电极层;(7) forming a second metal electrode layer by sputtering on the second silicon oxide layer; (8)采用刻蚀工艺,形成第一凹槽和第二凹槽,所述第一凹槽穿透第一氧化硅层、第一致密氧化硅层、氮化硅层、第二致密氧化硅层、第二氧化硅层和第二金属电极层;所述第二凹槽仅穿入第二金属电极层的一部分;(8) Using an etching process to form a first groove and a second groove, the first groove penetrates the first silicon oxide layer, the first dense silicon oxide layer, the silicon nitride layer, the second dense oxide a silicon layer, a second silicon oxide layer, and a second metal electrode layer; the second groove penetrates only a part of the second metal electrode layer; (9)在第一凹槽中淀积绝缘材料;然后对绝缘材料进行垂直刻蚀直至穿入第一金属电极层的一部分,从而在第一凹槽的垂直侧边形成第一引出电极隔离层;(9) Deposit insulating material in the first groove; then vertically etch the insulating material until it penetrates a part of the first metal electrode layer, thereby forming the first extraction electrode isolation layer on the vertical side of the first groove ; (10)在第一凹槽和第二凹槽中溅射金属材料以形成第一引出电极和第二引出电极。(10) Sputtering a metal material in the first groove and the second groove to form the first extraction electrode and the second extraction electrode. 2.如权利要求1所述的半导体电容器的制造方法,特征在于:2. The manufacture method of semiconductor capacitor as claimed in claim 1, is characterized in that: 其中,第一氧化硅层、第一致密氧化硅层、第二致密氧化硅层和第二氧化硅层的总厚度与氮化硅层的厚度之比介于0.38至0.42之间。Wherein, the ratio of the total thickness of the first silicon oxide layer, the first dense silicon oxide layer, the second dense silicon oxide layer and the second silicon oxide layer to the thickness of the silicon nitride layer is between 0.38 and 0.42. 3.如权利要求2所述的半导体电容器的制造方法,特征在于:3. The manufacturing method of semiconductor capacitor as claimed in claim 2, is characterized in that: 第一引出电极穿入第一金属电极层的一部分形成,穿入深度为第一金属电极层厚度的1/3至1/2;第二引出电极穿入第二金属电极层的一部分形成,穿入深度为第二金属电极层厚度的1/2至2/3。The first extraction electrode is formed penetrating a part of the first metal electrode layer, and the penetration depth is 1/3 to 1/2 of the thickness of the first metal electrode layer; the second extraction electrode is formed penetrating a part of the second metal electrode layer, penetrating through The penetration depth is 1/2 to 2/3 of the thickness of the second metal electrode layer.
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