CN103594525B - A kind of semiconductor capacitor - Google Patents
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Abstract
Description
技术领域technical field
本发明属于半导体集成电路领域,特别涉及一种半导体电容器。The invention belongs to the field of semiconductor integrated circuits, in particular to a semiconductor capacitor.
背景技术Background technique
随着半导体技术的发展,集成电路器件结构越来越复杂。电容器是集成电路芯片中的重要器件。现有技术中,集成电路芯片中的电容器通常为金属-绝缘体-金属结构。这种电容器结构简单,易于集成,因此在集成电路中应用广泛。但是现有技术中的这种电容器结构一般采用单电介质层结构,也就是在两块金属极板之间形成单层绝缘电介质层以组成电容器。绝缘层一般由单层氧化硅或者氮化硅来构成,这种电容器虽然结构简单,但其最大的缺陷是电容值不稳定。这是因为绝缘层会产生界面态以及静电荷等多种状态的改变,从而导致电容值随电压变化,因此会影响到电路的正常工作。With the development of semiconductor technology, the structure of integrated circuit devices is becoming more and more complex. Capacitors are important devices in integrated circuit chips. In the prior art, capacitors in integrated circuit chips are usually metal-insulator-metal structures. This kind of capacitor has a simple structure and is easy to integrate, so it is widely used in integrated circuits. However, the capacitor structure in the prior art generally adopts a single dielectric layer structure, that is, a single insulating dielectric layer is formed between two metal plates to form a capacitor. The insulating layer is generally composed of a single layer of silicon oxide or silicon nitride. Although this type of capacitor has a simple structure, its biggest defect is that the capacitance value is unstable. This is because the insulating layer will produce changes in various states such as interface states and electrostatic charges, which will cause the capacitance value to change with the voltage, thus affecting the normal operation of the circuit.
发明内容Contents of the invention
有鉴于此,本发明针对现有技术的问题,提出了一种半导体电容器结构。这种半导体电容器结构为两层金属电极之间具有多层绝缘层,其不仅能够得到低缺陷密度的绝缘层,从而克服电容值不稳定的问题,而且制造过程快速简便,从而有利于产能的提高。In view of this, the present invention proposes a semiconductor capacitor structure aiming at the problems of the prior art. This kind of semiconductor capacitor structure has a multi-layer insulating layer between two layers of metal electrodes, which not only can obtain an insulating layer with low defect density, thereby overcoming the problem of unstable capacitance value, but also has a fast and simple manufacturing process, which is conducive to the improvement of production capacity .
本发明提出的半导体电容器具有如下结构:衬底,衬底上依次具有第一金属电极层、第一氧化硅层、第一致密氧化硅层、氮化硅层、第二致密氧化硅层、第二氧化硅层、第二金属电极层;第一引出电极,其穿透第一氧化硅层、第一致密氧化硅层、氮化硅层、第二致密氧化硅层、第二氧化硅层和第二金属电极层并穿入第一金属电极层的一部分形成;第一引出电极隔离,其穿透第一氧化硅层、第一致密氧化硅层、氮化硅层、第二致密氧化硅层、第二氧化硅层和第二金属电极层形成,从而实现对第一引出电极的电隔离;第二引出电极,其穿入第二金属电极层的一部分形成;The semiconductor capacitor proposed by the present invention has the following structure: a substrate with a first metal electrode layer, a first silicon oxide layer, a first dense silicon oxide layer, a silicon nitride layer, a second dense silicon oxide layer, The second silicon oxide layer, the second metal electrode layer; the first extraction electrode, which penetrates the first silicon oxide layer, the first dense silicon oxide layer, the silicon nitride layer, the second dense silicon oxide layer, the second silicon oxide layer layer and the second metal electrode layer and penetrate a part of the first metal electrode layer; the first extraction electrode is isolated, which penetrates the first silicon oxide layer, the first dense silicon oxide layer, the silicon nitride layer, the second dense A silicon oxide layer, a second silicon oxide layer and a second metal electrode layer are formed, so as to realize the electrical isolation of the first extraction electrode; the second extraction electrode is formed through a part of the second metal electrode layer;
其中,第一金属电极层、第二金属电极层、第一引出电极以及第二引出电极采用相同的金属材料形成,例如铝或铜;第一引出电极隔离可采用各种绝缘材料形成,例如氧化硅、氮化硅等材料;Wherein, the first metal electrode layer, the second metal electrode layer, the first lead-out electrode and the second lead-out electrode are formed of the same metal material, such as aluminum or copper; the isolation of the first lead-out electrode can be formed by various insulating materials, such as oxide Silicon, silicon nitride and other materials;
其中,第一氧化硅层为采用淀积方法在第一金属电极层上淀积二氧化硅材料来形成,所述的淀积方法为低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积(PECVD);Wherein, the first silicon oxide layer is formed by depositing silicon dioxide material on the first metal electrode layer by a deposition method, and the deposition method is low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition product (PECVD);
第一致密氧化硅层为在干氧环境中热氧化,从而在第一氧化硅层表面部分形成的致密氧化硅层;The first dense silicon oxide layer is thermally oxidized in a dry oxygen environment, thereby forming a dense silicon oxide layer on the surface of the first silicon oxide layer;
第二致密氧化硅层是在干氧环境中通过热氧化工艺,从而在氮化硅层表面上形成的二氧化硅层;The second dense silicon oxide layer is a silicon dioxide layer formed on the surface of the silicon nitride layer through a thermal oxidation process in a dry oxygen environment;
第二氧化硅层通过淀积工艺,从而在第二致密氧化硅层上淀积形成的氧化硅层,淀积工艺包括低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积(PECVD);The second silicon oxide layer is deposited on the second dense silicon oxide layer by a deposition process, the deposition process includes low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD) ;
其中,第一氧化硅层、第一致密氧化硅层、第二致密氧化硅层和第二氧化硅层的总厚度与氮化硅层的厚度之比介于0.38至0.42之间,这可以保证电容器的电容值变化最小,也即电容值的稳定性最佳。Wherein, the ratio of the total thickness of the first silicon oxide layer, the first dense silicon oxide layer, the second dense silicon oxide layer and the second silicon oxide layer to the thickness of the silicon nitride layer is between 0.38 and 0.42, which can be It is guaranteed that the capacitance value of the capacitor changes minimally, that is, the stability of the capacitance value is the best.
例如,第一氧化硅层的厚度为25-30nm,第一致密氧化硅层的厚度为5-10nm,氮化硅层的厚度为20-30nm;第二致密氧化硅层的厚度为5-10nm,第二氧化硅层的厚度为20-25nm。For example, the thickness of the first silicon oxide layer is 25-30nm, the thickness of the first dense silicon oxide layer is 5-10nm, and the thickness of the silicon nitride layer is 20-30nm; the thickness of the second dense silicon oxide layer is 5-10nm. 10nm, the thickness of the second silicon oxide layer is 20-25nm.
其中,第一金属电极层和第二金属电极层的厚度可以相同,也可以不同。第一金属电极层的厚度为80-100nm,第二金属电极层的厚度为90-120nm。Wherein, the thicknesses of the first metal electrode layer and the second metal electrode layer may be the same or different. The thickness of the first metal electrode layer is 80-100 nm, and the thickness of the second metal electrode layer is 90-120 nm.
对于第一引出电极,其穿入第一金属电极层的一部分形成,穿入深度为第一金属电极层厚度的1/3至1/2;第二引出电极同样穿入第二金属电极层的一部分形成,穿入深度为第二金属电极层厚度的1/2至2/3。For the first extraction electrode, it is formed by penetrating a part of the first metal electrode layer, and the penetration depth is 1/3 to 1/2 of the thickness of the first metal electrode layer; the second extraction electrode also penetrates into the second metal electrode layer. A part is formed, and the penetration depth is 1/2 to 2/3 of the thickness of the second metal electrode layer.
附图说明Description of drawings
图1是本发明提出的半导体电容器的结构示意图。FIG. 1 is a schematic structural view of a semiconductor capacitor proposed by the present invention.
具体实施方式detailed description
实施例1Example 1
以下参考图1详细说明本发明提出的半导体电容器。需要说明的是,附图中所示的各个结构均未按比例绘制。The semiconductor capacitor proposed by the present invention will be described in detail below with reference to FIG. 1 . It should be noted that each structure shown in the drawings is not drawn to scale.
如图1中所示,半导体电容器包括:衬底1,衬底1上依次具有第一金属电极层2、第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7、第二金属电极层8;第一引出电极11,其穿透第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7和第二金属电极层8并穿入第一金属电极层2的一部分形成;第一引出电极隔离31,其穿透第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7和第二金属电极层8形成,从而实现对第一引出电极11的电隔离;第二引出电极21,其穿入第二金属电极层8的一部分形成;As shown in FIG. 1, a semiconductor capacitor includes: a substrate 1, on which there are sequentially a first metal electrode layer 2, a first silicon oxide layer 3, a first dense silicon oxide layer 4, a silicon nitride layer 5, The second dense silicon oxide layer 6, the second silicon oxide layer 7, the second metal electrode layer 8; the first extraction electrode 11, which penetrates the first silicon oxide layer 3, the first dense silicon oxide layer 4, silicon nitride layer 5, the second dense silicon oxide layer 6, the second silicon oxide layer 7 and the second metal electrode layer 8 and penetrate a part of the first metal electrode layer 2; the first lead-out electrode isolation 31, which penetrates the first oxide The silicon layer 3, the first dense silicon oxide layer 4, the silicon nitride layer 5, the second dense silicon oxide layer 6, the second silicon oxide layer 7 and the second metal electrode layer 8 are formed, so that the first lead-out electrode 11 electrical isolation; the second lead-out electrode 21 is formed through a part of the second metal electrode layer 8;
其中,第一金属电极层2、第二金属电极层8、第一引出电极11以及第二引出电极21采用相同的金属材料形成,例如铝或铜;第一引出电极隔离31可采用各种绝缘材料形成,例如氧化硅、氮化硅等材料;Wherein, the first metal electrode layer 2, the second metal electrode layer 8, the first lead-out electrode 11 and the second lead-out electrode 21 are formed of the same metal material, such as aluminum or copper; the first lead-out electrode isolation 31 can adopt various insulating Material formation, such as silicon oxide, silicon nitride and other materials;
其中,第一氧化硅层3为采用淀积方法在第一金属电极层2上淀积二氧化硅材料来形成,所述的淀积方法为低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积(PECVD);Wherein, the first silicon oxide layer 3 is formed by depositing silicon dioxide material on the first metal electrode layer 2 by a deposition method, the deposition method being low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition. Vapor deposition (PECVD);
第一致密氧化硅层4为在干氧环境中热氧化,从而在第一氧化硅层3表面部分形成的致密氧化硅层;The first dense silicon oxide layer 4 is a dense silicon oxide layer formed on the surface of the first silicon oxide layer 3 by thermal oxidation in a dry oxygen environment;
第二致密氧化硅层6是在干氧环境中通过热氧化工艺,从而在氮化硅层5表面上形成的二氧化硅层;The second dense silicon oxide layer 6 is a silicon dioxide layer formed on the surface of the silicon nitride layer 5 through a thermal oxidation process in a dry oxygen environment;
第二氧化硅层7通过淀积工艺,从而在第二致密氧化硅层6上淀积形成的氧化硅层,淀积工艺包括低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积(PECVD);The second silicon oxide layer 7 is formed by depositing a silicon oxide layer on the second dense silicon oxide layer 6 through a deposition process. The deposition process includes low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition ( PECVD);
其中,第一氧化硅层3、第一致密氧化硅层4、第二致密氧化硅层6和第二氧化硅层7的总厚度与氮化硅层的厚度之比介于0.38至0.42之间,这可以保证电容器的电容值变化最小,也即电容值的稳定性最佳。Wherein, the ratio of the total thickness of the first silicon oxide layer 3, the first dense silicon oxide layer 4, the second dense silicon oxide layer 6 and the second silicon oxide layer 7 to the thickness of the silicon nitride layer is between 0.38 and 0.42 This can ensure that the capacitance value of the capacitor changes the least, that is, the stability of the capacitance value is the best.
例如,第一氧化硅层3的厚度为25-30nm,第一致密氧化硅层4的厚度为5-10nm,氮化硅层5的厚度为20-30nm;第二致密氧化硅层6的厚度为5-10nm,第二氧化硅层7的厚度为20-25nm。For example, the thickness of the first silicon oxide layer 3 is 25-30nm, the thickness of the first dense silicon oxide layer 4 is 5-10nm, and the thickness of the silicon nitride layer 5 is 20-30nm; The thickness is 5-10 nm, and the thickness of the second silicon oxide layer 7 is 20-25 nm.
其中,第一金属电极层2和第二金属电极层8的厚度可以相同,也可以不同。第一金属电极层2的厚度为80-100nm,第二金属电极层8的厚度为90-120nm。Wherein, the thicknesses of the first metal electrode layer 2 and the second metal electrode layer 8 may be the same or different. The thickness of the first metal electrode layer 2 is 80-100 nm, and the thickness of the second metal electrode layer 8 is 90-120 nm.
对于第一引出电极,其穿入第一金属电极层的一部分形成,穿入深度为第一金属电极层厚度的1/3至1/2;第二引出电极同样穿入第二金属电极层的一部分形成,穿入深度为第二金属电极层厚度的1/2至2/3,之所以比第一引出电极的穿入深度更深,其目的是第二引出电极的穿入更深的深度,从而能够更牢固的安装在第二金属电极层上。而第一引出电极无需穿入更深,是因为第一引出电极已经穿透了半导体电容器的多个层,因此其牢固性无需多虑。For the first extraction electrode, it is formed by penetrating a part of the first metal electrode layer, and the penetration depth is 1/3 to 1/2 of the thickness of the first metal electrode layer; the second extraction electrode also penetrates into the second metal electrode layer. A part is formed, and the penetration depth is 1/2 to 2/3 of the thickness of the second metal electrode layer. The reason why it is deeper than the penetration depth of the first extraction electrode is that the penetration depth of the second extraction electrode is deeper, so that It can be installed on the second metal electrode layer more firmly. The reason why the first lead-out electrode does not need to penetrate deeper is because the first lead-out electrode has already penetrated multiple layers of the semiconductor capacitor, so there is no need to worry about its firmness.
实施例2Example 2
下面介绍本发明的优选实施例。Preferred embodiments of the present invention are described below.
依然参照图1,本发明提出的半导体电容器包括:Still referring to Fig. 1, the semiconductor capacitor proposed by the present invention includes:
衬底1,衬底1上依次具有第一金属电极层2、第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7、第二金属电极层8;第一引出电极11,其穿透第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7和第二金属电极层8并穿入第一金属电极层2的一部分形成;第一引出电极隔离31,其穿透第一氧化硅层3、第一致密氧化硅层4、氮化硅层5、第二致密氧化硅层6、第二氧化硅层7和第二金属电极层8形成,从而实现对第一引出电极11的电隔离;第二引出电极21,其穿入第二金属电极层8的一部分形成;A substrate 1, on which there are sequentially a first metal electrode layer 2, a first silicon oxide layer 3, a first dense silicon oxide layer 4, a silicon nitride layer 5, a second dense silicon oxide layer 6, a second oxide Silicon layer 7, second metal electrode layer 8; first extraction electrode 11, which penetrates first silicon oxide layer 3, first dense silicon oxide layer 4, silicon nitride layer 5, second dense silicon oxide layer 6, The second silicon oxide layer 7 and the second metal electrode layer 8 are formed through a part of the first metal electrode layer 2; the first extraction electrode isolation 31 penetrates the first silicon oxide layer 3 and the first dense silicon oxide layer 4. The silicon nitride layer 5, the second dense silicon oxide layer 6, the second silicon oxide layer 7 and the second metal electrode layer 8 are formed, so as to realize the electrical isolation of the first lead-out electrode 11; the second lead-out electrode 21, its Formed through a part of the second metal electrode layer 8;
其中,第一金属电极层2、第二金属电极层8、第一引出电极11以及第二引出电极21采用相同的金属材料形成,例如铝或铜;第一引出电极隔离31可采用各种绝缘材料形成,例如氧化硅、氮化硅等材料;Wherein, the first metal electrode layer 2, the second metal electrode layer 8, the first lead-out electrode 11 and the second lead-out electrode 21 are formed of the same metal material, such as aluminum or copper; the first lead-out electrode isolation 31 can adopt various insulating Material formation, such as silicon oxide, silicon nitride and other materials;
其中,第一氧化硅层3为采用淀积方法在第一金属电极层2上淀积二氧化硅材料来形成,所述的淀积方法为低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积(PECVD);Wherein, the first silicon oxide layer 3 is formed by depositing silicon dioxide material on the first metal electrode layer 2 by a deposition method, the deposition method being low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition. Vapor deposition (PECVD);
第一致密氧化硅层4为在干氧环境中热氧化,从而在第一氧化硅层3表面部分形成的致密氧化硅层;The first dense silicon oxide layer 4 is a dense silicon oxide layer formed on the surface of the first silicon oxide layer 3 by thermal oxidation in a dry oxygen environment;
第二致密氧化硅层6是在干氧环境中通过热氧化工艺,从而在氮化硅层5表面上形成的二氧化硅层;The second dense silicon oxide layer 6 is a silicon dioxide layer formed on the surface of the silicon nitride layer 5 through a thermal oxidation process in a dry oxygen environment;
第二氧化硅层7通过淀积工艺,从而在第二致密氧化硅层6上淀积形成的氧化硅层,淀积工艺包括低压化学气相淀积(LPCVD)或等离子体增强化学气相淀积(PECVD);The second silicon oxide layer 7 is formed by depositing a silicon oxide layer on the second dense silicon oxide layer 6 through a deposition process. The deposition process includes low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition ( PECVD);
其中,第一氧化硅层3、第一致密氧化硅层4、第二致密氧化硅层6和第二氧化硅层7的总厚度与氮化硅层的厚度之比为0.4,这可以保证电容器的电容值变化最小,也即电容值的稳定性最佳。Wherein, the ratio of the total thickness of the first silicon oxide layer 3, the first dense silicon oxide layer 4, the second dense silicon oxide layer 6 and the second silicon oxide layer 7 to the thickness of the silicon nitride layer is 0.4, which can ensure The capacitance value of the capacitor changes the least, that is, the stability of the capacitance value is the best.
例如,第一氧化硅层3的厚度为27nm,第一致密氧化硅层4的厚度为8nm,氮化硅层5的厚度为26nm;第二致密氧化硅层6的厚度为8nm,第二氧化硅层7的厚度为22nm。For example, the thickness of the first silicon oxide layer 3 is 27nm, the thickness of the first dense silicon oxide layer 4 is 8nm, the thickness of the silicon nitride layer 5 is 26nm; the thickness of the second dense silicon oxide layer 6 is 8nm, the second The silicon oxide layer 7 has a thickness of 22 nm.
其中,第一金属电极层2和第二金属电极层8的厚度可以相同,也可以不同。第一金属电极层2的厚度为90nm,第二金属电极层8的厚度为100nm。Wherein, the thicknesses of the first metal electrode layer 2 and the second metal electrode layer 8 may be the same or different. The thickness of the first metal electrode layer 2 is 90 nm, and the thickness of the second metal electrode layer 8 is 100 nm.
对于第一引出电极,其穿入第一金属电极层的一部分形成,穿入深度为第一金属电极层厚度的1/3至1/2;第二引出电极同样穿入第二金属电极层的一部分形成,穿入深度为第二金属电极层厚度的1/2至2/3,之所以比第一引出电极的穿入深度更深,其目的是第二引出电极的穿入更深的深度,从而能够更牢固的安装在第二金属电极层上。而第一引出电极无需穿入更深,是因为第一引出电极已经穿透了半导体电容器的多个层,因此其牢固性无需多虑。For the first extraction electrode, it is formed by penetrating a part of the first metal electrode layer, and the penetration depth is 1/3 to 1/2 of the thickness of the first metal electrode layer; the second extraction electrode also penetrates into the second metal electrode layer. A part is formed, and the penetration depth is 1/2 to 2/3 of the thickness of the second metal electrode layer. The reason why it is deeper than the penetration depth of the first extraction electrode is that the penetration depth of the second extraction electrode is deeper, so that It can be installed on the second metal electrode layer more firmly. The reason why the first lead-out electrode does not need to penetrate deeper is because the first lead-out electrode has already penetrated multiple layers of the semiconductor capacitor, so there is no need to worry about its firmness.
至此,上述描述已经详细的说明了本发明,前文描述的实施例仅仅只是本发明的优选实施例,其并非用于限定本发明。本领域技术人员在不脱离本发明精神的前提下,可对本发明做任何的修改,而本发明的保护范围由所附的权利要求来限定。So far, the above description has explained the present invention in detail, and the above-described embodiments are only preferred embodiments of the present invention, and are not intended to limit the present invention. Those skilled in the art can make any modifications to the present invention without departing from the spirit of the present invention, and the protection scope of the present invention is defined by the appended claims.
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