CN103488582B - Write the method and device of cache memory - Google Patents

Abstract

The present application provides a method for writing a cache memory, using a flash memory card (that is, a FLASH memory) as a cache memory, and judging whether the flash memory card has the same disk logic block address as the data block to be stored when caching data If it exists, then directly write the data block to be stored in the flash memory card in an asynchronous manner, if it does not exist, then write the data block to be stored in a free block of the flash memory card in an asynchronous manner, The write data cache is realized, and because the flash memory card does not need a backup battery to keep the power, the data will not be lost after power failure, so the energy consumption is low, and the price of the flash memory card itself is lower than the price of the dynamic random access memory. Therefore, this The method for writing the cache memory provided in the embodiment of the application reduces the implementation cost of the storage system. The embodiment of the present application also provides a device for writing a cache memory.

Description

Method and device for writing cache memory

technical field

The invention relates to the technical field of data storage, in particular to a method and device for reading and writing a cache memory.

Background technique

A cache is a buffer between the disk's internal storage and the external interface. An important function of the cache memory is to cache the written data as a write cache, that is, when there is data to be stored on the disk, the data will not be written to the disk immediately, but the data will be temporarily written to the cache first memory, and then return a "data has been written" signal to the system, then the system will think that the data has been written, and continue to perform follow-up work, when the data in the cache memory reaches a certain level, and then write the data Write from cache memory to disk. The use of cache memory, on the one hand, reduces the actual disk operations, effectively protecting the disk from damage caused by repeated read and write operations, and on the other hand, it can also reduce the time required for data writing, thereby improving the write performance of the storage system. performance.

However, at present, Dynamic Random Access Memory (DRAM) with backup battery (Battery Backup Unit, BBU) is mostly used as write cache, and the backup battery is expensive and the memory that can be supported is limited. Therefore, maintenance The DRAM needs to consume more power. Therefore, using the DRAM as a write cache makes the implementation cost of the storage system higher.

Contents of the invention

An embodiment of the present invention provides a method for writing a cache memory, so as to reduce the implementation cost of a storage system.

A first aspect of the present invention provides a method for writing a cache memory, the cache memory is a flash memory card, and the method includes:

Judging whether the old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card;

If so, then write the data block to be stored in the flash memory card in an asynchronous manner;

If not, write the data block to be stored into a free block in the flash memory card in an asynchronous manner.

In a first possible implementation manner of the first aspect, writing the data block to be stored into a free block of the flash memory card includes:

Judging whether there is a free block in the flash memory card;

If it exists, then write the data block to be stored in a free block in the flash memory card in an asynchronous manner;

If it does not exist, the data block to be stored is added to the waiting queue, and when a free block occurs in the flash memory card, the data block to be stored is written into the free block in the flash memory card in an asynchronous manner in the steps.

In a second possible implementation manner of the first aspect, after writing the data block to be stored into a free block in the flash memory card, further comprising:

The corresponding relationship between the disk logical block address of the data block to be stored and the flash memory logical block address of the data block to be stored is stored.

In combination with the second possible implementation of the first aspect, in the third possible implementation of the first aspect, the judging whether there is an old memory card cached in the flash memory card that is the same as the disk logical block address of the data block to be stored Data blocks include:

Judging whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored;

If it exists, then determine that the same old data block as the disk logical block address of the data block to be stored is cached in the flash memory card; otherwise, determine that there is no cache with the data block to be stored in the flash memory card The old data block with the same disk logical block address.

In combination with the first aspect or any implementation manner of the first aspect, the fourth possible implementation manner of the first aspect further includes:

Marking the data block to be stored as a dirty data block, and adding the data block to be stored to a queue of dirty data blocks.

In combination with the fourth possible implementation of the first aspect, the fifth possible implementation of the first aspect further includes:

Obtain the current free space ratio of the flash memory card;

When the ratio of the free space is less than a first preset threshold, determine the number of dirty data blocks to be read;

performing heap sorting on each dirty data block in the dirty data block queue according to the disk logic block address, and obtaining a first sorting heap;

Initiate several first asynchronous requests, and read the dirty data blocks in the flash memory card sequentially asynchronously from the head of the first sorting pile according to the number of dirty data blocks to be read;

Perform heap sorting on the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks to obtain a second sorting heap;

Initiate a second asynchronous request to asynchronously write the read dirty data blocks to the disk sequentially from the heap head of the second sorting heap, and the number of the second asynchronous request is the dirty data to be read the number of blocks.

With reference to the fifth possible implementation manner of the first aspect, in a sixth possible implementation manner of the first aspect, the heap sorting is min-heap sorting.

With reference to the fifth possible implementation manner of the first aspect, in a seventh possible implementation manner of the first aspect, the heap sort is a maximum heap sort.

With reference to the fifth possible implementation of the first aspect, in the eighth possible implementation of the first aspect, the number of the first asynchronous requests is determined according to a first formula, and the first formula is:

V=N+(M-N)*R

Wherein, V is the number of the first asynchronous request; N is the lower limit of the preset number of asynchronous requests; M is the upper limit of the preset number of asynchronous requests; R is the current space utilization rate of the flash memory card.

A second aspect of the present invention provides a device for writing a cache memory, the cache memory is a flash memory card, and the device includes:

Judging module, used to judge whether there is an old data block with the same old data block address as the disk logical block address of the data block to be stored in the flash memory card;

The first writing module is used to write the data block to be stored in an asynchronous manner when the judging module judges that an old data block with the same disk logic block address as the data block to be stored is cached in the flash memory card Write in the flash memory card;

The second writing module is used to write the data block to be stored asynchronously when the judging module judges that there is no old data block cached in the flash memory card with the same disk logic block address as the data block to be stored mode to write to the free block of the flash memory card.

In a first possible implementation manner of the second aspect, the second writing module includes:

A first judging unit, configured to judge whether there is a free block in the flash memory card;

A first writing unit, configured to asynchronously write the data block to be stored into a free block in the flash memory card when the first judging unit judges that there is a free block in the flash memory card;

The second writing unit is used to add the data block to be stored to the waiting queue when the judging unit judges that there is no free block in the flash memory card, and write the data block to the waiting queue when there is a free block in the flash memory card. The data blocks to be stored are written into free blocks in the flash memory card in an asynchronous manner.

In a second possible implementation manner of the second aspect, it also includes:

A saving module, configured to save the disk logical block address of the data block to be stored and the data block to be stored after the second writing module writes the data block to be stored into a free block in the flash memory card The corresponding relationship of the logical block address of the flash memory.

In a third possible implementation manner of the second aspect, the judging module includes:

The second judging unit is used to judge whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored;

The third judging unit is used to determine that the flash memory card caches the data to be stored when the second judging unit judges that there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored. The old data block with the same disk logical block address as the storage data block;

The fourth judging unit is used to determine that the flash memory card is not cached in the flash memory card when the second judging unit judges that there is no flash memory logical block address corresponding to the disk logical block address of the data block to be stored. Describe the old data block with the same disk logical block address as the data block to be stored.

In combination with the second aspect or any possible implementation manner of the second aspect, the fourth possible implementation manner of the second aspect further includes:

A marking module, configured to mark the data block to be stored as a dirty data block after the first writing module or the second writing module writes the data block to be stored into the flash memory card, and write the data to be stored The block is added to the dirty data block queue.

In combination with the fourth possible implementation of the second aspect, the fifth possible implementation of the second aspect further includes:

An acquisition module, configured to acquire the current free space ratio of the flash memory card;

A determining module, configured to determine the number of dirty data blocks to be read when the free space ratio is less than a first preset threshold;

The first sorting module is configured to perform heap sorting on each dirty data block in the dirty data block queue according to the disk logical block address, and obtain a first sorting heap;

The first reading module is used to initiate several first asynchronous requests, and reads the dirty data blocks in the flash memory card sequentially and asynchronously from the head of the first sorting pile according to the number of dirty data blocks to be read;

The second sorting module is configured to perform heap sorting on the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks, to obtain a second sorting heap;

The third writing module is configured to initiate a second asynchronous request, and write the read dirty data blocks to the disk sequentially from the heap head of the second sorting heap, the number of the second asynchronous request is the number of dirty data blocks to be read.

A third aspect of the present invention provides a device for writing a cache memory, the cache memory is a flash memory card, and the device includes:

At least one processor configured to:

Judging whether the old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card;

If yes, then write the data block to be stored in the flash memory card in an asynchronous manner;

If not, then write the data block to be stored in a free block in the flash memory card in an asynchronous manner; and

memory coupled to the at least one processor.

In a first possible implementation manner of the third aspect, at least one processor configured to write the data block to be stored into a free block of the flash memory card is further configured to:

Judging whether there is a free block in the flash memory card;

If it exists, then write the data block to be stored in a free block in the flash memory card in an asynchronous manner;

If it does not exist, the data block to be stored is added to the waiting queue, and when a free block occurs in the flash memory card, the data block to be stored is written into the free block in the flash memory card in an asynchronous manner in the steps.

In a second possible implementation manner of the third aspect, the at least one processor is further configured to:

After the data block to be stored is written into the free block in the flash memory card, the corresponding relationship between the disk logical block address of the data block to be stored and the flash memory logical block address of the data block to be stored is saved.

With reference to the second possible implementation of the third aspect, in the third possible implementation of the third aspect, it is configured to determine whether the flash memory card caches a disk with the same logical block address as the data block to be stored At least one processor of the old data block is further configured to:

Judging whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored;

If it exists, then determine that the same old data block as the disk logical block address of the data block to be stored is cached in the flash memory card; otherwise, determine that there is no cache with the data block to be stored in the flash memory card The old data block with the same disk logical block address.

With reference to the third aspect or any possible implementation manner of the third aspect, in a fourth possible implementation manner of the third aspect, the at least one processor is further configured to:

After the data block to be stored is written into the flash memory card, the data block to be stored is marked as a dirty data block, and the data block to be stored is added to a queue of dirty data blocks.

With reference to the fourth possible implementation manner of the third aspect, in a fifth possible implementation manner of the third aspect, the at least one processor is further configured to:

Obtain the current free space ratio of the flash memory card;

When the ratio of the free space is less than a first preset threshold, determine the number of dirty data blocks to be read;

performing heap sorting on each dirty data block in the dirty data block queue according to the disk logic block address, and obtaining a first sorting heap;

Initiate several first asynchronous requests, and read the dirty data blocks in the flash memory card sequentially asynchronously from the head of the first sorting pile according to the number of dirty data blocks to be read;

Perform heap sorting on the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks to obtain a second sorting heap;

Initiate a second asynchronous request to asynchronously write the read dirty data blocks to the disk sequentially from the heap head of the second sorting heap, and the number of the second asynchronous request is the dirty data to be read the number of blocks.

A method for writing a cache memory provided by an embodiment of the present invention uses a flash memory card (that is, a FLASH memory) as a cache memory, and when data caching is performed, it is judged whether there is a disk logic cached with a data block to be stored in the flash memory card If the old data block with the same block address exists, the data block to be stored is directly written into the flash memory card in an asynchronous manner; In the block, the write data cache is realized, and because the flash memory card does not need a backup battery to keep the power, the data will not be lost after power failure, so the energy consumption is low, and the price of the flash memory card itself is lower than that of the DRAM. Therefore, the method for writing the cache memory provided by the embodiment of the present application reduces the implementation cost of the storage system.

Description of drawings

FIG. 1 is a flow chart of a method for writing a cache memory provided in an embodiment of the present application;

FIG. 2 is a flow chart of another method for writing a cache memory provided by an embodiment of the present application;

FIG. 3 is a flow chart of another method for writing a cache memory provided by an embodiment of the present application;

FIG. 4 is a flowchart of another method for writing a cache memory provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of a process of writing data in a cache memory to a disk provided by an embodiment of the present application;

FIG. 6 is a schematic structural diagram of an apparatus for writing a cache memory according to an embodiment of the present application;

FIG. 7 is a schematic structural diagram of another device for writing a cache memory according to an embodiment of the present application;

FIG. 8 is a schematic structural diagram of another device for writing a cache memory according to an embodiment of the present application;

FIG. 9 is a schematic structural diagram of another device for writing a cache memory according to an embodiment of the present application;

FIG. 10 is a schematic structural diagram of another device for writing a cache memory according to an embodiment of the present application;

FIG. 11 is a schematic structural diagram of another device for writing a cache memory provided by an embodiment of the present application;

FIG. 12 is a schematic structural diagram of another device for writing a cache memory provided by an embodiment of the present application;

FIG. 13 is a structural diagram of a cache memory in an all-in-one system provided by an embodiment of the present application;

FIG. 14 is a structural diagram of a cache memory in a block storage disk array provided by an embodiment of the present application.

detailed description

In order for those skilled in the art to further understand the features and technical contents of the present invention, please refer to the following detailed description and accompanying drawings of the present invention. The accompanying drawings are provided for reference and illustration only, and are not intended to limit the present invention.

Please refer to Fig. 1, Fig. 1 is a flow chart of a method for writing a cache memory provided by an embodiment of the present application, wherein the cache memory is a flash memory card, i.e. a FLASH memory; the method includes:

Step S101: judging whether there is an old data block cached in the flash memory card which is the same as the disk logic block address of the data block to be stored; if yes, then execute step S102, otherwise, execute step S103;

Block storage is the most traditional form of storage. The embodiment of the present application is a method of writing cache memory based on block storage technology, that is, data is stored in the cache memory and disk in the form of data blocks.

In the example of this application, the flash memory card is divided into several logical blocks

The disk logic block address of the data block to be stored is information carried in the write request, and is used to indicate the storage location of the data block to be stored in the disk.

In the embodiment of the present application, after receiving the write request, it is first judged whether there is an old data block identical to the disk logical block address of the data block to be stored in the cache memory, that is, whether there is a data block in the flash memory card, and the The disk logic block address of the data block is the same as the disk logic block address of the data block to be stored.

Step S102: writing the data block to be stored into the flash memory card in an asynchronous manner;

In the embodiment of the present application, if there is already an old data block with the same logical block address as the data block to be stored in the flash memory card, no matter whether there is a free block in the flash memory card, an asynchronous write operation to the flash memory card is directly initiated, and the The data to be stored is written into the flash memory card.

It should be noted that in the embodiment of the present application, the free block is a logical free block. Therefore, if there is no free block, it may have a physical free space. Therefore, when there is no free block In the case of blocks, the data blocks to be stored can still be written into the flash memory card. Further, when there are no free blocks and no free space in the physical sense, the flash memory card will execute the erasing process. The specific erasing process It is common knowledge in this field and will not be repeated here.

Step S103: writing the data block to be stored into a free block of the flash memory card in an asynchronous manner.

In the embodiment of the present application, if there is no old data block with the same logical block address as the data block to be stored in the flash memory card, when there is a free block in the flash memory card, initiate an asynchronous write operation to the flash memory card, Write the data to be stored into the flash memory card.

A method for writing a cache memory provided by the embodiment of the present application uses a flash memory card (that is, a FLASH memory) as a cache memory. When performing data caching, it is judged whether there is a disk logic cached in the flash memory card and the data block to be stored. If the old data block with the same block address exists, the data block to be stored is directly written into the flash memory card in an asynchronous manner; In the block, the write data cache is realized, and because the flash memory card does not need a backup battery to keep the power, the data will not be lost after power failure, so the energy consumption is low, and the price of the flash memory card itself is lower than that of the DRAM. Therefore, the method for writing the cache memory provided by the embodiment of the present application reduces the implementation cost of the storage system, or in other words, the embodiment of the present application can realize a larger cache capacity under the same cost.

Moreover, the FLASH memory can adapt to the current mainstream hardware platform, and does not limit the operating system or hardware platform, as long as there is a PCI-E slot.

In the above-described embodiment, preferably, when writing the data block to be stored in the flash memory card, a data layout in the form of a log can be adopted, that is, the data block to be stored is stored sequentially according to the order of the logical block address of the flash memory from small to large, which can effectively ensure The continuity of data I/O, so that when the flash memory card is garbage collected, there is very little valid data in the garbage block, which reduces the write amplification of the flash memory card (that is, reduces the number of writes to the flash memory card), thereby avoiding There is a problem that the service life of the flash memory card is shortened due to writing to the flash memory card.

The flow chart of another method for writing a cache memory provided by the embodiment of the present application is shown in FIG. 2 , and the specific implementation process of step S103 may include:

Step S201, judging whether there is a free block in the flash memory card; if yes, execute step S202, otherwise, execute step S203;

Step S202: writing the data block to be stored into a free block in the flash memory card in an asynchronous manner;

Step S203: adding the data block to be stored into a waiting queue;

Step S204: Determine whether there is a free block in the flash memory card, if yes, execute step S202; otherwise, continue to wait.

In the embodiment of the present application, when there is no old data block cached in the flash memory card that is identical to the disk logical block address of the data block to be stored, it is first judged whether there is a free block in the flash memory card, and if there is a free block, then directly to the flash memory The card initiates an asynchronous write operation, and writes the data block to be stored into the flash memory card; if there is no free block, it waits until a free block appears in the flash memory card, and then initiates an asynchronous write operation to the flash memory card, and writes the data block to be stored Write to a free block of the flash memory card.

The above embodiment, after writing the data block to be stored into the free block in the flash memory card, may also include:

The corresponding relationship between the disk logical block address of the data block to be stored and the flash memory logical block address of the data block to be stored is saved.

Wherein, the logical block address of the flash memory of the data block to be stored is the logical block address of the data block to be stored in the flash memory card, that is to say, there is no cache in the cache card related to the data block to be stored. When the old data block corresponding to the disk logic block address of the data block is stored, after the data block to be stored is written into the free block in the cache card, the disk logic block address of the data block to be stored and the address of the data block to be stored in the cache card are saved. Correspondence between logical block addresses.

Specifically when saving the correspondence between the disk logical block address of the data block to be stored and the flash memory logical block address of the data block to be stored, a hash table can be used, as shown in Table 1:

Table 1 hash table

In Table 1, the values of each index (Hn, n=1, 2, 3, ...) are obtained from the logical block address of the disk through a hash algorithm. DLBAm (m=1, 2, 3, ...) indicates the disk logical block address; FLBAp (p = 1, 2, 3, ...) indicates the flash memory logical block address; because different disk logical block addresses are obtained after hashing It may be the same index value, so under one index value, it may correspond to the corresponding relationship between multiple disk logical block addresses and flash memory logical block addresses (as shown in Table 1, index H1 corresponds to two disk logical block addresses and flash memory logical block addresses Correspondence of block addresses). In the embodiment of the present application, in order to reduce conflicts (that is, to reduce the number of corresponding relationships under the same index in the hash table), the number of indexes is set to 1.5 times the number of logical block addresses in the flash memory card.

The hash algorithm can be as follows: the disk logic block address is multiplied by an unsigned 32-bit hexadecimal integer, such as the unsigned 32-bit hexadecimal integer can be 9e370001, and then the disk logic block address By multiplying the product with an unsigned 32-bit hexadecimal integer, the number of logical block addresses in the flash memory card is subtracted to obtain the hash value (ie index value) corresponding to the logical block address of the disk. The block address is a 32-bit hexadecimal number. Therefore, the index value corresponding to the logical block address of the disk is also a 32-bit hexadecimal number. Specifically, it can be determined according to the second formula, which is:

H=(DLBA*0x9e370001UL)%N,

Among them, H represents the index value corresponding to the disk logic block address DLBA; 0x9e370001UL is an unsigned 32-bit hexadecimal integer 9e370001; "%" represents the remainder operation on N; N represents the number of logic block addresses in the flash memory card number.

In the above embodiment, preferably, the judging whether there is an old data block cached in the flash memory card with the same address as the disk logical block address of the data block to be stored may include:

Judging whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored;

If it exists, then determine that the same old data block as the disk logic block address of the data block to be stored is cached in the flash memory card; otherwise, it is determined that there is no disk logic block with the disk logic block of the data block to be stored in the flash memory card The old data block with the same address.

That is to say, the embodiment of the present application determines whether an old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card through the correspondence between the disk logical block address and the flash memory logical block address, which improves the efficiency of writing data. s speed.

The flow chart of another method for writing the cache memory provided by the embodiment of the present application is shown in FIG. 3. After writing the data block to be stored into the flash memory card, it may also include:

Step S301: Mark the data block to be stored as a dirty data block, and add the data block to be stored into a queue of dirty data blocks.

The flow chart of another method for writing the cache memory provided by the embodiment of the present application is shown in Figure 4. In order to ensure the effectiveness of the storage system, when the amount of data stored in the cache memory reaches a certain value, the high-speed The data in the cache memory is written to the disk. Therefore, the method for writing the cache memory provided in the embodiment of the present application may further include:

Step S401: Obtain the current free space ratio of the flash memory card;

In the embodiment of the present application, the space other than the space occupied by dirty data blocks in the flash memory card is called free space, then the current free space ratio of the flash memory card is the ratio of the current free space in the flash memory card to the total space of the flash memory card.

Step S402: judging whether the free space ratio is smaller than a first preset threshold, if yes, execute step S403, otherwise, execute step S401;

The first preset threshold may be 20%, and of course, it may also be set according to actual needs, which is not specifically limited here.

Step S403: Determine the number of dirty data blocks to be read;

The number of dirty data blocks to be read is the number of data blocks that need to be written from the cache memory to the disk. The number of the dirty data blocks to be read may be determined according to the ratio of the free space, for example, after the dirty data blocks are read, the ratio of the free space in the flash memory card is greater than a second preset threshold. The second preset threshold may be equal to the first preset threshold, of course, may also be greater than the first preset threshold, which is not specifically limited here.

Step S404: performing heap sorting on each dirty data block in the dirty data block queue according to the logical block address of the disk to obtain a first sorted heap;

In order to improve the efficiency of writing data from the cache memory to the disk, the embodiment of the present application performs heap sorting on each dirty data block in the dirty data block queue according to the logical block address of the disk, and the heap sorting can be a minimum heap sorting, That is, the heap head of the first sorting heap is the dirty data block with the smallest disk logical block address; the heap sorting can also be sorting a large heap, that is, the heap head of the first sorting heap is the dirty data block with the largest disk logical block address.

Which sorting method to use can be determined according to the performance of the disk: if the disk supports access in the order of disk logical block addresses from small to large, you can choose the minimum heap sort; and if the disk supports the order of disk logical block addresses from large to small Access, you can choose the maximum heap sort;

In this step, since heap sorting is performed on all the dirty data block queues in the dirty data block queue, it can also be called global heap sorting.

Step S405: Initiate several first asynchronous requests, and sequentially asynchronously read the dirty data blocks in the flash memory card from the head of the first sorting heap according to the number of dirty data blocks to be read;

The number of the first asynchronous requests may be a preset value;

Step S406: sort the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks, and obtain a second sorting heap;

In this step, only the read dirty data blocks are heap sorted, so it can also be called partial heap sorting. It should be noted that both heap sorting uses the same heap sorting method, that is, both use the minimum heap Sort, or both use max heap sort.

Step S407: Initiate a second asynchronous request, and write the read dirty data blocks to the disk sequentially and asynchronously from the heap head of the second pair of sequences, and the number of the second asynchronous requests is the number of the to-be-read The number of dirty data blocks.

After the read dirty data block is written into the disk, there is free space in the flash memory card. At this time, the data to be stored in the waiting queue can be written into the flash memory card.

It should be noted that, in the process of sorting the minimum heap, if the logical block address of the newly added dirty data block in the dirty data block queue is smaller than the logical block address of the data block at the heap head, the newly added dirty data block Join the dirty data block waiting queue corresponding to the sorting heap, and when all the dirty data blocks on the heap have been read, perform heap sorting on the dirty data blocks in the dirty data block waiting queue to ensure that the The read data blocks are in ascending order; if the logical block address of the newly added dirty data block in the dirty data block queue is greater than the logical block address of the data block at the heap head, the newly added dirty data block will be directly added to the sorting Perform min-heap sort on the heap.

And in the process of carrying out the maximum heap sorting, if the logical block address of the newly added dirty data block in the dirty data block queue is greater than the logical block address of the data block at the heap head, then the newly added dirty data block is added to the In the dirty data block waiting queue corresponding to the sorting heap, when all the dirty data blocks on the heap have been read, heap sort the dirty data blocks in the dirty data block waiting queue to ensure that the data read from the flash memory card The blocks are in descending order; if the logical block address of the newly added dirty data block in the dirty data block queue is smaller than the logical block address of the data block at the heap head, the newly added dirty data block is directly added to the sorting heap for maximum Heap sort.

The following example illustrates the process of writing the data in the cache memory to the disk provided by this embodiment. Please refer to FIG. 5. FIG. 5 is the process of writing the data in the cache memory to the disk provided by the embodiment of the present application. schematic diagram;

In this example, there are 10 dirty data blocks in the dirty data block queue, and the label in each dirty data block in the figure is the disk logical block address of the dirty data block; the number of dirty data blocks to be read is 5, then , when the proportion of free space in the flash memory card is less than the first preset threshold, the 10 dirty data blocks are sorted by the minimum heap to obtain the first sorted heap, the heap head of the first sorted heap is the logical block address of the disk is 23 The dirty data blocks, the disk logical block addresses of subsequent dirty data blocks are 32, 33, 44, 48, 79, 95, 158, 189, 789 in sequence; then, start from the heap head of the first sorting heap in an asynchronous manner , read the five dirty data blocks with the smallest logical block addresses on the disk. In this example, the disk logical block addresses of the five dirty data blocks read are: 44, 32, 23, 33, and 48; The five dirty data obtained are sorted by the minimum heap again to obtain the second sorted heap. The heap head of the second sorted heap is still the dirty data block with disk logical block address 23, and the disk logical block addresses of subsequent dirty data blocks are 32, 33, 44, 48; then, starting from the heap head of the second sorting heap, write these five dirty data blocks to the disk in an asynchronous manner.

In the embodiment of the present application, when the data in the cache memory is written to the disk, the global sorting heap and the local heap sorting are adopted, and a waiting queue is maintained for both the global sorting heap and the local sorting heap (the global sorting heap Corresponding to the dirty data block queue, the local sorting heap corresponds to the dirty data block waiting queue) to ensure the order of data blocks written from the cache memory to the disk, and improve the efficiency of data writing from the cache memory to the disk, that is, to improve Brush efficiency.

In the above embodiment, preferably, the number of the first asynchronous requests may also be determined in the following manner:

The number of the first asynchronous requests can also be determined according to the preset upper limit and lower limit of the number of asynchronous requests, and the space utilization rate of the cache memory, assuming that the lower limit of the number of the first asynchronous requests is N, that is, the first At least N asynchronous requests can be initiated, the upper limit of the number of the first asynchronous request is M, that is, the first asynchronous request can be initiated at most M, and the space utilization rate of the cache memory is R, then, the number of the first asynchronous request It can be determined according to the first formula, wherein the first formula is:

V=N+(M-N)*R

Wherein, V is the number of first asynchronous requests; R=1-P, and P is the proportion of free space in the flash memory card.

Specifically, the value of N may be 4, and the value of M may be 256.

In the embodiment of the present application, the number of first asynchronous requests is dynamically adjusted according to the space utilization rate of the cache memory, so that when the space utilization rate of the cache memory is small, fewer asynchronous requests are used to operate the disk, while in When the space utilization rate of the cache memory is large, the disk is operated with more asynchronous requests, and because the more the number of asynchronous requests, the faster the speed, the more operations are performed on the disk. Therefore, the application implements For example, it ensures that the data in the cache memory is written to the disk at a faster rate when the space utilization rate is high (that is, when the space is relatively tight), that is, the data in the cache memory is recycled at a faster rate when the space utilization rate is high. Cache space; it can also ensure that when the space utilization is small (that is, when the space is not tight), the operation on the disk is reduced, so as to reduce the damage to the disk caused by reading or writing to the disk.

Corresponding to the method embodiment, a schematic structural diagram of a device for writing a cache memory provided in an embodiment of the present application is shown in FIG. 6, wherein the cache memory is a flash memory card, and the device may include:

A judging module 601, a first writing module 602 and a second writing module 603;

The judging module 601 is used to judge whether there is an old data block with the same old data block address as the disk logical block address of the data block to be stored in the flash memory card;

The first writing module 602 is used to write the data block to be stored in asynchronous manner mode to write in the flash memory card;

The second writing module 603 is used to write the data block to be stored as Asynchronously write to the free block of the flash memory card.

A schematic structural diagram of another device for writing a cache memory provided in an embodiment of the present application is shown in FIG. 7 , and the second writing module 603 may include:

A first judging unit 701, a first writing unit 702 and a second writing unit 703;

The first judging unit 701 is used to judge whether there is a free block in the flash memory card;

The first writing unit 702 is configured to asynchronously write the data block to be stored into the free block of the flash memory card when the first judging unit 701 judges that there is a free block in the flash memory card.

The second writing unit 703 is used to add the data to be stored to a waiting queue when the judging unit judges that there is no free block in the flash memory card, and write the data to the waiting queue when there is a free block in the flash memory card. The data block to be stored is written into the free block of the flash memory card in an asynchronous manner.

A schematic structural diagram of another device for writing a cache memory provided in an embodiment of the present application is shown in FIG. 8 , and may further include:

The saving module 801 is used to save the disk logical block address of the data block to be stored and the data block to be stored after the second writing module 603 writes the data block to be stored into a free block in the flash memory card. Corresponding relationship of the logical block address of the flash memory of the data block.

On the basis of the embodiment shown in FIG. 8 , a schematic structural diagram of another device for writing a cache memory provided in the embodiment of the present application is shown in FIG. 9 , and the judging module 601 may include:

The second judging unit 901, the third judging unit 902 and the fourth judging unit 903;

The second judging unit 901 is used to judge whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored;

The third judging unit 902 is used to determine that the flash memory card caches the flash memory logical block address corresponding to the disk logical block address of the data block to be stored when the second judging unit 901 judges that there is a The old data block with the same disk logical block address as the data block to be stored;

The fourth judging unit 903 is used to determine that there is no flash memory card cached with The old data block with the same disk logical block address as the data block to be stored.

A schematic structural diagram of another device for writing a cache memory provided in an embodiment of the present application is shown in FIG. 10 , and may further include:

A marking module 1001, configured to mark the data block to be stored as a dirty data block after the first writing module 602 or the second writing module 603 writes the data block to be stored into the flash memory card, and The data block to be stored is added to the dirty data block queue.

A schematic structural diagram of another device for writing a cache memory provided in an embodiment of the present application is shown in FIG. 11 , and may further include:

Obtaining module 1101, determining module 1102, first sorting module 1103, first reading module 1104, second sorting module 1105, third writing module 1106;

The obtaining module 1101 is used to obtain the current free space ratio of the flash memory card;

The determining module 1102 is configured to determine the number of dirty data to be read when the free space ratio is less than a first preset threshold;

The first sorting module 1103 is configured to perform heap sorting on each dirty data block in the dirty data block queue according to the disk logic block address, and obtain a first sorting heap;

The first reading module 1104 is used for initiating several first asynchronous requests, according to the number of the dirty data blocks to be read from the heap head of the first sorting heap to asynchronously read the dirty data blocks in the flash memory card sequentially ;

The second sorting module 1105 is configured to sort the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks, and obtain a second sorting heap;

The third writing module 1106 is configured to initiate a second asynchronous request, and write the read dirty data blocks to the disk sequentially starting from the heap head of the second sorting heap, wherein each of the second asynchronous request The number is the number of dirty data blocks to be read.

A schematic structural diagram of another device for writing a cache memory provided in an embodiment of the present application is shown in FIG. 12 , wherein the cache memory is a flash memory card, and the device may include:

at least one processor 1201, and a memory 1202 coupled to the at least one processor;

The at least one processor is configured to:

Judging whether the old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card;

If yes, then write the data block to be stored in the flash memory card in an asynchronous manner;

If not, write the data block to be stored into a free block in the flash memory card in an asynchronous manner.

In the above embodiment, preferably, at least one processor configured to write the data block to be stored into a free block of the flash memory card may further be configured to:

Judging whether there is a free block in the flash memory card;

If it exists, then write the data block to be stored in a free block in the flash memory card in an asynchronous manner;

If it does not exist, the data block to be stored is added to the waiting queue, and when a free block occurs in the flash memory card, the data block to be stored is written into the free block in the flash memory card in an asynchronous manner in the steps.

In the above embodiment, preferably, the at least one processor may be further configured to:

After the data block to be stored is written into the free block in the flash memory card, the corresponding relationship between the disk logical block address of the data block to be stored and the flash memory logical block address of the data block to be stored is saved.

In the above embodiment, preferably, at least one processor configured to judge whether an old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card may further be configured to:

Judging whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored;

If it exists, then determine that the same old data block as the disk logical block address of the data block to be stored is cached in the flash memory card; otherwise, determine that there is no cache with the data block to be stored in the flash memory card The old data block with the same disk logical block address.

In the above embodiment, preferably, the at least one processor may be further configured to:

After the data block to be stored is written into the flash memory card, the data block to be stored is marked as a dirty data block, and the data block to be stored is added to a queue of dirty data blocks.

In the above embodiment, preferably, the at least one processor may be further configured to:

Obtain the current free space ratio of the flash memory card;

When the ratio of the free space is less than a first preset threshold, determine the number of dirty data blocks to be read;

performing heap sorting on each dirty data block in the dirty data block queue according to the disk logic block address, and obtaining a first sorting heap;

Initiate several first asynchronous requests, and read the dirty data blocks in the flash memory card sequentially asynchronously from the head of the first sorting pile according to the number of dirty data blocks to be read;

Perform heap sorting on the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks to obtain a second sorting heap;

Initiate a second asynchronous request to asynchronously write the read dirty data blocks to the disk sequentially from the heap head of the second sorting heap, and the number of the second asynchronous request is the dirty data to be read the number of blocks.

The embodiment of the present application can be applied to the Cache architecture in the all-in-one system. Unlike the Cache architecture in the all-in-one system in the prior art, the all-in-one system provided by the embodiment of the present application uses FLASH memory instead of NVDIMM (Non-Volatile DIMM , a non-volatile memory) as a cache memory, as shown in Figure 13;

In the Cache architecture of the all-in-one machine, the Cache does not exist in the business processing module, but exists in each storage node. The function of the business processing module is the same as that in the prior art, and it is mainly used for I/O (input/output) requests. Distribution processing. By distributing the I/O request through the service processing module, it is possible to find out which storage node the storage area accessed by it is located.

A storage node is a processing unit for I/O requests. Each storage node contains its own independent CPU, independent Cache, and one or several disks. The number of disks in each storage node is exactly the same as the size of the Cache. All storage nodes The storage pools that make up the entire storage system.

In the embodiment of the present application, the write request of the all-in-one system reaches the storage node through the route of the service processing module, and the CPU in the storage node writes the write request into the FLASH memory through the method of writing the cache memory provided in the embodiment of the present application After that, the message "Write Successfully" is returned. When the amount of written data in the FLASH memory reaches a certain level, the write data in the FLASH memory is refreshed to the disk through the method for writing the cache memory provided by the embodiment of the present application, so as to reclaim the space on the FLASH memory for subsequent writing. Request to use.

The embodiments of the present application can also be used in block storage disk arrays. Unlike the block storage disk arrays in the prior art, the array storage system provided by the embodiments of the present application uses FLASH memory instead of NVRAM (Non-Volatile Random Access Memory, non-volatile volatile random access memory) as a cache memory, as shown in Figure 14.

The block storage disk array generally adopts one dragging N (that is, the head responsible for business processing + N multi-disk disk clusters to form an overall storage system), the cache memory exists in the head part of the storage system, and the head The high-speed cache memory in the computer carries the I/O cache function of the disks in the left and right expansion cabinets at the back, and the machine head and the disk cluster are generally connected through the SAS bus. In the embodiment of the present application, the CPU of the head part realizes the function of writing the cache memory.

The steps of the methods or algorithms described in connection with the embodiments disclosed herein may be directly implemented by hardware, software modules executed by a processor, or a combination of both. The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the embodiments of the present invention described above are not intended to limit the protection scope of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.

Claims (18)

1. a method for writing cache memory, is characterized in that, described cache memory is a flash memory card, and described method comprises: Judging whether the old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card; If so, then write the data block to be stored in the flash memory card in an asynchronous manner; If not, then judge whether there is a free block in the flash memory card, if there is, then write the data block to be stored in the free block in the flash memory card in an asynchronous manner, if not, write the data block to be stored The storage data block is added to the waiting queue, and when a free block appears in the flash memory card, the data block to be stored is written into the free block of the flash memory card in an asynchronous manner. 2. method according to claim 1, is characterized in that, after writing the data block to be stored into the free block in the flash memory card, it also includes: The corresponding relationship between the disk logical block address of the data block to be stored and the flash memory logical block address of the data block to be stored is saved. 3. method according to claim 2, it is characterized in that, whether the old data block that is cached with the disk logic block address identical with the disk logical block address of data block to be stored in the described flash memory card comprises: Judging whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored; If it exists, then determine that the same old data block as the disk logical block address of the data block to be stored is cached in the flash memory card; otherwise, determine that there is no cache with the data block to be stored in the flash memory card The old data block with the same disk logical block address. 4. The method according to any one of claims 1-3, characterized in that, after writing the data block to be stored into the flash memory card, further comprising: Marking the data block to be stored as a dirty data block, and adding the data block to be stored to a queue of dirty data blocks. 5. The method according to claim 4, further comprising: Obtain the current free space ratio of the flash memory card; When the ratio of the free space is less than a first preset threshold, determine the number of dirty data blocks to be read; performing heap sorting on each dirty data block in the dirty data block queue according to the disk logic block address, and obtaining a first sorting heap; Initiate several first asynchronous requests, and read the dirty data blocks in the flash memory card sequentially asynchronously from the head of the first sorting pile according to the number of dirty data blocks to be read; Perform heap sorting on the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks to obtain a second sorting heap; Initiate a second asynchronous request to asynchronously write the read dirty data blocks to the disk sequentially from the heap head of the second sorting heap, and the number of the second asynchronous request is the dirty data to be read the number of blocks. 6. The method according to claim 5, wherein the heap sorting is a minimum heap sorting. 7. The method according to claim 5, wherein the heap sort is a maximum heap sort. 8. The method according to claim 5, wherein the number of the first asynchronous requests is determined according to a first formula, and the first formula is: V=N+(M-N)*R Wherein, V is the number of the first asynchronous request; N is the lower limit of the preset number of asynchronous requests; M is the upper limit of the preset number of asynchronous requests; R is the current space utilization rate of the flash memory card. 9. A device for writing cache memory, characterized in that, said cache memory is a flash memory card, and said device comprises: Judging module, used to judge whether there is an old data block with the same old data block address as the disk logical block address of the data block to be stored in the flash memory card; The first writing module is used to write the data block to be stored in an asynchronous manner when the judging module judges that an old data block with the same disk logic block address as the data block to be stored is cached in the flash memory card Write in the flash memory card; The second writing module is used to write the data block to be stored asynchronously when the judging module judges that there is no old data block cached in the flash memory card with the same disk logic block address as the data block to be stored Mode is written in the free block of described flash memory card; Wherein, the second writing module includes: A first judging unit, configured to judge whether there is a free block in the flash memory card; A first writing unit, configured to asynchronously write the data block to be stored into a free block in the flash memory card when the first judging unit judges that there is a free block in the flash memory card; The second writing unit is used to add the data block to be stored to the waiting queue when the judging unit judges that there is no free block in the flash memory card, and write the data block to the waiting queue when there is a free block in the flash memory card. The data blocks to be stored are written into free blocks in the flash memory card in an asynchronous manner. 10. The device according to claim 9, further comprising: A saving module, configured to save the disk logical block address of the data block to be stored and the data block to be stored after the second writing module writes the data block to be stored into a free block in the flash memory card The corresponding relationship of the logical block address of the flash memory. 11. The device according to claim 10, wherein the judging module comprises: The second judging unit is used to judge whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored; The third judging unit is used to determine that the flash memory card caches the data to be stored when the second judging unit judges that there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored. The old data block with the same disk logical block address as the storage data block; The fourth judging unit is used to determine that the flash memory card is not cached in the flash memory card when the second judging unit judges that there is no flash memory logical block address corresponding to the disk logical block address of the data block to be stored. Describe the old data block with the same disk logical block address as the data block to be stored. 12. The device according to any one of claims 9-11, further comprising: A marking module, configured to mark the data block to be stored as a dirty data block after the first writing module or the second writing module writes the data block to be stored into the flash memory card, and write the data to be stored The block is added to the dirty block queue. 13. The device of claim 12, further comprising: An acquisition module, configured to acquire the current free space ratio of the flash memory card; A determining module, configured to determine the number of dirty data blocks to be read when the free space ratio is less than a first preset threshold; The first sorting module is configured to perform heap sorting on each dirty data block in the dirty data block queue according to the disk logical block address, and obtain a first sorting heap; The first reading module is used to initiate several first asynchronous requests, and reads the dirty data blocks in the flash memory card sequentially and asynchronously from the head of the first sorting pile according to the number of dirty data blocks to be read; The second sorting module is configured to perform heap sorting on the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks, to obtain a second sorting heap; The third writing module is configured to initiate a second asynchronous request, and write the read dirty data blocks to the disk sequentially from the heap head of the second sorting heap, the number of the second asynchronous request is the number of dirty data blocks to be read. 14. A device for writing cache memory, characterized in that, said cache memory is a flash memory card, and said device comprises: At least one processor configured to: Judging whether the old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card; If yes, then write the data block to be stored in the flash memory card in an asynchronous manner; If not, then judge whether there is a free block in the flash memory card, if there is, then write the data block to be stored in the free block in the flash memory card in an asynchronous manner, if not, write the data block to be stored into the free block in the flash memory card Storing the data block is added to the waiting queue, and when a free block appears in the flash memory card, writing the data block to be stored into the free block in the flash memory card in an asynchronous manner; and memory coupled to the at least one processor. 15. The apparatus of claim 14, wherein the at least one processor is further configured to: After the data block to be stored is written into the free block in the flash memory card, the corresponding relationship between the disk logical block address of the data block to be stored and the flash memory logical block address of the data block to be stored is saved. 16. The device according to claim 15, characterized in that at least one processor configured to judge whether an old data block with the same old data block address as the disk logical block address of the data block to be stored is cached in the flash memory card is further configured for: Judging whether there is a flash memory logical block address corresponding to the disk logical block address of the data block to be stored; If it exists, then determine that the same old data block as the disk logical block address of the data block to be stored is cached in the flash memory card; otherwise, determine that there is no cache with the data block to be stored in the flash memory card The old data block with the same disk logical block address. 17. The device according to any one of claims 14-16, wherein the at least one processor is further configured to: After the data block to be stored is written into the flash memory card, the data block to be stored is marked as a dirty data block, and the data block to be stored is added to a queue of dirty data blocks. 18. The apparatus of claim 17, wherein the at least one processor is further configured to: Obtain the current free space ratio of the flash memory card; When the ratio of the free space is less than a first preset threshold, determine the number of dirty data blocks to be read; performing heap sorting on each dirty data block in the dirty data block queue according to the disk logic block address, and obtaining a first sorting heap; Initiate several first asynchronous requests, and read the dirty data blocks in the flash memory card sequentially asynchronously from the head of the first sorting pile according to the number of dirty data blocks to be read; Perform heap sorting on the read dirty data blocks according to the disk logical block addresses of the read dirty data blocks to obtain a second sorting heap; Initiate a second asynchronous request to asynchronously write the read dirty data blocks to the disk sequentially from the heap head of the second sorting heap, and the number of the second asynchronous request is the dirty data to be read the number of blocks.