CN103389893A - Read-write method and device for configuration register - Google Patents
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Abstract
The invention provides a read-write method for a configuration register, which is characterized by allocating all bitfields of the register into multiple function bitfields and multiple write-enabling bitfields in advance, wherein each function bitfield is used for storing one register content and is arranged by corresponding to one write-enabling bitfield. The method comprises the steps of receiving an operation signal sent outside a piece, aiming at the register and comprising a register address and a write-read operation command; setting the value of the write-enabling bitfield corresponding to the write-read operation command; reading to the function bitfield and the write-enabling bitfield, corresponding to each other, according to the register address, and judging whether the value of the write-enabling bitfield is effective or not; and performing write-read operation on the register content of the corresponding function bitfield according to the value of the write-enabling bitfield. The invention also provides a write-read device for the configuration register. According to the invention, write-read operation is performed on the register content of the corresponding function bitfield by judging the value of the write-enabling bitfield, so the technical problems that the read operation of the register is increased and correction is easily wrong are effectively solved.
Description
Technical field
The present invention relates to integrated circuit fields, relate in particular to a kind of register read write method and device.
Background technology
Along with the progress of science and technology and the continuous lifting of chip technology level, increasing SOC(System on Chip, systems-on-a-chip) chip provides for the user single-chip solution that performance is higher, integrated level better, cost is lower.
Generally, all be provided with a plurality of configuration registers in the SOC chip, control clock, reset, function, flow process etc.By these configuration registers, the research and development of software personnel can be easily control, the function of chip are arranged and the flow process of chip is configured the clock of each functional module, the signal such as reset, thereby chip can correctly be worked.
The bit wide of existing single configuration register is generally identical with highway width, but form to control clock, resets, the baseband signal of function, flow process etc. only needs a bit or several bit usually.Like this, a configuration register often can be divided into a plurality of register-bit sections, be used for controlling respectively clock, reset, the baseband signal of flow process, function etc., a register-bit section can be comprised of a bit or many bits, the not coordination section of same configuration register, act on different., because the base unit of read-write register is single register rather than single register-bit section, on the write operation of certain register-bit section, likely can affect whole register.Say like this and cause two problems: the one,, for the modification of each register-bit section, at first to read the value of whole register, then do suitable processing, then register is carried out write operation, thereby increased the read operation to register; The 2nd, when two threads are modified to the not coordination section that is positioned at same register, due to the value that all needs first to read whole register before revising, the register that may cause a thread just to read, revised by another thread, thereby cause the modification to the register-bit section to make mistakes at once.
Summary of the invention
Embodiment of the present invention technical matters to be solved is, a kind of configuration register reading/writing method and device are provided, can only be by reading whole register to revise the register-bit section to solve in prior art, thus increase the read operation of register and the technical matters that the modification to the register-bit section makes mistakes easily occurs.
For solving the problems of the technologies described above, the invention provides a kind of configuration register reading/writing method, in advance whole sections of register are assigned as a plurality of function digit sections and a plurality of write enable bit section, wherein, each function digit section is used for content of registers of storage, and with a corresponding setting of write enable bit section, the method comprises:
The outer operation signal for register that sends of receiving sheet, this operation signal comprises register address and read-write operation instruction.
Set the value of corresponding write enable bit section according to this read-write operation instruction.
Read according to the content of this register address to the write enable bit section of the corresponding function digit section of this register and correspondence, judge whether the value of this write enable bit section is effective value.And
According to the value of this write enable bit section, the content of registers of corresponding function digit section is carried out read-write operation.
Correspondingly, the present invention also provides a kind of configuration register read-write equipment, be connected with a plurality of registers by address bus, whole sections of this register are allocated in advance as a plurality of function digit sections and a plurality of write enable bit section, wherein, each function digit section is used for content of registers of storage, and with a corresponding setting of write enable bit section, this device comprises:
Receiving element, be used for the outer operation signal for register that sends of receiving sheet, and this operation signal comprises register address and read-write operation instruction.
Write enable bit section control module, be used for the value according to the corresponding write enable bit section of this read-write operation instruction setting.And
Read-write control unit, be used for resolving this operational order to extract address information wherein, search corresponding register according to this address information, the function digit section of this register and the content of write enable bit section are read, and determine whether to revise the value of corresponding function position section according to the value of the write enable bit section that reads, thereby the content of registers of this function digit section is carried out read-write operation.
a kind of configuration register reading/writing method provided by the invention and device, in advance configuration register is distributed into a plurality of function digit sections and corresponding write enable bit section, by the judgement to the write enable bit segment value, the content of registers of corresponding function digit section is carried out read-write operation, thereby the technical matters that the modification that effectively having solved increases register read operation and easily occur makes mistakes, reached the running time of saving processor when revising the content of registers of a certain position of configuration register section, and avoided at different threads the content of registers of the not coordination section of the same configuration register easy interactional technique effect of when operation of modifying.
Description of drawings
Fig. 1 is the high-level schematic functional block diagram of the read-write equipment of the configuration register in the embodiment of the present invention;
Fig. 2 is the first embodiment schematic diagram that configuration register shown in Figure 1 is assigned to function digit section and write enable bit section;
Fig. 3 is the second embodiment schematic diagram that configuration register shown in Figure 1 is assigned to function digit section and write enable bit section;
Fig. 4 is the process flow diagram of the reading/writing method of configuration register of the present invention.
Label declaration:
Embodiment
By describing technology contents of the present invention, structural attitude in detail, being realized purpose and effect, below in conjunction with embodiment and coordinate accompanying drawing to be explained in detail.
Please refer to Fig. 1, be the high-level schematic functional block diagram of a kind of configuration register read-write equipment in the embodiment of the present invention, this read-write equipment 10 is connected with each register 20 respectively by address bus.This read-write equipment 10 comprises receiving element 11 and read-write control unit 12, and wherein, this receiving element 11 is used for the operation signal for register 20 that the receiving processor (not shown) sends, and this operation signal comprises register address and read-write operation instruction.This read-write control unit 12 is used for carrying out correspondingly read-write operation according to this read write command pair register corresponding with this address, obtains the read-write operation result.
In the present embodiment, when design, according to application, need design register definitions file, this register definitions file comprises address, content and the initial value of each register that sets in advance.Wherein, the address of each register is independent of each other, finds corresponding register while being used for addressing; The content of register is control function or the parameter meaning of each section representative in circuit in register, such as clock, reset, flow process etc.; The initial value of register is after chip power resets, when sheet does not also carry out any read-write operation to register outward, and the default value of register.In actual applications, will, according to pre-designed register definitions file, realize the read-write operation to register.And the register definitions file of each register has independently definitional part, and address, content and the initial value of the corresponding register of the definitional part of a register are unrelated between the parameter of each register.
Please consulting simultaneously Fig. 2, is that schematic diagram is distributed in the position of the register 20 in the first embodiment, and each register 20 all position section is allocated in advance as n function digit section Fn and n write enable bit section En.Wherein, the corresponding content of registers of each function digit section Fn, each write enable bit section En and a corresponding setting of function digit section Fn, be used for the read-write operation of corresponding write enable bit section Fn is controlled.For example, content of registers corresponding to function digit section F1 is for resetting, and corresponding write enable bit section E1 controls the read-write operation of function digit section F1.Each function digit section Fn and each write enable bit section En can be assigned with a bit or a plurality of bit.In the present embodiment, the bit length that is assigned with of each function digit section Fn is identical with the bit length that corresponding write enable bit section En is assigned with.In the second embodiment, the bit length that each write enable bit section En is assigned with is 1, and each function digit section Fn can be assigned with corresponding bit length according to corresponding content of registers, as shown in Figure 3.
this read-write equipment 10 also comprises write enable bit section control module 13, wherein, the value of corresponding write enable bit section En is set in the read-write operation instruction that this write enable bit section control module 13 sends according to processor, this read-write control unit 12 is used for resolving the operational order that sent by processor to extract address information wherein, search corresponding register 20 according to this address information, the function digit section Fn of this register 20 and the content of write enable bit section En are read, and determine whether to revise the value of corresponding function position section Fn according to the value of the write enable bit section En that reads, thereby Fn carries out read-write operation to this function digit section.Particularly, when processor sent the data reading command, the value of each write enable bit section En was set to invalid value, and with the value of each function digit section Fn, read in the lump.When processor transmission data write instruction, these data write instruction and also comprise data to be written, and wherein, these data to be written comprise the value of corresponding function position section Fn and the value of corresponding write enable bit section En.The value of write enable bit section En in this write enable bit section control module 13 data to be written according to this arranges the value of corresponding write enable bit section En.This read-write control unit 12 determines that the value of this write enable bit section En is effective value, data to be written is write in the content of registers of this function digit section Fn; Otherwise, the content of registers of this function digit section Fn is not made an amendment.
In the first embodiment, the invalid value of this write enable bit section En is that whole bit place values are 0, and effective value is that whole bit place values are 1.In the second embodiment, the invalid value of this write enable bit section En is 0, and effective value is 1.
See also Fig. 4, be the process flow diagram of the reading/writing method of configuration register of the present invention, the method comprises:
Step S40, be assigned as whole sections of register 20 n function digit section Fn and n write enable bit section En in advance.Wherein, content of registers of each function digit section Fn storage, each write enable bit section En and a corresponding setting of function digit section Fn.
Each function digit section Fn and each write enable bit section En can be assigned with a bit or a plurality of bit.In the first embodiment, the bit length that is assigned with of each function digit section Fn is identical with the bit length that corresponding write enable bit section En is assigned with.In the second embodiment, the bit length that each write enable bit section En is assigned with is 1, and each function digit section Fn can be assigned with corresponding bit length according to corresponding content of registers.
In the present embodiment, when design, according to application, need design register definitions file, this register definitions file comprises address, content and the initial value of each register that sets in advance.Wherein, the address of each register is independent of each other, finds corresponding register while being used for addressing; The content of register is control function or the parameter meaning of each section representative in circuit in register, such as clock, reset, flow process etc.; The initial value of register is after chip power resets, when sheet does not also carry out any read-write operation to register outward, and the default value of register.In actual applications, will, according to pre-designed register definitions file, realize the read-write operation to register.And the register definitions file of each register has independently definitional part, and address, content and the initial value of the corresponding register of the definitional part of a register are unrelated between the parameter of each register.
Step S41, the operation signal for register 20 that these receiving element 11 receiving processors send, wherein, this operation signal comprises register address and read-write operation instruction.
Step S42, the value of corresponding write enable bit section En is set in the read-write operation instruction that this write enable bit section control module 13 sends according to processor.Particularly, when this read-write operation instruction was the data reading command, the value of this write enable bit section control module 13 each write enable bit section En was set to invalid value, and with the value of each function digit section Fn, read in the lump.When this read-write operation instruction is data while writing instruction, these data write instruction and also comprise data to be written, and wherein, these data to be written comprise the value of corresponding function position section Fn and the value of corresponding write enable bit section En.The value of write enable bit section En in this write enable bit section control module 13 data to be written according to this arranges the value of corresponding write enable bit section En.The register address that step S43, this read-write control unit 12 send according to processor reads the content of the corresponding function digit section Fn of this register 20 and write enable bit section En, judges whether the value of this write enable bit section En is effective value.If, enter step S44, otherwise, step S45 entered.
In the first embodiment, the invalid value of this write enable bit section En is that whole bit place values are 0, and effective value is that whole bit place values are 1.In the second embodiment, the invalid value of this write enable bit section En is 0, and effective value is 1.
Step S44, this read-write control unit 12 write data to be written in the content of registers of this function digit section Fn, and then flow process finishes.
Step S45, this read-write control unit 12 obtains the content of registers of this function digit section Fn, and then flow process finishes.
a kind of configuration register reading/writing method provided by the invention and device, in advance configuration register is distributed into a plurality of function digit sections and corresponding write enable bit section, by the judgement to the write enable bit segment value, the content of registers of corresponding function digit section is carried out read-write operation, thereby the technical matters that the modification that effectively having solved increases register read operation and easily occur makes mistakes, reached the running time of saving processor when revising the content of registers of a certain position of configuration register section, and avoided at different threads the content of registers of the not coordination section of the same configuration register easy interactional technique effect of when operation of modifying.
The foregoing is only embodiments of the invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or equivalent flow process conversion that utilizes instructions of the present invention and accompanying drawing content to do; or directly or indirectly be used in other relevant technical fields, all in like manner be included in scope of patent protection of the present invention.
Claims (10)
1. a configuration register reading/writing method, is characterized in that, in advance whole sections of register is assigned as a plurality of function digit sections and a plurality of write enable bit section, wherein, each function digit section is used for content of registers of storage, and with a corresponding setting of write enable bit section, described method comprises:
The outer operation signal for register that sends of receiving sheet, described operation signal comprises register address and read-write operation instruction;
Set the value of corresponding write enable bit section according to described read-write operation instruction;
Read according to the content of described register address to the write enable bit section of the corresponding function digit section of described register and correspondence, judge whether the value of described write enable bit section is effective value; And according to the value of described write enable bit section, the content of registers of corresponding function digit section is carried out read-write operation.
2. configuration register reading/writing method as claimed in claim 1, is characterized in that, described read-write operation instruction is the data reading command, and the value of described write enable bit section is set to invalid value, and with the value of each function digit section, read in the lump.
3. configuration register reading/writing method as claimed in claim 1, it is characterized in that, described read-write operation instruction is that data write instruction, described data write instruction and also comprise that the described data to be written of data to be written comprise the value to be written of corresponding function position section and the value of corresponding write enable bit section, according to the write enable bit segment value in described data to be written, set the value of corresponding write enable bit section, described value according to described write enable bit section is carried out read-write operation to the content of registers of corresponding function digit section, specifically comprises:
Be effective value and data to be written being write in the content of registers of described function digit section according to the value of described write enable bit section; And
Be invalid value and data to be written not being write in the content of registers of described function digit section according to the value of described write enable bit section.
4. as claim 1,2 or 3 described configuration register reading/writing methods, it is characterized in that, the bit length that each function digit section is assigned with is identical with the bit length that corresponding write enable bit section is assigned with, and the invalid value of described write enable bit section is that whole bit place values are 0, and effective value is that whole bit place values are 1.
5. as claim 1,2 or 3 described configuration register reading/writing methods, it is characterized in that, the bit length that each write enable bit section is assigned with is 1, each function digit section is assigned with corresponding bit length according to corresponding content of registers, and the invalid value of described write enable bit section is 0, and effective value is 1.
6. configuration register read-write equipment, be connected with a plurality of registers by address bus, it is characterized in that, whole sections of described register are allocated in advance as a plurality of function digit sections and a plurality of write enable bit section, wherein, each function digit section is used for content of registers of storage, and with a corresponding setting of write enable bit section, described device comprises:
Receiving element, be used for the outer operation signal for register that sends of receiving sheet, and described operation signal comprises register address and read-write operation instruction;
Write enable bit section control module, be used for the value according to the corresponding write enable bit section of described read-write operation instruction setting; And
Read-write control unit, be used for resolving described operational order to extract address information wherein, search corresponding register according to described address information, the function digit section of described register and the content of write enable bit section are read, and determine whether to revise the value of corresponding function position section according to the value of the write enable bit section that reads, thereby the content of registers of described function digit section is carried out read-write operation.
7. configuration register read-write equipment as claimed in claim 6, is characterized in that, described read-write operation instruction is the data reading command, the value of write enable bit section is set to invalid value, and with one of the value of each function digit section, read.
8. configuration register read-write equipment as claimed in claim 6 is characterized in that, described read-write operation instruction is that data write instruction, described data write instruction and also comprise data to be written, described data to be written comprise the value to be written of corresponding function position section and the value of corresponding write enable bit section, described write enable bit section control module is set the value of corresponding write enable bit section according to the write enable bit segment value in described data to be written, described read-write control unit determines that the value of described write enable bit section is effective value and data to be written being write in the content of registers of described function digit section, the value of determining described write enable bit section is invalid and data to be written are not write in the content of registers of described function digit section.
9. configuration register read-write equipment as claimed in claim 7 or 8, it is characterized in that, the bit length that each function digit section is assigned with is identical with the bit length that corresponding write enable bit section is assigned with, and the invalid value of described write enable bit section is that whole bit place values are 0, and effective value is that whole bit place values are 1.
10. configuration register read-write equipment as claimed in claim 7 or 8, it is characterized in that, the bit length that each write enable bit section is assigned with is 1, and each function digit section is assigned with corresponding bit length according to corresponding content of registers, and the invalid value of described write enable bit section is 0, and effective value is 1.
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| CN105373501A (en) * | 2015-07-31 | 2016-03-02 | 福州瑞芯微电子股份有限公司 | Clock cycle control method and device for bus module and loop filter module |
| CN110187919A (en) * | 2019-05-27 | 2019-08-30 | 眸芯科技（上海）有限公司 | The device of configuration register, method and system |
| CN110781117A (en) * | 2019-09-12 | 2020-02-11 | 广东高云半导体科技股份有限公司 | SPI expansion bus interface and system on chip based on FPGA |
| CN110795382A (en) * | 2019-10-09 | 2020-02-14 | 广东高云半导体科技股份有限公司 | Universal asynchronous receiving and transmitting transmitter based on FPGA and system on chip |
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Address after: 350000 building, No. 89, software Avenue, Gulou District, Fujian, Fuzhou 18, China Patentee after: Ruixin Microelectronics Co., Ltd Address before: 350000 building, No. 89, software Avenue, Gulou District, Fujian, Fuzhou 18, China Patentee before: Fuzhou Rockchips Electronics Co.,Ltd. |