CN103218008A - Full CMOS band-gap voltage reference circuit with automatic output voltage adjustment - Google Patents

Abstract

The invention discloses a full CMOS bandgap voltage reference circuit with automatic output voltage adjustment. The bandgap voltage reference circuit includes a start-up circuit and a bandgap reference generation circuit, wherein: the start-up circuit is used to prevent the It is low to make the output terminal high all the time, and there is a locked state; the bandgap reference generation circuit is used to generate a current that has nothing to do with temperature. The present invention realizes a full CMOS bandgap reference circuit by using PMOS transistors instead of bipolar transistors. The bandgap reference circuit has the advantages of low power consumption, small area, good noise performance, good stability without considering process errors, etc., and is suitable for processes that cannot manufacture bipolar transistors or have difficulty in manufacturing bipolar transistors.

Description

Whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage

Technical field

The present invention relates to the CMOS technical field of analog integrated circuit design, be specifically related to a kind of whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage.

Background technology

Band-gap reference is directed to the band gap of silicon, belongs to the mimic channel field, comprises voltage reference and current reference.Bandgap reference voltage all has application in A/D converter, the medium many places of voltage and current voltage stabilizer, and it provides a stable DC reference voltage for system, and whether it stablizes the performance that directly has influence on integrated circuit.Therefore for improving circuit performance, devisers have designed various bandgap voltage reference circuit again on the basis of " band gap " technology of generally acknowledging and principle thereof.The performance parameter of weighing the bandgap voltage reference circuit quality mainly contains temperature and floats coefficient, output noise, power consumption, power supply inhibition etc.

Used bipolar transistor at present in bandgap voltage reference circuit, the principle of work of this type of circuit is simple more, and is easy to realize, can not make the restriction with larger area bipolar transistor technology but can be subjected to can not making maybe.At this kind situation, the present invention proposes a kind of band-gap reference circuit of whole CMOS, promptly in circuit, replace bipolar transistor, advantage such as this circuit is low in energy consumption in addition, area is little with PMOS pipe.

Summary of the invention

(1) technical matters that will solve

Fundamental purpose of the present invention is to provide a kind of whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage, can not make maybe with the solution special process and can not make the problem with larger area bipolar transistor.In addition, use the pmos type transistor to replace bipolar transistor among the present invention,, its advantage arranged also compared to using nmos type transistor, as low in energy consumption, noiseproof feature is good etc.

(2) technical scheme

For achieving the above object, the invention provides a kind of whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage, this bandgap voltage reference circuit comprises that start-up circuit 10 and band-gap reference produce circuit 20, wherein: start-up circuit 10 is used to prevent be the high locking state that occurs for the low output terminal that makes because of the amplifier negative input end always always; Band-gap reference produces circuit 20, is used to produce and the irrelevant electric current of temperature.

In the such scheme, described start-up circuit 10 comprises PMOS pipe M1 and the 3rd NMOS pipe M3 that connects with diode, and the 2nd NMOS pipe M2 that inserts with leakage form altogether, wherein: the PMOS pipe M1 and the 3rd NMOS that connect with diode manage M3, be used for dividing potential drop, a suitable and constant current potential be provided for the grid of the 2nd NMOS pipe M2 that inserts with leakage form altogether; The 2nd NMOS that inserts with leakage form altogether manages M2, be used for when source electrode 201 current potentials of the initial stage of powering on the 2nd NMOS pipe M2 hang down, to second resistance R 2 and the 7th PMOS pipe M7 injection current, make source electrode 201 current potentials of the 2nd NMOS pipe M2 be climbed to a suitable value, thereby make amplifier enter normal operating conditions fast.

In the such scheme, described band-gap reference produces circuit 20 and comprises amplifier 200, the the 4th to the 6th PMOS current mirror (M4, M5, M6), be used to produce first resistance R 1 of positive temperature coefficient (PTC) voltage, second and third shunt resistance (R2, R3), and the 7th and the 8th PMOS pipe (M7, M8) that connects with diode, wherein: amplifier 200 and the 5th PMOS current mirror M5, first resistance R 1, the 3rd shunt resistance R3, the 8th PMOS pipe M8 connect into negative feedback type, and the voltage at node 201 and node 202 places is equated; The the 7th and the 8th PMOS pipe (M7, M8) that connects with diode is operated in sub-threshold region, makes its gate source voltage have negative temperature coefficient, thereby makes the electric current that flows through first resistance R 1 have positive temperature coefficient (PTC); Second and third shunt resistance (R2, R3) is used to make its electric current that flows through to have negative temperature coefficient, and like this, suitably the resize ratio coefficient just can make the electric current that flows through the 4th to the 6th PMOS current mirror (M4, M5, M6) have zero-temperature coefficient.

In the such scheme, described amplifier 200 adopts the two stage amplifer structure, the first order is that difference is imported single-ended export structure, the second level is the single tube common-source amplifier, because there is feedback loop in the outside, for the phase margin that makes loop is enough big, add compensating resistance R and building-out capacitor C carries out phase compensation at the drain and gate of the 8th PMOS of second level amplifier pipe M8.

(3) beneficial effect

Compared with prior art, the beneficial effect of technical scheme generation of the present invention is as follows:

1, the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage provided by the invention by adopting the mode of pmos type transistor replacement bipolar transistor, has realized a kind of band-gap reference circuit of whole CMOS.This circuit at first makes band-gap reference produce circuit 20 by start-up circuit 10 and enters normal operating conditions; To export the reference current amount afterwards and convert the reference voltage amount to by resistance.The output voltage temperature of circuit is floated coefficient and is reached 3.5ppm/ ℃, and Power Supply Rejection Ratio (PSRR) reaches 57.7.

2, the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage provided by the invention, replace bipolar transistor owing to be operated in sub-threshold region with the pmos type transistor in the circuit, make very little by the temperature independent electric current of mirror image, thereby reduced the total power consumption of circuit; Simultaneously, owing to avoid using bipolar transistor in the circuit, thereby when the domain of this band-gap reference circuit is realized, aspect area, be greatly improved.

3, the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage provided by the invention is because the transistorized noiseproof feature of PMOS will be owing to bipolar transistor, so the sub-bandgap reference circuit also is improved aspect noise.

4, the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage provided by the invention is applicable to and can not makes bipolar transistor or make the inconvenient technology of bipolar transistor, applied range.

Description of drawings

Fig. 1 is the structural representation according to the band-gap reference circuit of the whole CMOS of the embodiment of the invention;

Fig. 2 is the circuit diagram according to amplifier in the band-gap reference circuit of the whole CMOS of the embodiment of the invention;

Fig. 3 is the simulation result figure according to output voltage in the band-gap reference circuit of the whole CMOS of the embodiment of the invention.

Embodiment

For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.

As shown in Figure 1, Fig. 1 is the structural representation according to the band-gap reference circuit of the whole CMOS of the embodiment of the invention, this bandgap voltage reference circuit comprises that start-up circuit 10 and band-gap reference produce circuit 20, wherein: start-up circuit 10 is used to prevent be the high locking state that occurs for the low output terminal that makes because of the amplifier negative input end always always; Band-gap reference produces circuit 20, is used to produce and the irrelevant electric current of temperature.

Start-up circuit 10 comprises PMOS pipe M1 and the 3rd NMOS pipe M3 that connects with diode, and the 2nd NMOS pipe M2 that inserts with leakage form altogether, wherein: the PMOS pipe M1 and the 3rd NMOS that connect with diode manage M3, be used for dividing potential drop, a suitable and constant current potential be provided for the grid of the 2nd NMOS pipe M2 that inserts with leakage form altogether; The 2nd NMOS that inserts with leakage form altogether manages M2, be used for when source electrode 201 current potentials of the initial stage of powering on the 2nd NMOS pipe M2 hang down, to second resistance R 2 and the 7th PMOS pipe M7 injection current, make source electrode 201 current potentials of the 2nd NMOS pipe M2 be climbed to a suitable value, thereby make amplifier enter normal operating conditions fast.

Band-gap reference produces circuit 20 and is used to produce and the irrelevant electric current of temperature, comprise amplifier 200, the the 4th to the 6th PMOS current mirror (M4, M5, M6), be used to produce first resistance R 1 of positive temperature coefficient (PTC) voltage, second and third shunt resistance (R2, R3), and the 7th and the 8th PMOS pipe (M7, M8) that connects with diode, wherein: amplifier 200 and the 5th PMOS current mirror M5, first resistance R 1, the 3rd shunt resistance R3, the 8th PMOS pipe M8 connect into negative feedback type, and the voltage at node 201 and node 202 places is equated; The the 7th and the 8th PMOS pipe (M7, M8) that connects with diode is operated in sub-threshold region, makes its gate source voltage have negative temperature coefficient, thereby makes the electric current that flows through first resistance R 1 have positive temperature coefficient (PTC); Second and third shunt resistance (R2, R3) is used to make its electric current that flows through to have negative temperature coefficient, and like this, suitably the resize ratio coefficient just can make the electric current that flows through the 4th to the 6th PMOS current mirror (M4, M5, M6) have zero-temperature coefficient.Resistance is used for temperature independent current conversion is become temperature independent voltage.The circuit working principle is as follows:

M7 in the design, M8 are the PMOS pipe, and substrate is identical with source potential, and ratio is 1: n for the PMOS pipe, has corresponding threshold voltage expression formula:

$V_{\mathrm{th}}={\mathrm{\&Phi;}}_{\mathrm{MS}}-Q_{\mathrm{SS}}/C_{\mathrm{ox}}+2\left|{\mathrm{\&Phi;}}_F\right|+\frac{\sqrt{2q{\mathrm{\&epsiv;}}_{\mathrm{<figure-callout\; id="2"\; label="Si\; N\; A"\; filenames="HDA00003006735100031.png"\; state="\{\{state\}\}">Si</figure-callout>}}{N}_A{}_{}2\left|{\mathrm{\&Phi;}}_F\right|}}{C_{\mathrm{ox}}}---\left(1\right)$

Ф wherein _MS=Ф _F-sub-Ф _F-gateN _AAcceptor impurity concentration for substrate (p N-type semiconductor N); Q _SSBe oxide layer-electric charge; C _OxBe the unit area gate oxide capacitance;

Ф _F＝-V _Tln(N _A/n _i) (2)

n _i＝(N _CN _A) ^1/2 (3)

N _CBe the effective density of states of conduction band, N _vBe the effective density of states of conduction band, n _i∝ (T) ^3/2

Ask the derivative of T to get to 1 formula:

$\frac{\&PartialD;V_{\mathrm{th}}}{\&PartialD;T}=-\frac{1}{C_{\mathrm{ox}}}\frac{\&PartialD;\sqrt{2q{\mathrm{\&epsiv;}}_{\mathrm{Si}}{\mathrm{<figure-callout\; id="2"\; label="N\; D"\; filenames="HDA00003006735100031.png"\; state="\{\{state\}\}">N</figure-callout>}}_{D}2\left|{\mathrm{\&Phi;}}_F\right|}}{\&PartialD;T}-2\left(\frac{\&PartialD;{\mathrm{\&Phi;}}_F}{\&PartialD;T}\right)$

$=-\frac{\&PartialD;{\mathrm{\&Phi;}}_F}{\&PartialD;T}(2+\frac{\sqrt{2q{N}_D{\mathrm{\&epsiv;}}_{\mathrm{<figure-callout\; id="2"\; label="Si"\; filenames="HDA00003006735100031.png"\; state="\{\{state\}\}">Si</figure-callout>}}2\left|{\mathrm{\&Phi;}}_F\right|}}{2C_{\mathrm{ox}}{\mathrm{\&Phi;}}_F})---\left(4\right)$

With formula 2 and formula 3 substitution formulas 4:

$\frac{\&PartialD;V_{\mathrm{th}}}{\&PartialD;T}=-\frac{1}{T}({\mathrm{\&Phi;}}_F+\frac{{\mathrm{<figure-callout\; id="0"\; label="E\; g"\; filenames="HDA00003006735100031.png"\; state="\{\{state\}\}">E</figure-callout>}}_g}{2q})(2+\frac{\sqrt{2q{N}_D{\mathrm{\&epsiv;}}_{\mathrm{<figure-callout\; id="2"\; label="Si"\; filenames="HDA00003006735100031.png"\; state="\{\{state\}\}">Si</figure-callout>}}2\left|{\mathrm{\&Phi;}}_F\right|}}{2C_{\mathrm{ox}}{\mathrm{\&Phi;}}_F})---\left(5\right)$

Generally speaking, | Φ _F| less than E _G0/ 2q, by formula 5 as can be known, the threshold voltage of metal-oxide-semiconductor has negative temperature coefficient, and representative value is-2mV/ ℃.

If the drain-source voltage of M7, M8, can obtain its leakage current expression formula much larger than threshold voltage:

I _D＝ζμC _ox(W/L)(V _T ²)exp[(V _Gs-V _th)/(ζV _T)] (6)

ζ is the sub-threshold slope factor, obtains the expression formula of metal-oxide-semiconductor gate source voltage:

$V_{\mathrm{GS}}\left(T\right)=V_{\mathrm{th}}\left(T\right)+\mathrm{\&zeta;}{V}_T\ln \left[(L/W)(1/{V_T}^2)\frac{I_{\mathrm{DS}}}{\mathrm{\&zeta;\&mu;}\left(T\right)C_{\mathrm{ox}}}\right]---\left(7\right)$

$\mathrm{\&mu;}\left(T\right)=\frac{q}{{m_p}^{*}({\mathrm{AT}}^{3/2}+{\mathrm{BN}}_i/T^{3/2})}---\left(8\right)$

Calculate for simplifying, get μ (T) ∝ (T) ^-2, formula 7 is asked the derivative of T:

$\frac{\&PartialD;V_{\mathrm{GS}}}{\&PartialD;T}=\frac{\&PartialD;V_{\mathrm{th}}}{\&PartialD;T}+\mathrm{\&zeta;}\frac{k}{q}\ln \left[\left(\frac{L}{W}\right){\left(\frac{q}{k}\right)}^2\left(\frac{{\mathrm{<figure-callout\; id="0"\; label="I\; DS\; T"\; filenames="HDA00003006735100031.png"\; state="\{\{state\}\}">I</figure-callout>}}_{\mathrm{DS}}{T_{}}^{}{{}_0}^2}{\mathrm{\&zeta;\&mu;}\left(T_0\right)C_{\mathrm{ox}}}\right)\right]---\left(9\right)$

So it is negative that first and second on formula 9 equal sign right sides are, illustrate that the gate source voltage of metal-oxide-semiconductor has negative temperature coefficient.

The expression formula of the reference voltage of the output of circuit is:

V _ref＝R4(V _GS2/R2+ΔV _Gs/R1)

＝R4[V _GS2+(R2/R0)ζV _T·lnn]/R2 (10)

Suitably choose the proportionate relationship of R1 and R2, can obtain temperature independent reference voltage.

As shown in Figure 2, amplifier adopts the two stage amplifer structure, the first order is that difference is imported single-ended export structure, the second level is the single tube common-source amplifier, because there is feedback loop in the outside, for the phase margin that makes loop is enough big, add compensating resistance R and building-out capacitor C carries out phase compensation at the drain and gate of the 8th PMOS of second level amplifier pipe M8.

Referring to Fig. 3, Vbg＜0〉floats curve for the temperature of tt section 3.3V, and it is 3.52ppm/ ℃ that temperature is floated coefficient, and Vbg＜1〉floats curve for the temperature of ff section 3.6V, and Vbg＜2〉floats curve for the temperature of ss section 3.0V.

In sum, the band-gap reference circuit of this whole CMOS provided by the invention has following beneficial effect:

1) the present invention has realized a kind of band-gap reference circuit of whole CMOS by adopting the mode of pmos type transistor replacement bipolar transistor;

2) this circuit makes band-gap reference produce circuit by start-up circuit and enters normal operating conditions;

3) this circuit will be exported the reference current amount and convert voltage to by resistance;

4) to float coefficient be 3.5ppm/ ℃ to the output voltage temperature that obtains this circuit by emulation, and Power Supply Rejection Ratio (PSRR) is 57.7.

Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (4)

1. the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage is characterized in that, this bandgap voltage reference circuit comprises that start-up circuit (10) and band-gap reference produce circuit (20), wherein:

Start-up circuit (10) is used to prevent be the high locking state that occurs for the low output terminal that makes because of the amplifier negative input end always always;

Band-gap reference produces circuit (20), is used to produce and the irrelevant electric current of temperature.

2. the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage according to claim 1, it is characterized in that, described start-up circuit (10) comprises PMOS pipe (M1) and the 3rd NMOS pipe (M3) that connects with diode, and the 2nd NMOS pipe (M2) that inserts with leakage form altogether, wherein:

PMOS pipe (M1) and the 3rd NMOS pipe (M3) with diode connects are used for dividing potential drop, a suitable and constant current potential are provided for the grid of the 2nd NMOS pipe (M2) that inserts with leakage form altogether;

The 2nd NMOS that inserts with leakage form altogether manages (M2), be used for when source electrode (201) current potential of the initial stage of powering on the 2nd NMOS pipe (M2) hangs down, to second resistance (R2) and the 7th PMOS pipe (M7) injection current, make source electrode (201) current potential of the 2nd NMOS pipe (M2) be climbed to a suitable value, thereby make amplifier enter normal operating conditions fast.

3. the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage according to claim 1, it is characterized in that, described band-gap reference produces circuit (20) and comprises amplifier (200), the the 4th to the 6th PMOS current mirror (M4, M5, M6), be used to produce first resistance (R1) of positive temperature coefficient (PTC) voltage, second and third shunt resistance (R2, R3), and the 7th and the 8th PMOS pipe (M7, M8) that connects with diode, wherein:

Amplifier (200) connects into negative feedback type with the 5th PMOS current mirror (M5), first resistance (R1), the 3rd shunt resistance (R3), the 8th PMOS pipe (M8), and the voltage at node 201 and node 202 places is equated;

The the 7th and the 8th PMOS pipe (M7, M8) that connects with diode is operated in sub-threshold region, makes its gate source voltage have negative temperature coefficient, thereby makes the electric current that flows through first resistance (R1) have positive temperature coefficient (PTC);

Second and third shunt resistance (R2, R3) is used to make its electric current that flows through to have negative temperature coefficient, and like this, suitably the resize ratio coefficient just can make the electric current that flows through the 4th to the 6th PMOS current mirror (M4, M5, M6) have zero-temperature coefficient.

4. the whole CMOS bandgap voltage reference circuit with automatic adjustment output voltage according to claim 3, it is characterized in that, described amplifier (200) adopts the two stage amplifer structure, the first order is that difference is imported single-ended export structure, the second level is the single tube common-source amplifier, because there is feedback loop in the outside, for the phase margin that makes loop is enough big, the drain and gate adding compensating resistance (R) and the building-out capacitor (C) of managing (M8) at the 8th PMOS of second level amplifier carry out phase compensation.

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