CN103187533B - A kind of organic electroluminescence device and preparation method thereof - Google Patents
A kind of organic electroluminescence device and preparation method thereof Download PDFInfo
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Abstract
本发明涉及一种有机电致发光器件及其制备方法,有机电致发光器件包括依次层叠的下述层:基板、第一电极层、有机功能层、第二电极层,并且,其还包括一层低折射率栅格层,所述栅格层的折射率为大于1.0且低于所述有机功能层的折射率,所述栅格层置于第一电极层与有机功能层之间,或者所述栅格层置于基板与第一电极层之间。通过该栅格层对光束光路的调节,使部分原来因全反射损失的光束射入到玻璃到达空气中,从而提高有机发光显示器件的亮度及效率。
The present invention relates to an organic electroluminescent device and a preparation method thereof. The organic electroluminescent device comprises the following layers stacked in sequence: a substrate, a first electrode layer, an organic functional layer, and a second electrode layer, and it also includes a A low refractive index grid layer, the refractive index of the grid layer is greater than 1.0 and lower than the refractive index of the organic functional layer, the grid layer is placed between the first electrode layer and the organic functional layer, or The grid layer is placed between the substrate and the first electrode layer. Through the adjustment of the optical path of the light beam by the grid layer, part of the light beam originally lost due to total reflection enters the glass and reaches the air, thereby improving the brightness and efficiency of the organic light-emitting display device.
Description
技术领域technical field
本发明涉及一种有机电致发光器件(Organic Light Emitting Device,以下也简称OLED),尤其涉及一种包含栅格层的有机电致发光器件。本发明还涉及所述有机电致发光器件的制备方法。The present invention relates to an organic light emitting device (Organic Light Emitting Device, also referred to as OLED hereinafter), in particular to an organic light emitting device including a grid layer. The invention also relates to a method for preparing the organic electroluminescent device.
背景技术Background technique
OLED具备多层结构,包括基板、阳极层、有机功能层和阴极层。基板通常由折射率小于1.7的材料制成(例如玻璃基板的折射率一般为1.4~1.5)而其上的有机功能层的折射率一般为1.7~1.8。因此,有很大部分的光束在较高折射率的有机功能层与较低折射率的基板之间的界面发生全反射而被局限在有机功能层中,不能射入基板而到达空气中,以致OLED实际发出到空气中的光只有约20%,而有约80%的光被局限或损耗在器件内部,无法被取出应用。要想获得高亮度、高效率的OLED,必须大幅提高OLED的光输出效率。OLED has a multi-layer structure, including substrate, anode layer, organic functional layer and cathode layer. The substrate is usually made of a material with a refractive index less than 1.7 (for example, the refractive index of a glass substrate is generally 1.4-1.5) and the organic functional layer thereon generally has a refractive index of 1.7-1.8. Therefore, a large part of the light beam is totally reflected at the interface between the organic functional layer with a higher refractive index and the substrate with a lower refractive index and is confined in the organic functional layer, cannot enter the substrate and reaches the air, so that Only about 20% of the light actually emitted by OLEDs into the air, and about 80% of the light is confined or lost inside the device and cannot be taken out for applications. In order to obtain high-brightness and high-efficiency OLEDs, the light output efficiency of OLEDs must be greatly improved.
US20040119402中介绍了通过将基板制作成梯形形状且在梯形上边制作凹槽,将OLED器件制作在其中,以使局限在有机层中、射出到器件侧面的光束通过梯形形状的基板到达基板正表面,从而提高器件的效率及亮度。但这种方法只是取出器件边缘部分的光束,且这种结构的基板形状复杂,制作困难,制作成本高。In US20040119402, it is introduced that the substrate is made into a trapezoidal shape and a groove is made on the trapezoidal shape, and an OLED device is made in it, so that the beam confined in the organic layer and emitted to the side of the device passes through the trapezoidal shaped substrate to reach the front surface of the substrate, Therefore, the efficiency and brightness of the device are improved. However, this method only takes out the light beam at the edge of the device, and the substrate of this structure has a complicated shape, making it difficult to manufacture and high in manufacturing cost.
CN1498046A介绍了在玻璃基板与第一电极层之间加入一层光散射层,使在有机层与玻璃基板界面之间的由于全反射被局限在有机层中的光束通过散射改变光路,使部分光束进入玻璃基板而到达空气中,提高器件的效率及亮度。但这种方法也使原来能进入玻璃基板的光束由于散射改变光路被局限在有机层中,这种方法整体提高器件效率或亮度的比例较低,同时由于散射层制备工艺复杂,实际应用价值不高。CN1498046A introduces adding a layer of light scattering layer between the glass substrate and the first electrode layer, so that the light beam confined in the organic layer due to total reflection between the organic layer and the glass substrate interface changes the optical path through scattering, so that part of the light beam Enter the glass substrate and reach the air, improving the efficiency and brightness of the device. However, this method also makes the light beam that can originally enter the glass substrate confined in the organic layer due to scattering and changing the optical path. This method has a low overall improvement in device efficiency or brightness. At the same time, due to the complicated preparation process of the scattering layer, the actual application value is not good. high.
CN1571595B介绍了在OLED器件内部加入光损耗防止层及微隙层。其中,光损耗防止层由多个带有凸起的衍射光栅组成;微隙层由气体或真空填充组成。但由于衍射光栅的精细度要求较高,因此制造工艺复杂,成品率低。而且器件内部充入气体将会产生产品稳定性问题及耐用性不理想、产品一致性差等问题。CN1571595B describes adding a light loss prevention layer and a micro-gap layer inside an OLED device. Wherein, the optical loss prevention layer is composed of a plurality of diffraction gratings with protrusions; the micro-gap layer is composed of gas or vacuum filling. However, due to the high fineness requirements of the diffraction grating, the manufacturing process is complicated and the yield is low. Moreover, filling the device with gas will cause problems such as product stability, unsatisfactory durability, and poor product consistency.
发明内容Contents of the invention
本发明的一个目的是提供一种具有改善的光输出性能且易于制备的有机发光显示器件。An object of the present invention is to provide an organic light emitting display device having improved light output performance and being easy to manufacture.
本发明的有机发光显示器件包括依次层叠的下述层:基板、第一电极层、有机功能层、第二电极层,并且,其还包括一层低折射率栅格层,所述栅格层的折射率为大于1.0且低于所述有机功能层的折射率,所述栅格层位于第一电极层与有机功能层之间,或者所述栅格层位于基板与第一电极层之间。The organic light-emitting display device of the present invention includes the following layers stacked in sequence: a substrate, a first electrode layer, an organic functional layer, and a second electrode layer, and it also includes a low-refractive index grid layer, and the grid layer The refractive index is greater than 1.0 and lower than the refractive index of the organic functional layer, the grid layer is located between the first electrode layer and the organic functional layer, or the grid layer is located between the substrate and the first electrode layer .
本发明还提供所述有机发光显示器件的制备方法,包括在基板上形成所述低折射率栅格层,然后依次沉积彼此层叠的第一电极层、有机功能层和第二电极层;或者在基板上沉积第一电极层,在第一电极层上形成低折射率栅格层,然后依次沉积彼此层叠的有机功能层和第二电极层;然后封装。The present invention also provides a method for preparing the organic light-emitting display device, comprising forming the low-refractive-index grid layer on a substrate, and then sequentially depositing a first electrode layer, an organic functional layer, and a second electrode layer stacked on each other; or Depositing a first electrode layer on the substrate, forming a low-refractive index grid layer on the first electrode layer, and then sequentially depositing an organic functional layer and a second electrode layer stacked on each other; and then encapsulating.
本发明的有机发光显示器件通过包含所述低折射率栅格层,使一部分原来在有机功能层与基板界面因为全反射原因损失的光束,通过该低折射率栅格层对光束光路的调节,而射入到基板中从而到达空气中。因此,本发明的有机发光显示器件具有提高的亮度及效率。而且由于该低折射率栅格层对加工工艺精细度要求不高,因此可由简单的工艺例如光刻法制作,且产品一致性好。The organic light-emitting display device of the present invention includes the low-refractive index grid layer, so that a part of the light beam originally lost at the interface between the organic functional layer and the substrate due to total reflection can be adjusted by the low-refractive index grid layer to the optical path of the light beam. Instead, it is injected into the substrate to reach the air. Therefore, the organic light emitting display device of the present invention has improved brightness and efficiency. Moreover, since the low-refractive-index grid layer does not require high processing fineness, it can be produced by a simple process such as photolithography, and the product consistency is good.
附图说明Description of drawings
图1为现有技术中有机发光显示器件的结构(对比例1)的剖面图;1 is a cross-sectional view of the structure (comparative example 1) of an organic light-emitting display device in the prior art;
图2为对比例1发光像素图形图;Fig. 2 is a graphic diagram of light-emitting pixels in Comparative Example 1;
图3为实施例1的正方形栅格层图案;Fig. 3 is the square grid layer pattern of embodiment 1;
图4为实施例1的像素区域中显示出的正方形栅格图案;Fig. 4 is the square grid pattern shown in the pixel area of embodiment 1;
图5为本发明一种OLED结构的剖面图;5 is a cross-sectional view of an OLED structure of the present invention;
图6为本发明另一种OLED结构的剖面图;6 is a cross-sectional view of another OLED structure of the present invention;
图7为像素区域中显示出的正方形嵌套状的栅格图案;FIG. 7 is a square nested grid pattern displayed in the pixel area;
图8为像素区域中显示出的六边形嵌套状的栅格图案;FIG. 8 is a hexagonal nested grid pattern displayed in the pixel area;
图9为像素区域中显示出的圆形嵌套状的栅格图案;FIG. 9 is a circular nested grid pattern displayed in the pixel area;
图10为单个像素区域内以紧密相邻方式排列的六边形栅格图案;Figure 10 is a hexagonal grid pattern arranged in a close adjacent manner in a single pixel area;
图11为像素区域中示出的以紧密相邻方式排列的六边形栅格图案。FIG. 11 is a grid pattern of hexagons arranged in close proximity shown in the pixel area.
具体实施方式detailed description
本发明的有机发光显示器件包括依次层叠的下述层:基板、第一电极层、有机功能层、第二电极层,并且,其还包括一层低折射率栅格层,所述栅格层的折射率为大于1.0且低于所述有机功能层的折射率,所述栅格层位于第一电极层与有机功能层之间,或者所述栅格层位于基板与第一电极层之间。The organic light-emitting display device of the present invention includes the following layers stacked in sequence: a substrate, a first electrode layer, an organic functional layer, and a second electrode layer, and it also includes a low-refractive index grid layer, and the grid layer The refractive index is greater than 1.0 and lower than the refractive index of the organic functional layer, the grid layer is located between the first electrode layer and the organic functional layer, or the grid layer is located between the substrate and the first electrode layer .
所述栅格层可用任何具有所述折射率且适用于OLED的材料制成,为了便于在其上形成栅格图案,优选采用光刻胶制备所述栅格层,例如触控面板用感光性绝缘及保护层光阻剂EOC130。The grid layer can be made of any material that has the refractive index and is suitable for OLEDs. In order to facilitate the formation of grid patterns thereon, it is preferable to use photoresist to prepare the grid layer, such as photosensitive for touch panels. Insulation and protective layer photoresist EOC130.
为了使更多的光能够射入基板并到达空气中,优选所述栅格层位于基板与第一电极层之间。In order to allow more light to enter the substrate and reach the air, preferably the grid layer is located between the substrate and the first electrode layer.
该栅格层的折射率优选为1.0-1.5。栅格层的折射率越低,进入到基板到达空气中的光束越多,显示器件亮度提高的幅度就越大。The refractive index of the grid layer is preferably 1.0-1.5. The lower the refractive index of the grid layer is, the more light beams enter the substrate and reach the air, and the greater the brightness of the display device is improved.
为了使经由栅格层调节光路的光更多的射入基板并进入空气中,优选该栅格层的透光率为75%-99%。In order to allow more light that adjusts the light path through the grid layer to enter the substrate and into the air, the light transmittance of the grid layer is preferably 75%-99%.
为便于制作,优选该栅格层的厚度为0.1μm~20μm,更优选为0.1μm~5μm。For the convenience of manufacture, the grid layer preferably has a thickness of 0.1 μm to 20 μm, more preferably 0.1 μm to 5 μm.
在每个像素区域内,所述栅格层的凸起部分构成的图案优选为:以紧密相邻方式排列的多个相同大小的正N边形(即每个不位于最外周的正N边形均与其他相邻正N边形共用各边),使得栅格层图案呈网状,且其中正N边形各边为凸起部分;或一系列以同心的形式层层嵌套的形状相同而尺寸不同的多个正N边形或圆形,其中在每个像素区域的边界以内、最大正N边形或圆形以外的区域面积与该像素区域总面积之比优选大于0且不高于1/4。其中N≥3,并且所述正N边形优选为正三角形、正方形或正六边形。In each pixel area, the pattern formed by the convex part of the grid layer is preferably: a plurality of regular N-gons of the same size arranged in a close adjacent manner (that is, each regular N side not located at the outermost shape share each side with other adjacent regular N-gons), so that the grid layer pattern is net-like, and each side of the regular N-gon is a convex part; or a series of concentric shapes nested layer by layer A plurality of regular N-gons or circles that are the same but of different sizes, wherein the ratio of the area of the area outside the largest regular N-gon or circle within the boundary of each pixel area to the total area of the pixel area is preferably greater than 0 and not higher than 1/4. Where N≥3, and the regular N-gon is preferably a regular triangle, square or regular hexagon.
上述以紧密相邻方式排列的正N边形的各边的宽度、或者上述层层嵌套的图案中每个最大正N边形或圆形内各凸起部分的宽度d1优选为0.05μm~20μm,上述紧密相邻排列的正N边形网状栅格中每个正N边形空隙的外接圆半径、或层层嵌套的图案中每个最大正N边形或圆形内各空隙(不包括最中心的空隙)的宽度d2优选为1μm~30μm,所述最中心的空隙的宽度优选小于最大正N边形或圆形内其他各空隙宽度d2的二倍。d1和d2的大小影响器件的亮度。为了提高器件的亮度,d1更优选为0.05μm至5μm,尤其是0.05μm至3μm,d2更优选为1μm至10μm。The width of each side of the above-mentioned regular N-gons arranged in a closely adjacent manner, or the width d1 of each convex part in each largest regular N-gon or circle in the above-mentioned layer-by-layer nesting pattern is preferably 0.05 μm~ 20 μm, the radius of the circumscribed circle of each regular N-gon gap in the above-mentioned closely adjacent regular N-gon grid, or each gap in each largest regular N-gon or circle in the nested pattern The width d2 (excluding the centralmost void) is preferably 1 μm to 30 μm, and the width of the centralmost void is preferably less than twice the width d2 of other voids in the largest regular N-gon or circle. The size of d1 and d2 affects the brightness of the device. In order to improve the brightness of the device, d1 is more preferably 0.05 μm to 5 μm, especially 0.05 μm to 3 μm, and d2 is more preferably 1 μm to 10 μm.
所述栅格层在像素区域以外的区域可具有栅格图案,也可不具有栅格图案而全部作为凸起部分。The area of the grid layer other than the pixel area may have a grid pattern, or may not have a grid pattern, and may be used as a raised portion.
所述OLED可具有绝缘层和隔离柱层组成以界定像素区域,所述绝缘层和隔离柱层彼此层叠并位于栅格层与有机功能层之间或者第一电极层与有机功能层之间。然而,当所述栅格层在像素区域以外的部分中不具有栅格图案时,所述OLED可不另外包括所述绝缘层。绝缘层和隔离柱层可采用本领域中常规用于制作绝缘层和隔离柱层的材料和方法制作,例如用光刻胶采用光刻法制作。The OLED may be composed of an insulating layer and a spacer layer to define a pixel area, and the insulating layer and the spacer layer are stacked on each other and located between the grid layer and the organic functional layer or between the first electrode layer and the organic functional layer. However, when the grid layer does not have a grid pattern in a portion other than the pixel area, the OLED may not additionally include the insulating layer. The insulating layer and the spacer layer can be made by using materials and methods conventionally used in the art for making the insulating layer and the spacer layer, for example, photoresist is used to make it by photolithography.
所述OLED中,可以采用透明的第一电极层和具备反射功能的第二电极层,也可采用具备反射功能的第一电极层和透明的第二电极层,或者采用透明的第一电极层和透明的第二电极层。In the OLED, a transparent first electrode layer and a reflective second electrode layer may be used, or a reflective first electrode layer and a transparent second electrode layer may be used, or a transparent first electrode layer may be used. and a transparent second electrode layer.
在本文的实施方案中,第一电极层和第二电极层中任一者可为阳极,另一者为阴极,并可采用常规用于制造电极层的材料制备,例如ITO(氧化铟锡)或Ag或Al。In the embodiments herein, either one of the first electrode layer and the second electrode layer can be an anode, and the other can be a cathode, and can be prepared using materials conventionally used to manufacture electrode layers, such as ITO (Indium Tin Oxide) or Ag or Al.
有机功能层通常包括空穴传输层、发光层和电子传输层,其均可采用现有技术中常用于制造这些层的材料制备。作为空穴传输层的材料,可使用例如芳胺类材料低分子材料等,例如N,N’-二-(1-萘基)-N,N’-二苯基-1,1’-联苯基-4,4’-二胺(NPB);作为电子传输层的材料,可使用例如金属有机配合物、芳香稠环类或邻菲咯啉类等,例如三(8-羟基喹啉)铝(Alq3)。发光层可由本领域中常用于发光层的材料组成,例如可由发光层主体材料和发光层染料组成。发光层主体材料可采用本领域中常规用于此目的的材料,例如小分子材料如金属有机配合物、咔唑衍生物、蒽衍生物等,例如9,10-二(萘-2-基)蒽(ADN)。发光层染料可采用本领域中常规用于此目的的材料,例如含有原子序数大于36小于84的至少一种原子的化合物或苝衍生物,如2,5,8,11-四叔丁基苝(TBPe)。发光层主体材料和发光层染料的比例可使用其在本领域中的常规比例。The organic functional layer generally includes a hole transport layer, a light-emitting layer and an electron transport layer, all of which can be prepared using materials commonly used in the prior art to manufacture these layers. As the material of the hole transport layer, for example, aromatic amine materials, low molecular materials, etc., such as N,N'-di-(1-naphthyl)-N,N'-diphenyl-1,1'-bi Phenyl-4,4'-diamine (NPB); as the material of the electron transport layer, for example, metal-organic complexes, aromatic condensed rings or o-phenanthrolines, etc., such as tris(8-hydroxyquinoline) can be used Aluminum (Alq 3 ). The light-emitting layer can be composed of materials commonly used in light-emitting layers in the art, for example, it can be composed of a light-emitting layer host material and a light-emitting layer dye. The host material of the light-emitting layer can be a material conventionally used for this purpose in the art, such as small molecule materials such as metal-organic complexes, carbazole derivatives, anthracene derivatives, etc., such as 9,10-di(naphthalene-2-yl) Anthracene (ADN). The light-emitting layer dye can be a material conventionally used for this purpose in the art, for example, a compound or a perylene derivative containing at least one atom with an atomic number greater than 36 and less than 84, such as 2,5,8,11-tetra-tert-butylperylene (TBPe). The ratio of the host material of the light-emitting layer and the dye of the light-emitting layer can use its conventional ratio in the art.
另外,所述有机功能层还可进一步包括空穴注入层和/或电子注入层,空穴注入层和电子注入层均可采用现有技术中常用于空穴注入层或电子注入层的材料。空穴注入层材料可为例如m-MTDATA,电子注入层材料可为例如LiF。In addition, the organic functional layer may further include a hole injection layer and/or an electron injection layer, and both the hole injection layer and the electron injection layer may use materials commonly used in the prior art for the hole injection layer or the electron injection layer. The material of the hole injection layer can be, for example, m-MTDATA, and the material of the electron injection layer can be, for example, LiF.
上述各层的厚度均可采用其在OLED中的常规厚度。The thicknesses of the above-mentioned layers can adopt their conventional thicknesses in OLEDs.
图5示出本发明一种OLED结构的剖面图。其中,10为基板;20为第一电极层;30为低折射率栅格层;40为有机功能层,可包括空穴传输层、发光层、电子传输层、电子注入层;50为第二电极层。Fig. 5 shows a cross-sectional view of an OLED structure of the present invention. Wherein, 10 is a substrate; 20 is a first electrode layer; 30 is a low refractive index grid layer; 40 is an organic functional layer, which may include a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer; 50 is a second electrode layer. electrode layer.
图6示出本发明另一种器件结构的剖面图。其中,10为基板;30为栅格层;20为第一电极层;40为有机功能层,可包括空穴传输层、发光层、电子传输层、电子注入层;50为第二电极层。Fig. 6 shows a cross-sectional view of another device structure of the present invention. Wherein, 10 is a substrate; 30 is a grid layer; 20 is a first electrode layer; 40 is an organic functional layer, which may include a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer; 50 is a second electrode layer.
本发明的有机发光显示器件的制备包括在基板上形成所述低折射率栅格层,然后依次沉积彼此层叠的第一电极层、有机功能层和第二电极层;或者在基板上沉积第一电极层,在第一电极层上形成低折射率栅格层,然后依次沉积彼此层叠的有机功能层和第二电极层;然后封装。The preparation of the organic light-emitting display device of the present invention includes forming the low-refractive-index grid layer on the substrate, and then sequentially depositing the first electrode layer, the organic functional layer and the second electrode layer stacked on each other; or depositing the first electrode layer on the substrate. An electrode layer, forming a low-refractive index grid layer on the first electrode layer, and then sequentially depositing an organic functional layer and a second electrode layer stacked on each other; and then encapsulating.
所述栅格层可例如由光刻法制备,或由其他任何本领域技术人员已知的适合方法制备。当所述栅格层由光刻法制备时,其制备过程主要包括:在基板上或第一电极层上涂布具有所述折射率的光刻胶;烘干;使用具有所需图案的掩模进行曝光;以及显影。The grid layer can be prepared, for example, by photolithography, or by any other suitable method known to those skilled in the art. When the grid layer is prepared by photolithography, the preparation process mainly includes: coating a photoresist with the refractive index on the substrate or on the first electrode layer; drying; using a mask with a desired pattern exposing the mold; and developing.
所述沉积可采用本领域技术人员已知的可将本发明方法所需物质覆盖在整个目标表面上的任意合适方法,例如真空蒸镀法。封装可采用本领域技术人员已知的任意合适方法。The deposition can be any suitable method known to those skilled in the art that can cover the entire target surface with the substances required by the method of the present invention, such as vacuum evaporation. Encapsulation may be by any suitable method known to those skilled in the art.
以下通过实施例对本发明进行进一步说明。其中亮度用硅光二极管测量。各实施例中,所形成的低折射率栅格层的折射率与用于形成其的材料的折射率相同。The present invention will be further described by the following examples. The brightness is measured with a silicon photodiode. In various embodiments, the low index grid layer is formed to have the same refractive index as the material used to form it.
对比例1Comparative example 1
以ITO导电玻璃为基板,刻蚀出ITO第一电极图形,其中ITO厚度为200nm,通过光刻法制备厚度为1-3μm的绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。将该ITO导电玻璃基板放入蒸镀腔室中,蒸镀过程中腔室压强低于5.0×10-3Pa。首先蒸镀40nm厚N,N’-二-(1-萘基)-N,N’-二苯基-1,1’-联苯-4,4’-二胺(NPB)作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的9,10-二(萘-2-基)蒽(ADN)和2,5,8,11-四叔丁基苝(TBPe)作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的三(8-羟基喹啉)铝(Alq3)作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using ITO conductive glass as the substrate, etch the ITO first electrode pattern, in which the thickness of ITO is 200nm, and prepare the insulating layer and isolation column layer with a thickness of 1-3μm by photolithography, so that the pixel size is 0.28mm×0.28mm. The ITO conductive glass substrate is put into an evaporation chamber, and the chamber pressure is lower than 5.0×10 -3 Pa during the evaporation process. First, 40nm thick N,N'-bis-(1-naphthyl)-N,N'-diphenyl-1,1'-biphenyl-4,4'-diamine (NPB) was evaporated as hole transport Layer; 30nm thick 9,10-bis(naphthalene-2-yl)anthracene (ADN) and 2,5,8,11-tetra-tert-butylperylene (TBPe) were evaporated as the light-emitting layer by double-source co-evaporation , the ratio of TBPe in ADN was controlled by rate to be 7%; 20nm tris(8-hydroxyquinoline)aluminum (Alq 3 ) was vapor-deposited as electron transport layer; 0.5nm LiF was vapor-deposited as electron injection layer and 150nm Al as the second electrode layer.
图1为对比例1器件结构的剖面图。其中,10为基板;20为第一电极层ITO;40为有机功能层,包括空穴传输层、发光层、电子传输层、电子注入层;50为第二电极层。FIG. 1 is a cross-sectional view of the device structure of Comparative Example 1. Among them, 10 is the substrate; 20 is the first electrode layer ITO; 40 is the organic functional layer, including the hole transport layer, light emitting layer, electron transport layer, electron injection layer; 50 is the second electrode layer.
图2为对比例1的发光像素图形图。FIG. 2 is a graphic diagram of light-emitting pixels in Comparative Example 1. FIG.
实施例1:Example 1:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在ITO图形上旋涂一层透明光刻胶(触控面板用感光性绝缘及保护层光阻剂EOC130,透光率大于80%,折射率为1.5)。烘干后,选用连续的反正方形网格图形的掩模以150mj/cm2的曝光量曝光;用上述光阻剂的生产商同时提供的显影液显影100秒后得到特定图形(正方形网格,d1如上文所定义且为1μm,d2如上文所定义且为8μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: Spin-coat a layer of transparent photoresist on the ITO pattern (photosensitive insulation and protective layer photoresist EOC130 for touch panels, light transmittance greater than 80%, and refractive index 1.5). After drying, select the mask of continuous inverse square grid pattern to expose with the exposure amount of 150mj/cm 2 ; Obtain specific figure (square grid, square grid, d1 is as defined above and is 1 μm, d2 is as defined above and is 8 μm) grid layer. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
图3为实施例1的栅格层图案;Fig. 3 is the grid layer pattern of embodiment 1;
图4为实施例1的像素区域中显示出的栅格图案;Fig. 4 is the grid pattern shown in the pixel area of embodiment 1;
实施例2:Example 2:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在ITO图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为0.05μm,d2为1μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: spin-coat a layer of transparent photoresist on the ITO pattern (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5). After drying, select the mask of anti-square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 0.05 μm, d2 is a grid layer of 1 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例3:Example 3:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在ITO图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,但d1为1μm,d2为4μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10- 3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: spin-coat a layer of transparent photoresist on the ITO pattern (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5). After drying, select the mask of anti-square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific figure (similar square grid with embodiment 1, but d1 is 1 μm, d2 is a grid layer of 4 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 - 3 Pa. First, 40nm-thick NPB was evaporated as the hole transport layer; 30nm-thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例4:Example 4:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在ITO图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为1μm,d2为2μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10- 3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: spin-coat a layer of transparent photoresist on the ITO pattern (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5). After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 1 μ m after developing with the method identical with embodiment 1) , d2 is the grid layer of 2μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 - 3 Pa. First, 40nm-thick NPB was evaporated as the hole transport layer; 30nm-thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例5:Example 5:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在ITO图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为8μm,d2为25μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10- 3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: spin-coat a layer of transparent photoresist on the ITO pattern (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5). After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific figure (similar square grid with embodiment 1, d1 is 8 μm after developing with the method identical with embodiment 1) , d2 is the grid layer of 25 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 - 3 Pa. First, 40nm-thick NPB was evaporated as the hole transport layer; 30nm-thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例6:Embodiment 6:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在基板衬底上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为1μm,d2为4μm)的栅格层。在栅格层之上,采用直流磁控溅射法制备150nm的ITO第一电极层,ITO靶材为铟锡合金,其成份比例In∶Sn=90%∶10%。制备过程中氧分压为0.4Sccm,氩分压为20Sccm。制备出ITO层后,采用刻蚀方法刻蚀出ITO阳极。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive index grid layer is as follows: a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) is spin-coated on the substrate. After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 1 μ m after developing with the method identical with embodiment 1) , d2 is a grid layer of 4 μm). On the grid layer, a 150nm ITO first electrode layer was prepared by DC magnetron sputtering. The ITO target material was indium tin alloy, and its composition ratio In:Sn=90%:10%. During the preparation process, the oxygen partial pressure was 0.4 Sccm, and the argon partial pressure was 20 Sccm. After the ITO layer is prepared, the ITO anode is etched by an etching method. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode.
实施例7:Embodiment 7:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在ITO图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形嵌套状的图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(在每个像素区域内一系列以同心的形式层层嵌套的多个正方形的网格,其中每个像素区域内的最大正方形与像素区域大小相同,d1为1μm,d2为4μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: spin-coat a layer of transparent photoresist on the ITO pattern (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5). After drying, select the mask of anti-square nested pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern after developing with the method identical with embodiment 1 (in each pixel region, a series of concentric A grid of multiple squares nested layer by layer, where the largest square in each pixel area is the same size as the pixel area, d1 is 1 μm, and d2 is 4 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
图7为实施例7的像素区域的正方形嵌套状的栅格图案。FIG. 7 is a square nested grid pattern in the pixel area of Embodiment 7. FIG.
实施例8:Embodiment 8:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在基板衬底上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形嵌套状图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例7类似的图形,d1为1μm,d2为4μm)的栅格层。在栅格层之上,采用直流磁控溅射法制备150nm的ITO第一电极层,ITO靶材为铟锡合金,其成份比例In∶Sn=90%∶10%。制备过程中氧分压为0.4Sccm,氩分压为20Sccm。制备出ITO第一电极层后,采用刻蚀方法刻蚀出ITO第一电极。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive index grid layer is as follows: a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) is spin-coated on the substrate. After drying, select the mask of inverse square nested pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar pattern with embodiment 7, d1 is 1 μm, d2 is the grid layer of 4 μm). On the grid layer, a 150nm ITO first electrode layer was prepared by DC magnetron sputtering. The ITO target material was indium tin alloy, and its composition ratio In:Sn=90%:10%. During the preparation process, the oxygen partial pressure was 0.4 Sccm, and the argon partial pressure was 20 Sccm. After the ITO first electrode layer is prepared, the ITO first electrode is etched out by an etching method. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例9:Embodiment 9:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在基板衬底上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反六边形嵌套状图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(在每个像素区域内一系列以同心的形式层层嵌套的多个六边形的网格,其中每个像素区域内最大六边形的两条平行边的间距等于像素区域边长,d1为1μm,d2为4μm)的栅格层。在栅格层之上,采用直流磁控溅射法制备150nm的ITO第一电极层,ITO靶材为铟锡合金,其成份比例In∶Sn=90%∶10%。制备过程中氧分压为0.4Sccm,氩分压为20Sccm。制备出ITO第一电极层后,采用刻蚀方法刻蚀出ITO第一电极。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive index grid layer is as follows: a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) is spin-coated on the substrate. After drying, select the mask of anti-hexagonal nested pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern after developing with the method identical with embodiment 1 (in each pixel region, a series of concentric In the form of multiple hexagonal grids nested layer by layer, the distance between the two parallel sides of the largest hexagon in each pixel area is equal to the side length of the pixel area, d1 is 1 μm, and d2 is 4 μm) grid layer. On the grid layer, a 150nm ITO first electrode layer was prepared by DC magnetron sputtering. The ITO target material was indium tin alloy, and its composition ratio In:Sn=90%:10%. During the preparation process, the oxygen partial pressure was 0.4 Sccm, and the argon partial pressure was 20 Sccm. After the ITO first electrode layer is prepared, the ITO first electrode is etched out by an etching method. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
图8为实施例9的像素区域的六边形嵌套状的栅格图案。FIG. 8 is a hexagonal nested grid pattern in the pixel area of Embodiment 9. FIG.
实施例10:Example 10:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在基板衬底上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反圆形嵌套状图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(在每个像素区域内一系列以同心的形式层层嵌套的多个圆形的网格,其中每个像素区域内的最大圆内切于像素区域,d1为1μm,d2为4μm)的栅格层。在栅格层之上,采用直流磁控溅射法制备150nm的ITO第一电极层,ITO靶材为铟锡合金,其成份比例In∶Sn=90%∶10%。制备过程中氧分压为0.4Sccm,氩分压为20Sccm。制备出ITO第一电极层后,采用刻蚀方法刻蚀出ITO第一电极。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10- 3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive index grid layer is as follows: a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) is spin-coated on the substrate. After drying, select the mask of anti-circular nested pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern after developing with the method identical with embodiment 1 (in each pixel region, a series of concentric The form is a grid of multiple circles nested layer by layer, where the largest circle in each pixel area is inscribed in the pixel area, d1 is 1 μm, and d2 is 4 μm). On the grid layer, a 150nm ITO first electrode layer was prepared by DC magnetron sputtering. The ITO target material was indium tin alloy, and its composition ratio In:Sn=90%:10%. During the preparation process, the oxygen partial pressure was 0.4 Sccm, and the argon partial pressure was 20 Sccm. After the ITO first electrode layer is prepared, the ITO first electrode is etched out by an etching method. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 - 3 Pa. First, 40nm-thick NPB was evaporated as the hole transport layer; 30nm-thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
图9为实施例10的像素区域的圆形嵌套状的栅格图案。FIG. 9 is a circular nested grid pattern in the pixel area of the tenth embodiment.
实施例11:Example 11:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在ITO图形上旋涂一层透明光刻胶(透光率大于80%,折射率为1.3)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为1μm,d2为4μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid layer is as follows: spin-coat a layer of transparent photoresist (transmittance greater than 80%, refractive index 1.3) on the ITO pattern. After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 1 μ m after developing with the method identical with embodiment 1) , d2 is a grid layer of 4 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例12:Example 12:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在基板衬底上旋涂一层透明光刻胶(透光率大于80%,折射率为1.3)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为1μm,d2为4μm)的栅格层。在栅格层之上,采用直流磁控溅射法制备150nm的ITO第一电极层,ITO靶材为铟锡合金,其成份比例In∶Sn=90%∶10%。制备过程中氧分压为0.4Sccm,氩分压为20Sccm。制备出ITO第一电极层后,采用刻蚀方法刻蚀出ITO第一电极。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid layer is as follows: a layer of transparent photoresist (transmittance greater than 80% and refractive index 1.3) is spin-coated on the substrate. After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 1 μ m after developing with the method identical with embodiment 1) , d2 is a grid layer of 4 μm). On the grid layer, a 150nm ITO first electrode layer was prepared by DC magnetron sputtering. The ITO target material was indium tin alloy, and its composition ratio In:Sn=90%:10%. During the preparation process, the oxygen partial pressure was 0.4 Sccm, and the argon partial pressure was 20 Sccm. After the ITO first electrode layer is prepared, the ITO first electrode is etched out by an etching method. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例13:Example 13:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在ITO图形上旋涂一层透明光刻胶(透光率大于80%,折射率为1.7)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为1μm,d2为4μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid layer is as follows: spin-coat a layer of transparent photoresist (transmittance greater than 80%, refractive index 1.7) on the ITO pattern. After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 1 μ m after developing with the method identical with embodiment 1) , d2 is a grid layer of 4 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
实施例14:Example 14:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在ITO图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用连续的反正六边形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(正六边形网格,d1为1μm,d2为5μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层,蒸镀过程中腔室压强低于5.0×10-3Pa。本实施例中,有机层首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid layer is as follows: spin-coat a layer of transparent photoresist on the ITO pattern (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5). After drying, select the mask of continuous inverse hexagonal grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific figure (regular hexagonal grid, d1 is 1 μ m) after developing with the method identical with embodiment 1 , d2 is a grid layer of 5 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially, and the pressure of the chamber during the evaporation process is lower than 5.0×10 -3 Pa. In this embodiment, the organic layer is first vapor-deposited with a thickness of 40 nm NPB as the hole transport layer; ADN and TBPe with a thickness of 30 nm are vapor-deposited as the light-emitting layer by a double-source co-evaporation method, and the ratio of TBPe in ADN is controlled to be 7% through the rate. ; Evaporation of 20nm of Alq 3 as the electron transport layer; evaporation of 0.5nm of LiF as the electron injection layer and 150nm of Al as the second electrode layer.
图10为实施例14的单个像素区域内的六边形网格图案。FIG. 10 is a hexagonal grid pattern in a single pixel area of Embodiment 14. FIG.
图11为实施例14的像素区域的六边形栅格图案。FIG. 11 is a hexagonal grid pattern of the pixel area of the fourteenth embodiment.
实施例15:Example 15:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在基板衬底上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正六边形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例14类似的正六边形网格,d1为1μm,d2为5μm)的栅格层。在栅格层之上,采用直流磁控溅射法制备150nm的ITO第一电极层,ITO靶材为铟锡合金,其成份比例In∶Sn=90%∶10%。制备过程中氧分压为0.4Sccm,氩分压为20Sccm。制备出ITO层后,采用刻蚀方法刻蚀出ITO第一电极。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10- 3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的LiF作为电子注入层和150nm的Al作为第二电极层。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive index grid layer is as follows: a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) is spin-coated on the substrate. After drying, select the mask of the reverse hexagonal grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific figure (regular hexagonal grid similar to embodiment 14) after developing with the method identical with embodiment 1 , d1 is 1 μm, d2 is 5 μm) grid layer. On the grid layer, a 150nm ITO first electrode layer was prepared by DC magnetron sputtering. The ITO target material was indium tin alloy, and its composition ratio In:Sn=90%:10%. During the preparation process, the oxygen partial pressure was 0.4 Sccm, and the argon partial pressure was 20 Sccm. After the ITO layer is prepared, the ITO first electrode is etched out by an etching method. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 - 3 Pa. First, 40nm-thick NPB was evaporated as the hole transport layer; 30nm-thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is evaporated as electron transport layer; 0.5nm LiF is evaporated as electron injection layer and 150nm Al is evaporated as second electrode layer.
对比例2:Comparative example 2:
以透明玻璃为基板,在其上采用溅射或蒸镀方法制作一层100nm的银作为第一电极。刻蚀银第一电极图形后,在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的Li作为电子注入层,后采用溅射方法制作150nm的ITO作为第二电极层。The transparent glass is used as the substrate, and a layer of 100 nm silver is fabricated on it by sputtering or vapor deposition as the first electrode. After the silver first electrode pattern was etched, an insulating layer and spacer column layer were prepared on it in the same manner as in Comparative Example 1, so that the pixel size was 0.28mm×0.28mm. Putting it into an evaporation chamber to evaporate a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, and a second electrode layer in sequence. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is vapor-deposited as the electron transport layer; 0.5nm Li is vapor-deposited as the electron injection layer, and 150nm ITO is made by sputtering method as the second electrode layer.
实施例16:Example 16:
以透明玻璃为基板,采用溅射或蒸镀方法制作一层100nm的银作为第一电极。刻蚀银第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在银图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正六边形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例14类似的正六边形网格,d1为1μm,d2为5μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的Li作为电子注入层,后采用溅射方法制作150nm的ITO作为第二电极层。Using transparent glass as a substrate, a layer of 100nm silver is fabricated by sputtering or vapor deposition as the first electrode. After etching the pattern of the silver first electrode, prepare a layer of low-refractive-index grid layer on it with a thickness of about 2 μm. The preparation process of the low-refractive-index grid layer is as follows: spin-coat a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) on the silver pattern. After drying, select the mask of the reverse hexagonal grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific figure (regular hexagonal grid similar to embodiment 14) after developing with the method identical with embodiment 1 , d1 is 1 μm, d2 is 5 μm) grid layer. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm-thick NPB was evaporated as the hole transport layer; 30nm-thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is vapor-deposited as the electron transport layer; 0.5nm Li is vapor-deposited as the electron injection layer, and 150nm ITO is made by sputtering method as the second electrode layer.
实施例17:Example 17:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在基板上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正六边形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例14类似的正六边形网格,d1为1μm,d2为5μm)的栅格层。后采用溅射或蒸镀方法制作一层100nm的银作为第一电极。刻蚀银第一电极图形后。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa。本实施例中,有机层首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的Li作为电子注入层,后采用溅射方法制作150nm的ITO作为第二电极层。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: spin-coat a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) on the substrate. After drying, select the mask of the reverse hexagonal grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific figure (regular hexagonal grid similar to embodiment 14) after developing with the method identical with embodiment 1 , d1 is 1 μm, d2 is 5 μm) grid layer. Afterwards, a layer of 100 nm silver is fabricated as the first electrode by sputtering or vapor deposition. After etching the silver first electrode pattern. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Putting it into an evaporation chamber to evaporate a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, and a second electrode layer in sequence. The chamber pressure is lower than 5.0×10 -3 Pa during the evaporation process. In this embodiment, the organic layer is first vapor-deposited with a thickness of 40 nm NPB as the hole transport layer; ADN and TBPe with a thickness of 30 nm are vapor-deposited as the light-emitting layer by a double-source co-evaporation method, and the ratio of TBPe in ADN is controlled to be 7% through the rate. ; Evaporate 20nm of Alq 3 as the electron transport layer; evaporate 0.5nm of Li as the electron injection layer, and then use the sputtering method to make 150nm of ITO as the second electrode layer.
对比例3:Comparative example 3:
以与对比例1相同的ITO导电玻璃作为基板,刻蚀出ITO第一电极后,在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的Li作为电子注入层,后采用溅射方法制作150nm的ITO作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode, an insulating layer and spacer layer were prepared on it in the same manner as in Comparative Example 1, so that the pixel size was 0.28mm×0.28mm. Putting it into an evaporation chamber to evaporate a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, and a second electrode layer in sequence. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is vapor-deposited as the electron transport layer; 0.5nm Li is vapor-deposited as the electron injection layer, and 150nm ITO is made by sputtering method as the second electrode layer.
实施例18:Example 18:
以与对比例1相同的ITO导电玻璃为基板,刻蚀出ITO第一电极图形后,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格制备过程如下:在ITO图形上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为1μm,d2为4μm)的栅格层。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10- 3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的Li作为电子注入层,后采用溅射方法制作150nm的ITO作为第二电极层。Using the same ITO conductive glass as in Comparative Example 1 as the substrate, after etching the ITO first electrode pattern, a low refractive index grid layer was prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive-index grid is as follows: spin-coat a layer of transparent photoresist on the ITO pattern (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5). After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 1 μ m after developing with the method identical with embodiment 1) , d2 is a grid layer of 4 μm). An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 - 3 Pa. First, 40nm-thick NPB was evaporated as the hole transport layer; 30nm-thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is vapor-deposited as the electron transport layer; 0.5nm Li is vapor-deposited as the electron injection layer, and 150nm ITO is made by sputtering method as the second electrode layer.
实施例19:Example 19:
以透明玻璃为基板,在其上制备一层低折射率栅格层,厚约2μm。低折射率栅格层制备过程如下:在基板衬底上旋涂一层透明光刻胶(与实施例1相同的光刻胶,透光率大于80%,折射率为1.5)。烘干后,选用反正方形网格图形的掩模以150mj/cm2的曝光量曝光;以与实施例1相同的方法显影后得到特定图形(与实施例1类似的正方形网格,d1为1μm,d2为4μm)的栅格层。在栅格层之上,采用直流磁控溅射法制备150nm的ITO第一电极层,ITO靶材为铟锡合金,其成份比例In∶Sn=90%∶10%。制备过程中氧分压为0.4Sccm,氩分压为20Sccm。制备出ITO层后,采用刻蚀方法刻蚀出ITO第一电极。在其上与对比例1相同地制备绝缘层与隔离柱层,使得像素大小为0.28mm×0.28mm。后放入蒸镀腔室中依次蒸镀空穴传输层、发光层、电子传输层、电子注入层、第二电极层。蒸镀过程中腔室压强低于5.0×10-3Pa,首先蒸镀40nm厚NPB作为空穴传输层;以双源共蒸的方法蒸镀30nm厚的ADN和TBPe作为发光层,通过速率控制TBPe在ADN中的比例为7%;蒸镀20nm的Alq3作为电子传输层;蒸镀0.5nm的Li作为电子注入层,后采用溅射方法制作150nm的ITO作为第二电极层。A transparent glass is used as a substrate, and a low-refractive-index grid layer is prepared on it, with a thickness of about 2 μm. The preparation process of the low-refractive index grid layer is as follows: a layer of transparent photoresist (the same photoresist as in Example 1, with a light transmittance greater than 80% and a refractive index of 1.5) is spin-coated on the substrate. After drying, select the mask of inverse square grid pattern to expose with the exposure of 150mj/cm 2 ; Obtain specific pattern (similar square grid with embodiment 1, d1 is 1 μ m after developing with the method identical with embodiment 1) , d2 is a grid layer of 4 μm). On the grid layer, a 150nm ITO first electrode layer was prepared by DC magnetron sputtering. The ITO target material was indium tin alloy, and its composition ratio In:Sn=90%:10%. During the preparation process, the oxygen partial pressure was 0.4 Sccm, and the argon partial pressure was 20 Sccm. After the ITO layer is prepared, the ITO first electrode is etched out by an etching method. An insulating layer and a spacer layer were prepared thereon in the same manner as in Comparative Example 1, so that the pixel size was 0.28 mm×0.28 mm. Then put it into the evaporation chamber to evaporate the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the second electrode layer sequentially. During the evaporation process, the chamber pressure was lower than 5.0×10 -3 Pa. First, 40nm thick NPB was evaporated as the hole transport layer; 30nm thick ADN and TBPe were evaporated as the light-emitting layer by dual-source co-evaporation method. The proportion of TBPe in ADN is 7%; 20nm Alq 3 is vapor-deposited as the electron transport layer; 0.5nm Li is vapor-deposited as the electron injection layer, and 150nm ITO is made by sputtering method as the second electrode layer.
表1Table 1
注:对比例3、实施例18、实施例19的透明器件亮度为器件基板面的发光亮度。Note: The luminance of the transparent device of Comparative Example 3, Example 18, and Example 19 is the luminance of the substrate surface of the device.
由以上数据可以看出,通过加入本发明的低折射率栅格层,器件亮度比无栅格层的器件有明显提高,表明低折射率栅格层的使用确实增加了原本被限制在器件内的光的输出。其中栅格层置于基板上的OLED比栅格层置于第一电极层上的OLED的亮度更高。而且栅格层折射率较低时,器件亮度更高,表明采用更低折射率的栅格,可使更多的被限制在器件内的光被输出到达空气中。另外,以上实施例还显示出,栅格图案的d1和d2对器件的亮度也有明显的影响。As can be seen from the above data, by adding the low-refractive index grid layer of the present invention, the brightness of the device is significantly improved compared with the device without the grid layer, indicating that the use of the low-refractive index grid layer has indeed increased the brightness originally limited in the device. of light output. The OLED in which the grid layer is placed on the substrate has higher brightness than the OLED in which the grid layer is placed on the first electrode layer. Moreover, when the refractive index of the grid layer is lower, the brightness of the device is higher, which indicates that more light confined in the device can be output to the air by using a grid with a lower refractive index. In addition, the above embodiments also show that d1 and d2 of the grid pattern also have a significant impact on the brightness of the device.
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