CN103116235B - Image element array substrates and display panel - Google Patents
Image element array substrates and display panel Download PDFInfo
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- CN103116235B CN103116235B CN201310076241.XA CN201310076241A CN103116235B CN 103116235 B CN103116235 B CN 103116235B CN 201310076241 A CN201310076241 A CN 201310076241A CN 103116235 B CN103116235 B CN 103116235B
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Abstract
A kind of image element array substrates, comprises the first substrate, multiple dot structure, the first shared electrode and the second shared electrode.Dot structure is configured in the first substrate.The pixel electrode that each dot structure comprises driving component and is electrically connected with driving component.First shared electrode and pixel electrode part overlap.The first distance is there is between first shared electrode and pixel electrode.Second shared electrode and the first shared electrode are electrically connected.Second shared electrode and pixel electrode and the first shared electrode part overlap.Second distance is there is between second shared electrode and pixel electrode.First distance is greater than second distance.In addition, a kind of display panel comprising above-mentioned image element array substrates is also suggested.
Description
Technical field
The invention relates to a kind of image element array substrates and display panel, and relate to a kind of image element array substrates and the display panel that comprise multiple shared electrode especially.
Background technology
Flourish along with display technique, display panel has been applied to the display device of various sizes, as TV, computer screen, mobile computer, intelligent mobile phone etc.For intelligent mobile phone, because existing intelligent mobile phone emphasizes that it browses the function of webpage and viewing audio/video media more, the resolution of the display panel of intelligent mobile phone just seems especially important.
In known technology, the processing procedure of multiple tracks light shield can be utilized to realize high-resolution display panel.In above-mentioned processing procedure, shared electrode is arranged at above data line.Utilize the metallic shield effect of shared electrode, the electrical interference between data line and pixel electrode can reduce.Under this design, for avoiding the generation of leakage problem, the light-shielding pattern of subtend substrate need suitably cover shared electrode and pixel electrode, is having high transmission rate to make display panel concurrently without under leakage problem.But, in known design, when deviser is for changing the storage capacitors of display panel through the overlapping area of adjustment shared electrode and pixel electrode, during to improve cross-talk or flicker problem, the area of light-shielding pattern may increase thereupon, and then the transmittance of display panel is declined.
Summary of the invention
In view of this, the invention provides a kind of image element array substrates, adopt the display panel of this image element array substrates to have high display quality.
In addition, the invention provides a kind of display panel, it has high display quality.
The invention provides a kind of image element array substrates, this image element array substrates comprises the first substrate, multiple dot structure, the first shared electrode and the second shared electrode.Dot structure is configured in the first substrate.The pixel electrode that each dot structure comprises driving component and is electrically connected with driving component.First shared electrode and pixel electrode part overlap.The first distance is there is between first shared electrode and pixel electrode.Second shared electrode and the first shared electrode are electrically connected.Second shared electrode and pixel electrode and the first shared electrode part overlap.Second distance is there is between second shared electrode and pixel electrode.First distance is greater than second distance.
The invention provides a kind of display panel, this display panel comprises above-mentioned image element array substrates, subtend substrate and display medium.Subtend substrate configures relative to image element array substrates.Display medium is configured between image element array substrates and subtend substrate.
In one embodiment of this invention, above-mentioned image element array substrates also comprises a plurality of data lines and multi-strip scanning line.Data line is configured in the first substrate and with multiple source electrodes of driving component and is electrically connected.Sweep trace is configured in the first substrate and with multiple grids of driving component and is electrically connected.Sweep trace and data line interconnected.
In one embodiment of this invention, the first above-mentioned shared electrode and sweep trace belong to same rete.
In one embodiment of this invention, rete belonging to above-mentioned data line to be configured at belonging to rete belonging to the first shared electrode and the second shared electrode between rete.
In one embodiment of this invention, the first above-mentioned shared electrode has multiple first connecting portion parallel to each other and multiple first branch that is parallel to each other and that be connected with the first connecting portion.Second shared electrode has multiple second connecting portion parallel to each other and multiple second branch that is parallel to each other and that be connected with the second connecting portion.The bearing of trend of the first connecting portion and the second connecting portion and the bearing of trend of sweep trace substantial parallel.First connecting portion and the second connecting portion overlap.The bearing of trend of the first branch and the second branch and the bearing of trend of data line substantial parallel.First branch and the second branch cover multiple first edges of pixel electrode.First edge and data line substantial parallel.
In one embodiment of this invention, the area that the first above-mentioned branch and pixel electrode overlap is greater than the area that the second branch and pixel electrode overlap.
In one embodiment of this invention, the first above-mentioned substrate has the surrounding zone outside viewing area and viewing area.Dot structure is configured at viewing area.Image element array substrates also comprises the first conductive pattern and the second conductive pattern.First conductive pattern and sweep trace belong to same rete and are configured at surrounding zone.Second conductive pattern and pixel electrode belong to same rete and are configured at surrounding zone.First shared electrode and the second shared electrode are electrically connected through the first conductive pattern and the second conductive pattern.
In one embodiment of this invention, above-mentioned image element array substrates also comprises the first dielectric layer, the second dielectric layer and the 3rd dielectric layer.First dielectric layer to be configured at belonging to rete belonging to sweep trace and data line between rete.First dielectric layer has and is configured at surrounding zone and the first opening exposing the first shared electrode.First conductive pattern is inserted the first opening and contacts with the first shared electrode.Second dielectric layer to be configured at belonging to rete belonging to data line and the second shared electrode between rete.Second dielectric layer has and is configured at surrounding zone and the second opening exposing the first conductive pattern.3rd dielectric layer to be configured at belonging to rete belonging to pixel electrode and the second shared electrode between rete.3rd dielectric layer has the 3rd opening exposing the second opening and the first conductive pattern and the 4th opening exposing the second shared electrode pattern.Second conductive pattern is inserted the second opening and the 3rd opening and is contacted with the first conductive pattern.Second conductive pattern is inserted the 4th opening and is contacted with the second shared electrode.
In one embodiment of this invention, above-mentioned subtend substrate comprises the second substrate, light-shielding pattern and counter electrode.Light-shielding pattern is configured in the second substrate.Counter electrode is configured in light-shielding pattern and the second substrate.Light-shielding pattern covers the first edge of pixel electrode.Light-shielding pattern comprehensive covering first branch, the second branch and data line.Counter electrode and the first shared electrode, the second shared electrode are electrically connected.
Based on above-mentioned, in the image element array substrates and display panel of one embodiment of the invention, through from the design of pixel electrode apart from different multiple shared electrode, the display panel of one embodiment of the invention can maintain the cross-talk (crosstalk) or flicker (flicker) problem that to improve under high transmission rate (transmittance) and to cause because of the non-optimization of storage capacitors value.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate institute's accompanying drawings to be described in detail below.
Accompanying drawing explanation
Fig. 1 is the diagrammatic cross-section of the display panel of one embodiment of the invention.
Fig. 2 is the upper schematic diagram of the image element array substrates of Fig. 1.
Fig. 3 is the sectional view that the line segment B-B ' of corresponding diagram 2 illustrates.
[primary clustering symbol description]
100: display panel
110: image element array substrates
112: the first substrates
112a: viewing area
112b: surrounding zone
113: the first conductive patterns
114: dot structure
115: the second conductive patterns
116: the first shared electrode
116a: the first connecting portion
116b: the first branch
117a: the first dielectric layer
117b: the second dielectric layer
117c: the three dielectric layer
118: the second shared electrode
118a: the second connecting portion
118b: the second branch
120: subtend substrate
122: the second substrates
124: light-shielding pattern
126: counter electrode
130: display medium
CH: channel layer
D: drain electrode
D1: the first distance
D2: second distance
DL: sweep trace
E1: the first edge
E2: the second edge
G: grid
H: contact hole
H1: the first opening
H2: the second opening
H3: the three opening
H4: the four opening
PE: pixel electrode
S: source electrode
SL: data line
T: driving component
Embodiment
Fig. 1 is the diagrammatic cross-section of the display panel of one embodiment of the invention.Please refer to Fig. 1, the display panel 100 of the present embodiment comprises image element array substrates 110, subtend substrate 120 and display medium 130.Subtend substrate 120 configures relative to image element array substrates 110.Display medium 130 is between image element array substrates 110 and subtend substrate 120.In the present embodiment, display medium 130 is such as liquid crystal (Liquid Crystal), but the present invention is not limited thereto, and in other embodiments, display medium 130 also can be organic luminous layer, electrophoresis liquid or other suitable material.
Fig. 2 is the upper schematic diagram of the image element array substrates of Fig. 1.Particularly, Fig. 1 is the line segment A-A ' of corresponding diagram 2.Please refer to Fig. 1 and Fig. 2, the image element array substrates 110 of the present embodiment comprises the first substrate 112, be configured at multiple dot structures 114, first shared electrode 116 in the first substrate 112 and the second shared electrode 118.First substrate 112 has the surrounding zone 112b outside viewing area 112a and viewing area 112a.Dot structure 114 is configured in the 112a of viewing area.First substrate 112 is mainly used for the assembly carried on it, and the material of the first substrate 112 can be glass, quartz, organic polymer or other material applicatory.
As shown in Figure 2, each dot structure 114 pixel electrode PE of comprising driving component T and being electrically connected with driving component T.In detail, the driving component T of the present embodiment has source S, drain D, grid G and channel layer CH.The drain D that pixel electrode PE can pass through contact hole H and driving component T is electrically connected.The image element array substrates 110 of the present embodiment also comprises a plurality of data lines DL and multi-strip scanning line SL.Data line DL is configured in the first substrate 112 and with the source S of driving component T and is electrically connected.Sweep trace SL is configured in the first substrate 112 and with the grid G of driving component T and is electrically connected.Sweep trace SL and data line DL is interconnected.The pixel electrode PE of the present embodiment is such as transparency conducting layer, the material of pixel electrode PE comprises metal oxide, such as, be indium tin oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide or other suitable oxide or above-mentioned at least the two stack layer.
Continue referring to Fig. 1 and Fig. 2, the first shared electrode 116 overlaps with pixel electrode PE part.In detail, in the present embodiment, the first shared electrode 116 has multiple first connecting portion 116a (it is representative that Fig. 2 illustrates first connecting portion) parallel to each other and multiple first branch 116b that is parallel to each other and that be connected with the first connecting portion 116a.The bearing of trend of the first connecting portion 116a and the bearing of trend of sweep trace SL substantial parallel.The bearing of trend of the first branch 116b and the bearing of trend of data line DL substantial parallel.First branch 116b covers the first edge E1 of pixel electrode PE, and wherein the first edge E1 and data line DL is substantial parallel.
In the present embodiment, the first shared electrode 116 can belong to same rete with sweep trace SL.First shared electrode 116 of the present embodiment also can belong to same rete with the grid G of driving component T.In other words, the material of the first shared electrode 116, sweep trace SL and grid G can be identical.The material of the first shared electrode 116, sweep trace SL and grid G comprises metal material, alloy, the nitride of metal material or other suitable material.
As shown in Figures 1 and 2, the second shared electrode 118 overlaps with pixel electrode PE and the first shared electrode 116 part.In detail, in the present embodiment, the second shared electrode 118 has multiple second connecting portion 118a (it is representative that Fig. 2 illustrates second connecting portion) parallel to each other and multiple second branch 118b that is parallel to each other and that be connected with the second connecting portion 118a.The bearing of trend of the second connecting portion 118a and the bearing of trend of sweep trace SL substantial parallel.Second connecting portion 118a and the first connecting portion 116a overlaps.Furthermore, in the 112a of viewing area, the second connecting portion 118a can overlap with the first connecting portion 116a.The bearing of trend of the second branch 118b and the bearing of trend of data line DL substantial parallel.Second branch 118b covers the first edge E1 of pixel electrode PE.Second branch 118b and the first branch 116b part overlaps.In the present embodiment, the area that the first branch 116b and pixel electrode PE overlaps is greater than the area that the second branch 118b and pixel electrode PE overlaps.
In addition, rete belonging to the data line DL of the present embodiment is configurable in belonging to rete belonging to the first shared electrode 116 and the second shared electrode 118 between rete.The material of the second shared electrode 118 has the function of conduction and metallic shield concurrently.For example, the material of the second shared electrode 118 comprises metal material, alloy, the nitride of metal material or other suitable material.In addition, the material of the second shared electrode 118 also comprises transparent conductive material, such as indium tin oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide or other suitable oxide or above-mentioned at least the two stack layer.
Fig. 3 is the sectional view that the line segment B-B ' of corresponding diagram 2 illustrates.Please refer to Fig. 2 and Fig. 3, the second shared electrode 118 and the first shared electrode 116 are electrically connected.Specifically, the image element array substrates 110 of the present embodiment also comprises the first conductive pattern 113 and the second conductive pattern 115.First conductive pattern 113 belongs to same rete with sweep trace SL and is configured at surrounding zone 112b.Second conductive pattern 115 belongs to same rete with pixel electrode PE and is configured at surrounding zone 112b.First shared electrode 116 and the second shared electrode 118 are electrically connected through the first conductive pattern 113 and the second conductive pattern 115.
In detail, as shown in Figure 3, the image element array substrates 110 of the present embodiment also comprises the first dielectric layer 117a, the second dielectric layer 117b and the 3rd dielectric layer 117c.First dielectric layer 117a is configured between rete belonging to sweep trace SL (i.e. rete belonging to the first shared electrode 116) and the affiliated rete of data line DL (i.e. rete belonging to the first conductive pattern 113).Second dielectric layer 117b is configured at rete belonging to data line DL and second and shares between the extremely affiliated rete of electricity 118.3rd dielectric layer 117c to be configured at belonging to rete belonging to pixel electrode PE and the second shared electrode 118 between rete.First dielectric layer 117a, the second dielectric layer 117b and the 3rd dielectric layer 117c have light transmission and high-k.The material of the first dielectric layer 117a, the second dielectric layer 117b and the 3rd dielectric layer 117c comprises for inorganic material (such as: the stack layer of monox, silicon nitride, silicon oxynitride or above-mentioned at least two kinds of materials), organic material or above-mentioned combination.
In the present embodiment, as shown in Figures 2 and 3, the first dielectric layer 117a has and is configured at surrounding zone 112b and the first opening H1 exposing the first shared electrode 116.Furthermore, the first opening H1 is the first connecting portion 116a exposing the first shared electrode 116.First conductive pattern 113 is inserted the first opening H1 and contacts with the first shared electrode 116.Second dielectric layer 117b has and is configured at surrounding zone 112b and the second opening H2 exposing the first conductive pattern 113.3rd dielectric layer 117c have expose the second opening H2 and first conduct electricity Figure 113 the 3rd opening H3 and expose the 4th opening H4 of the second shared electrode pattern 118.Furthermore, the 4th opening H4 is the second connecting portion 118a exposing the second shared electrode 118.One end of second conductive pattern 115 case is inserted the 3rd opening H3, the second opening H2 and contacts with the first conductive pattern 113.First conductive pattern 113 contacts with the first shared electrode 116.Again, the other end of the second conductive pattern 115 is inserted the 4th opening H4 and contacts with the second shared electrode 118.Therefore, second shared electrode 118 of the present embodiment can be electrically connected with the first shared electrode 116 in the 112b of surrounding zone.
Please refer to Fig. 1, the counter electrode 126 that the subtend substrate 120 of the present embodiment comprises the second substrate 122, is configured at the light-shielding pattern 124 in the second substrate 122 and is configured on the second substrate 122 and light-shielding pattern 124.Second substrate 122 is mainly used for the assembly carried on it, and the material of the second substrate 122 can be glass, quartz, organic polymer or other material applicatory.
As shown in Figures 1 and 2, the light-shielding pattern 124 of the present embodiment covers the first edge E1 of pixel electrode PE.Light-shielding pattern 124 covers the second edge E2 corresponding with the first edge E1 of counter electrode 126.Light-shielding pattern 124 comprehensive covering first branch 116b, the second branch 118b and data line DL.The light-shielding pattern 124 of the present embodiment has the function stopping that light passes through
The material of light-shielding pattern 124 comprises black resin, metal or other light screening material.Counter electrode 126 and the first shared electrode 116 and the second shared electrode 118 are electrically connected.In detail, in the present embodiment, counter electrode 126 can pass through and is configured at conducting particles (not illustrating) between image element array substrates 110 and subtend substrate 120 and is electrically connected with the first shared electrode 116 and the second shared electrode 118.The counter electrode 126 of the present embodiment is such as transparency conducting layer, it comprises metal oxide, such as, be indium tin oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide or other suitable oxide or above-mentioned at least the two stack layer.
It should be noted that as shown in Figure 1, between the first shared electrode 116 and pixel electrode PE, there is the first distance D1.First distance D1 is the bee-line of the first shared electrode 116 and pixel electrode PE.Second distance D2 is there is between second shared electrode 118 and pixel electrode PE.Second distance D2 is the bee-line of the second shared electrode 118 and pixel electrode PE.First distance D1 is greater than second distance D2.
Because the first shared electrode 116 overlaps with pixel electrode PE part, the first shared electrode 116 can form the first storage capacitors with pixel electrode PE.Because the second shared electrode 118 and pixel electrode PE part overlap, the second shared electrode 116 can form the second storage capacitors with pixel electrode PE.First shared electrode 116 and the second shared electrode 118 are electrically connected again, therefore the storage capacitors of whole display panel 100 be the first storage capacitors and the second storage capacitors and.Through the area suitably designing the first distance D1, second distance D2 and the first shared electrode 116, second shared electrode 118 and overlap with pixel electrode PE, the storage capacitors value optimization of whole display panel 100 can be made.The light that backlight sends can be stopped through the first shared electrode 116, and without the need to increasing the area of light-shielding pattern 124, and then make display panel 100 still can maintain high transmission rate while optimization storage capacitors value.
In sum, in the image element array substrates and display panel of one embodiment of the invention, design apart from the first different shared electrode, the second shared electrode through from pixel electrode, the display panel of one embodiment of the invention can maintain the problem improving cross-talk or the flicker caused because of the non-optimization of storage capacitors value under high transmission rate.
Although the present invention with embodiment openly as above; so itself and be not used to limit the present invention; have in any art and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on the aforesaid claim person of defining.
Claims (15)
1. an image element array substrates, comprising:
One first substrate;
Multiple dot structure, is configured in this first substrate, the pixel electrode that each this dot structure comprises a driving component and is electrically connected with this driving component, and wherein this driving component has one source pole, a drain electrode, a grid and a channel layer;
One first shared electrode, overlaps with those pixel electrode part, there is one first distance between this first shared electrode and those pixel electrodes; And
One second shared electrode, be electrically connected with this first shared electrode and overlap with those pixel electrodes and this first shared electrode part, there is a second distance between this second shared electrode and those pixel electrodes, wherein this first distance is greater than this second distance;
A plurality of data lines, is configured in this first substrate and with those source electrodes of those driving components and is electrically connected; And
Multi-strip scanning line, is configured in this first substrate and with those grids of those driving components and is electrically connected, those sweep traces and those data lines interconnected;
Wherein this first substrate has the surrounding zone outside a viewing area and this viewing area, those dot structures are configured at this viewing area, this image element array substrates more comprises one first conductive pattern and one second conductive pattern, this first conductive pattern and those sweep traces belong to same rete and are configured at this surrounding zone, this second conductive pattern and those pixel electrodes belong to same rete and are configured at this surrounding zone, and this first shared electrode and this second shared electrode are electrically connected through this first conductive pattern and this second conductive pattern.
2. image element array substrates as claimed in claim 1, it is characterized in that, this first shared electrode and those sweep traces belong to same rete.
3. image element array substrates as claimed in claim 1, is characterized in that, rete belonging to those data lines to be configured at belonging to rete belonging to this first shared electrode and this second shared electrode between rete.
4. image element array substrates as claimed in claim 1, it is characterized in that, this first shared electrode has multiple first connecting portion parallel to each other and multiple first branches that are parallel to each other and that be connected with those first connecting portions, and this second shared electrode has multiple second connecting portion parallel to each other and multiple second branches that are parallel to each other and that be connected with those second connecting portions.
5. image element array substrates as claimed in claim 4, it is characterized in that, those first connecting portions and the bearing of trend of those the second connecting portions and the bearing of trend of those sweep traces substantial parallel, those first connecting portions and those the second connecting portions overlap, those first branches and the bearing of trend of those the second branches and the bearing of trend of those data lines substantial parallel, those first branches and those the second branches cover multiple first edges of those pixel electrodes, those first edges and those data lines substantial parallel.
6. image element array substrates as claimed in claim 5, is characterized in that, the area that those first branches and those pixel electrodes overlap is greater than the area that those second branches and those pixel electrodes overlap.
7. image element array substrates as claimed in claim 1, is characterized in that, also comprise:
One first dielectric layer, to be configured at belonging to rete belonging to those sweep traces and those data lines between rete, this first dielectric layer has and is configured at this surrounding zone and one first opening exposing this first shared electrode, and this first conductive pattern is inserted this first opening and contacts with this first shared electrode;
One second dielectric layer, is configured at belonging to rete belonging to those data lines and this second shared electrode between rete, and this second dielectric layer has and is configured at this surrounding zone and one second opening exposing this first conductive pattern; And
One the 3rd dielectric layer, to be configured at belonging to rete belonging to those pixel electrodes and this second shared electrode between rete, 3rd dielectric layer has one the 3rd opening exposing this second opening and this first conductive pattern and the 4th opening exposing this second shared electrode pattern, this second conductive pattern is inserted this second opening and the 3rd opening and is contacted with this first conductive pattern, and this second conductive pattern is inserted the 4th opening and contacted with this second shared electrode.
8. a display panel, is characterized in that, comprising:
One image element array substrates, comprising:
One first substrate;
Multiple dot structure, is configured in this first substrate, the pixel electrode that each this dot structure comprises a driving component and is electrically connected with this driving component;
One first shared electrode, overlaps with those pixel electrode part, there is one first distance between this first shared electrode and those pixel electrodes; And
One second shared electrode, be electrically connected with this first shared electrode and overlap with those pixel electrodes and this first shared electrode part, there is a second distance between this second shared electrode and those pixel electrodes, wherein this first distance is greater than this second distance;
A plurality of data lines, is configured in this first substrate and with multiple source electrodes of those driving components and is electrically connected; And
Multi-strip scanning line, is configured in this first substrate and with multiple grids of those driving components and is electrically connected, those sweep traces and those data lines interconnected;
One subtend substrate, configures relative to this image element array substrates; And
One display medium, is configured between this image element array substrates and this subtend substrate;
This first substrate has the surrounding zone outside a viewing area and this viewing area, those dot structures are configured at this viewing area, this image element array substrates also comprises one first conductive pattern and one second conductive pattern, this first conductive pattern and those sweep traces belong to same rete and are configured at this surrounding zone, this second conductive pattern and those pixel electrodes belong to same rete and are configured at this surrounding zone, and this first shared electrode and this second shared electrode are electrically connected through this first conductive pattern and this second conductive pattern.
9. display panel as claimed in claim 8, is characterized in that, this this first shared electrode and those sweep traces belong to same rete.
10. display panel as claimed in claim 8, is characterized in that, rete belonging to those data lines to be configured at belonging to rete belonging to this first shared electrode and this second shared electrode between rete.
11. display panels as claimed in claim 8, it is characterized in that, this first shared electrode has multiple first connecting portion parallel to each other and multiple first branches that are parallel to each other and that be connected with those first connecting portions, and this second shared electrode has multiple second connecting portion parallel to each other and multiple second branches that are parallel to each other and that be connected with those second connecting portions.
12. display panels as claimed in claim 11, it is characterized in that, those first connecting portions and the bearing of trend of those the second connecting portions and the bearing of trend of those sweep traces substantial parallel, those first connecting portions and those the second connecting portions overlap, those first branches and the bearing of trend of those the second branches and the bearing of trend of those data lines substantial parallel, those first branches and those the second branches cover multiple first edges of those pixel electrodes, those first edges and those data lines substantial parallel.
13. display panels as claimed in claim 12, it is characterized in that, this subtend substrate comprises:
One second substrate;
One light-shielding pattern, is configured in this second substrate; And
One counter electrode, be configured in this light-shielding pattern and this second substrate, wherein this light-shielding pattern covers those first edges of those pixel electrodes, and those first branches of the comprehensive covering of this light-shielding pattern, those second branches and those data lines, this counter electrode and this first shared electrode, this second shared electrode are electrically connected.
14. display panels as claimed in claim 12, is characterized in that, the area that those first branches and those pixel electrodes overlap is greater than the area that those second branches and those pixel electrodes overlap.
15. display panels as claimed in claim 8, it is characterized in that, this image element array substrates, also comprises:
One first dielectric layer, to be configured at belonging to rete belonging to those sweep traces and those data lines between rete, this first dielectric layer has and is configured at this surrounding zone and one first opening exposing this first shared electrode, and this first conductive pattern is inserted this first opening and contacts with this first shared electrode;
One second dielectric layer, is configured at belonging to rete belonging to those data lines and this second shared electrode between rete, and this second dielectric layer has and is configured at this surrounding zone and one second opening exposing this first conductive pattern; And
One the 3rd dielectric layer, to be configured at belonging to rete belonging to those pixel electrodes and this second shared electrode between rete, 3rd dielectric layer has one the 3rd opening exposing this second opening and this first conductive pattern and the 4th opening exposing this second shared electrode pattern, this second conductive pattern is inserted this second opening and the 3rd opening and is contacted with this first conductive pattern, and this second conductive pattern is inserted the 4th opening and contacted with this second shared electrode.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1945838A (en) * | 2006-10-27 | 2007-04-11 | 京东方科技集团股份有限公司 | TET LCD array substrate structure and its producing method |
| CN101059608A (en) * | 2006-04-20 | 2007-10-24 | 胜华科技股份有限公司 | Multi-domain LCD |
| CN102650783A (en) * | 2011-12-29 | 2012-08-29 | 京东方科技集团股份有限公司 | Display device, TFT-LCD (Thin Film Transistor-Liquid Crystal Display) pixel structure and manufacturing method of TFT-LCD pixel structure |
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| KR100250795B1 (en) * | 1996-11-29 | 2000-04-01 | 김영환 | Liquid crystal display element and its manufacturing method |
| KR101137866B1 (en) * | 2005-06-30 | 2012-04-23 | 엘지디스플레이 주식회사 | In-plane switching mode liquid crystal display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101059608A (en) * | 2006-04-20 | 2007-10-24 | 胜华科技股份有限公司 | Multi-domain LCD |
| CN1945838A (en) * | 2006-10-27 | 2007-04-11 | 京东方科技集团股份有限公司 | TET LCD array substrate structure and its producing method |
| CN102650783A (en) * | 2011-12-29 | 2012-08-29 | 京东方科技集团股份有限公司 | Display device, TFT-LCD (Thin Film Transistor-Liquid Crystal Display) pixel structure and manufacturing method of TFT-LCD pixel structure |
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