CN104503172A - Array substrate and display device - Google Patents
Array substrate and display device Download PDFInfo
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- CN104503172A CN104503172A CN201410804969.4A CN201410804969A CN104503172A CN 104503172 A CN104503172 A CN 104503172A CN 201410804969 A CN201410804969 A CN 201410804969A CN 104503172 A CN104503172 A CN 104503172A
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- base palte
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- 239000000758 substrate Substances 0.000 title claims abstract description 9
- 239000002184 metal Substances 0.000 claims abstract description 60
- 239000010409 thin film Substances 0.000 claims abstract description 33
- 239000004973 liquid crystal related substance Substances 0.000 claims description 9
- 239000012528 membrane Substances 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 238000000034 method Methods 0.000 description 22
- 230000008569 process Effects 0.000 description 17
- 238000009413 insulation Methods 0.000 description 10
- 238000000059 patterning Methods 0.000 description 8
- 230000008901 benefit Effects 0.000 description 5
- 239000011159 matrix material Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005056 compaction Methods 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 230000004304 visual acuity Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
- H04N13/30—Image reproducers
- H04N13/332—Displays for viewing with the aid of special glasses or head-mounted displays [HMD]
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04107—Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Human Computer Interaction (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Geometry (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses an array substrate and a display device, belongs to the technical field of display and solves the technical problem that the manufacturing process of the array substrate is too complex. The array substrate comprises a plurality of pixel units, a plurality of common electrodes and a plurality of addressing lines. A thin film transistor is arranged in each pixel unit. Each addressing line is formed by connecting a first metal wire and a second metal wire. The first metal wires and the grid electrodes of the thin film transistors are located on the same layer. The second metal wires and the source electrodes and the drain electrodes of the thin film transistors are located on the same layer. The array substrate and the display device can be applied to cell phones, tablet personal computers and electronic equipment.
Description
Technical field
The present invention relates to display technique field, specifically, relate to a kind of array base palte and display device.
Background technology
Along with the development of display technique, liquid crystal display has become display device the most common.
On the other hand, along with popularizing of smart electronics product, capacitance type touch control screen is also widely used in the various electronic product such as mobile phone, panel computer.Comparatively common capacitance type touch control screen has OGS (One glasssolution), on-cell and in-cell tri-kinds of technology at present.Wherein, in-cell technology, due to the advantage in its manufacture craft, compares OGS technology and on-cell technology, has the advantages such as more frivolous, light transmission better, structure is more stable.
The present inventor is realizing finding in process of the present invention, and prior art at least exists following technical matters: adopt in the liquid crystal display of in-cell technology, at least needs to set up the structure such as addressed line and corresponding insulation course.In the manufacture process of array base palte, need to increase patterning processes (Photo Engraving Process, be called for short PEP) at least one times, therefore there is the too complicated technical matters of the manufacture process of array base palte in prior art.
Summary of the invention
The object of the present invention is to provide a kind of array base palte and display device, to solve in existing in-cell technology, the technical matters that the manufacture process of array base palte is too complicated.
The invention provides a kind of array base palte, comprise multiple pixel cell, in each described pixel cell, be provided with thin film transistor (TFT) (Thin Film Transistor is called for short TFT);
Described array base palte also comprises many public electrodes and many addressed line, and every bar addressed line is connected with corresponding public electrode;
Described public electrode is used for providing common electric voltage, also for generation of touching signals for corresponding pixel cell;
Described addressed line is connected to form by the first metal wire and the second metal wire, and the grid of described first metal wire and described thin film transistor (TFT) is positioned at same layer, and the source electrode of described second metal wire and described thin film transistor (TFT), draining is positioned at same layer.
Preferably, this array base palte also comprises multi-strip scanning line and a plurality of data lines;
Described first metal wire is positioned at immediately below described data line.
In one implementation, be connected between described first metal wire with described second metal wire by link, described first metal wire is connected with described link respectively by via hole with described second metal wire.
Preferably, the low temperature polycrystalline silicon (LowTemperature Poly-Silicon is called for short LTPS) in described link and described thin film transistor (TFT) is positioned at same layer.
Further, described thin film transistor (TFT) is top gate type thin film transistor.
Further, the LTPS in described thin film transistor (TFT) and the below of described link are provided with light shield layer.
In another kind of implementation, be directly connected by via hole between described first metal wire with described second metal wire.
Preferably, a corresponding one or more described pixel cell of described public electrode.
The present invention also provides a kind of display device, comprises color membrane substrates and above-mentioned array base palte.
Preferably, described display device is fringe field switching type (Fringe Field Switching is called for short FFS) liquid crystal display.
Present invention offers following beneficial effect: in array base palte provided by the invention, utilize the first metal wire and the second metal wire are interconnected and form addressed line, for transmitting touching signals.Further, the first metal wire and the second metal wire are carried out cross-over connection, original sweep trace and data line can be avoided, therefore can not affect the line design of sweep trace and data line.
In the manufacture process of array base palte, the grid of the first metal wire, sweep trace, thin film transistor (TFT) synchronously can formed with in a patterning processes, source electrode, the drain electrode of the second metal wire, data line, thin film transistor (TFT) also synchronously can formed with in a patterning processes, thus do not need the number of times increasing separately patterning processes in order to form addressed line, simplify the manufacture process of array base palte.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from instructions, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in instructions, claims and accompanying drawing and obtain.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, accompanying drawing required in describing is done simple introduction below to embodiment:
Fig. 1 is the floor map of the array base palte that the embodiment of the present invention one provides;
Fig. 2 is the schematic cross-section of the array base palte that the embodiment of the present invention one provides;
Fig. 3 is the floor map of the array base palte that the embodiment of the present invention two provides;
Fig. 4 is the schematic cross-section of the array base palte that the embodiment of the present invention two provides.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, to the present invention, how application technology means solve technical matters whereby, and the implementation procedure reaching technique effect can fully understand and implement according to this.It should be noted that, only otherwise form conflict, each embodiment in the present invention and each feature in each embodiment can be combined with each other, and the technical scheme formed is all within protection scope of the present invention.
embodiment one:
As depicted in figs. 1 and 2, the embodiment of the present invention provides a kind of array base palte, and this array base palte comprises multiple pixel cell, is provided with thin film transistor (TFT) 1 and pixel electrode 2 in each pixel cell.
Thin film transistor (TFT) 1 in the present embodiment is top gate type thin film transistor.As a preferred version, LTPS in the present embodiment, is adopted to form the raceway groove of thin film transistor (TFT) 1.Compared to traditional amorphous silicon (α-Si), LTPS has higher carrier mobility, therefore realizes higher resolution and lower power consumption, and the integrated level of device is also higher on array base palte.
In the present embodiment, grid 101 is positioned at above LTPS 102, and is provided with insulation course 32 between grid 101 and LTPS 102.Be provided with insulation course 33 above grid 101, source electrode 103 and drain electrode 104 are arranged on insulation course 33, and source electrode 103 is connected with LTPS 102 by via hole 41 with drain electrode 104.Be connected by the via hole 42 running through insulation course 34,35 between pixel electrode 2 with drain electrode 104.
Also comprise many public electrodes 6 and many addressed line 5 in the array base palte that the embodiment of the present invention provides, every bar addressed line 5 is connected with corresponding public electrode 6.Wherein, addressed line 5 is connected to form by the first metal wire 51 and the second metal wire 52, and the first metal wire 51 is positioned at same layer with the grid 101 of thin film transistor (TFT) 1, and the source electrode 103 of the second metal wire 52 and thin film transistor (TFT) 1, draining 104 is positioned at same layer.
This array base palte can adopt display and touch-control Time share scanning in the application: when showing image, public electrode 6 provides common electric voltage for corresponding pixel cell, makes to form electric field between public electrode 6 and pixel electrode 2; When touch-control scans, public electrode 6 as touch sensing, for generation of touching signals.It should be noted that a public electrode 6 can corresponding one or more pixel cell, and the shape of public electrode 6 is generally rectangle, but also can be set to other shape according to actual conditions.
Multi-strip scanning line 7 and a plurality of data lines 8 is also comprised in the array base palte that the embodiment of the present invention provides.As a preferred version, the first metal wire 51 is positioned at immediately below data line 8.In addition, the end of the first metal wire 51 is extended outside data line 8 to side, and the second metal wire 52 is connected with the first metal wire 51 at this extended spot, and strides across sweep trace 7.
In this way the first metal wire 51 and the second metal wire 52 are carried out cross-over connection, original sweep trace 7 and data line 8 can be avoided, therefore can not affect the line design of sweep trace 7 and data line 8.Further, in the present embodiment, the first metal wire 51 is positioned at immediately below data line 8, and the orthogonal projection of the first metal wire 51 is overlapped substantially with data line 8, then the first metal wire 51 and data line 8 can be blocked by black matrix by the same on color membrane substrates.Certainly, the first metal wire 51 can be slightly different with the width of data line 8.
Because the overwhelming majority of addressed line 5 is all be made up of the first metal wire 51, only striding across sweep trace 7 place, just can adopt the second metal wire 52, so the first metal wire 51 and data line 8 are blocked by the black matrix of same, also the overwhelming majority of addressed line 5 just can be made all to be sheltered from by original black matrix, thus hardly because addressed line 5 affects the aperture opening ratio of liquid crystal display entirety.
In the present embodiment, be connected by link 53 between the first metal wire 51 with the second metal wire 52.Be LTPS as a preferred version link 53, and the LTPS102 in link and thin film transistor (TFT) 1 is positioned at same layer.First metal wire 51 is connected by the via hole 43 running through insulation course 32 with between link 53, and the second metal wire 52 is connected by the via hole 44 running through insulation course 32,33 with between link 53.Public electrode 6 is connected by the second metal wire 52 of the via hole 45 with addressed line 5 that run through insulation course 34.
Further, the LTPS in thin film transistor (TFT) and the below of link are provided with insulation course 31 and light shield layer 9, and light shield layer 9 preferably adopts metal material to be formed.Light shield layer 9 can prevent channel region and the link 53 of thin film transistor (TFT) 1, occurs photogenerated current, and cause thin film transistor (TFT) 1 or addressed line 5 to produce the problem of undesired signal under the light conditions being subject to backlight.
In the manufacture process of the array base palte provided in the embodiment of the present invention, the grid 101 of the first metal wire 51, sweep trace 7, thin film transistor (TFT) 1 synchronously can formed with in a patterning processes, source electrode 103, the drain electrode 104 of the second metal wire 52, data line 8, thin film transistor (TFT) 1 synchronously can formed with in a patterning processes, and the LTPS 102 of link 53 and thin film transistor (TFT) 1 also synchronously can formed with in a patterning processes.Therefore, not needing the number of times increasing separately patterning processes in order to form addressed line, simplifying the manufacture process of array base palte, and can not increase the thickness of array base palte because of addressed line yet.
embodiment two:
As shown in Figure 3 and Figure 4, the present embodiment is substantially identical with embodiment one, and its difference is, in the present embodiment, the via hole 46 by running through insulation course 33 between the first metal wire 51 with the second metal wire 52 is directly connected.
Compared to embodiment one, the light shield layer below link and link in the present embodiment, can be saved.In addition, the addressed line 5 in the present embodiment is formed by connecting by the first metal wire 51 and the second metal wire 52 completely, and namely addressed line 5 is formed by metal material completely, so the touching signals transmitted in addressed line 5 is also more stable, reliable.
embodiment three:
The embodiment of the present invention provides a kind of display device, can be the display device that mobile phone, panel computer etc. have touch controllable function, and adopts in-cell technology to realize touch-control circuit.This display device comprises the array base palte that color membrane substrates and above-described embodiment one or embodiment two provide.
This display device is preferably fringe field switching type (Fringe Field Switching is called for short FFS) liquid crystal display.Its core technology characteristic is the electric field that produced by slit-shaped pixel electrode electrode edge in same plane, make all aligned liquid-crystal molecules between slit-shaped electrode and directly over electrode produce Plane Rotation, thus improve the light transmission efficiency of liquid crystal layer.FFS technology can improve the picture quality of liquid crystal display, have high resolving power, high permeability, low-power consumption, wide viewing angle, high aperture, low aberration, without advantages such as water of compaction ripples.
The array base palte that the display device that the embodiment of the present invention provides and the invention described above embodiment one or embodiment two provide, has identical technical characteristic, so also can solve identical technical matters, reaches identical technique effect.
Although embodiment disclosed in this invention is as above, the embodiment that described content just adopts for the ease of understanding the present invention, and be not used to limit the present invention.Technician in any the technical field of the invention; under the prerequisite not departing from spirit and scope disclosed in this invention; any amendment and change can be done what implement in form and in details; but scope of patent protection of the present invention, the scope that still must define with appending claims is as the criterion.
Claims (10)
1. an array base palte, comprises multiple pixel cell, is provided with thin film transistor (TFT) in each described pixel cell;
Described array base palte also comprises many public electrodes and many addressed line, and every bar addressed line is connected with corresponding public electrode;
Described public electrode is used for providing common electric voltage, also for generation of touching signals for corresponding pixel cell;
Described addressed line is connected to form by the first metal wire and the second metal wire, and the grid of described first metal wire and described thin film transistor (TFT) is positioned at same layer, and the source electrode of described second metal wire and described thin film transistor (TFT), draining is positioned at same layer.
2. array base palte according to claim 1, is characterized in that, also comprises multi-strip scanning line and a plurality of data lines;
Described first metal wire is positioned at immediately below described data line.
3. array base palte according to claim 1, is characterized in that, is connected between described first metal wire with described second metal wire by link, and described first metal wire is connected with described link respectively by via hole with described second metal wire.
4. array base palte according to claim 3, is characterized in that, the low temperature polycrystalline silicon in described link and described thin film transistor (TFT) is positioned at same layer.
5. array base palte according to claim 4, is characterized in that, described thin film transistor (TFT) is top gate type thin film transistor.
6. array base palte according to claim 5, is characterized in that, the below of the low temperature polycrystalline silicon in described thin film transistor (TFT) and described link is provided with light shield layer.
7. array base palte according to claim 1, is characterized in that, is directly connected between described first metal wire with described second metal wire by via hole.
8. array base palte according to claim 1, is characterized in that, a corresponding one or more described pixel cell of described public electrode.
9. a display device, comprises color membrane substrates and the array base palte as described in any one of claim 1 to 8.
10. display device according to claim 9, is characterized in that, described display device is fringe field switching type liquid crystal display.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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CN201410804969.4A CN104503172A (en) | 2014-12-19 | 2014-12-19 | Array substrate and display device |
PCT/CN2015/070909 WO2016095307A1 (en) | 2014-12-19 | 2015-01-16 | Array substrate and display apparatus |
US14/418,189 US9836155B2 (en) | 2014-12-19 | 2015-01-16 | Array substrate and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201410804969.4A CN104503172A (en) | 2014-12-19 | 2014-12-19 | Array substrate and display device |
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CN104503172A true CN104503172A (en) | 2015-04-08 |
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CN201410804969.4A Pending CN104503172A (en) | 2014-12-19 | 2014-12-19 | Array substrate and display device |
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US (1) | US9836155B2 (en) |
CN (1) | CN104503172A (en) |
WO (1) | WO2016095307A1 (en) |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104777692A (en) * | 2015-05-08 | 2015-07-15 | 厦门天马微电子有限公司 | Array substrate and preparation method and touch-control display panel |
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Also Published As
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US9836155B2 (en) | 2017-12-05 |
WO2016095307A1 (en) | 2016-06-23 |
US20160246427A1 (en) | 2016-08-25 |
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