CN103021332A - Driving system for display - Google Patents
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- CN103021332A CN103021332A CN2012105126952A CN201210512695A CN103021332A CN 103021332 A CN103021332 A CN 103021332A CN 2012105126952 A CN2012105126952 A CN 2012105126952A CN 201210512695 A CN201210512695 A CN 201210512695A CN 103021332 A CN103021332 A CN 103021332A
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- 239000003990 capacitor Substances 0.000 claims abstract description 30
- 239000011159 matrix material Substances 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 229920005591 polysilicon Polymers 0.000 description 9
- 229920001621 AMOLED Polymers 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention provides a driving system for a display. The system comprises a pixel circuit, and the pixel circuit is provided with an organic light-emitting element, a storage capacitor, a transistor and a control line for controlling the pixel circuit. When the pixel circuit is stylized and driven, compensation to brightness decay of an organic light-emitting diode can be achieved through the circuit, and high-accuracy and high-stability current can be generated.
Description
Technical Field
The present invention relates to an organic electroluminescent display, and more particularly, to a driving system for compensating for luminance degradation of an organic electroluminescent diode display.
Background
Organic electroluminescent displays have been widely used in various display devices, and particularly, active matrix driving active light emitting diode (AMOLED) displays having amorphous silicon (a-Si), polysilicon (P-Si), Low Temperature Polysilicon (LTPS), organic or other driving backplanes have been widely attractive due to their advantages of lightness, thinness, active light emission, wide viewing angle, high resolution, high color saturation, fast response speed, low manufacturing cost, wide temperature range, etc.
The AMOLED display comprises a plurality of pixels arranged in a matrix, each pixel comprising an organic light emitting diode, a storage capacitor, and a transistor. Since the AMOLED is a current driving element, it is necessary to provide a precise and stable driving current for the AMOLED pixel unit circuit, and as the usage time increases, the voltage across the two terminals of the OLED increases, i.e. the current flowing through the OLED decreases.
Disclosure of Invention
It is an object of the present invention to provide a driving system for a display, which is capable of generating a current with high accuracy and high stability.
In order to achieve the purpose, the invention adopts the following technical scheme:
the driving system comprises a scanning driving module, a data driving module, a power supply and a plurality of pixel unit circuits, wherein each pixel unit circuit comprises a light-emitting device, a storage capacitor with a first end and a second end, a first transistor with a gate end and a first end and a second end, a second transistor, a third transistor, a fourth transistor and a fifth transistor;
the grid terminal of the first transistor is connected with the scanning driving module, the first terminal of the first transistor is connected with the data driving module, and the second terminal of the first transistor is connected with the first terminal of the storage capacitor and the first terminal of the second transistor;
the grid end of the second transistor is connected with the scanning driving module, the first end of the second transistor is connected with the first end of the storage capacitor, and the second end of the second transistor is connected with the first end of the fourth transistor;
the grid terminal of the third transistor is connected with the scanning driving module, the first terminal of the third transistor is connected with the second terminal of the storage capacitor and the grid terminal of the fourth transistor, and the second terminal of the third transistor is connected with the second terminal of the fourth transistor and the first terminal of the fifth transistor;
the grid end of the fourth transistor is connected with the second end of the storage capacitor, and the second end of the fourth transistor is connected with the first end of the fifth transistor;
the grid end of the fifth transistor is connected with the scanning driving module, and the second end of the fifth transistor is connected with the low-potential end of the power supply;
one end of the light emitting device is connected to the second terminal of the second transistor and the first terminal of the fourth transistor, and the other end is connected to a high potential terminal of the power supply.
The scanning driving module is led out with a first selection line, a second selection line and a third selection line, the grid end of the first transistor and the grid end of the third transistor are connected with the first selection line, the grid end of the fifth transistor is connected with the second selection line, and the grid end of the second transistor is connected with the third selection line.
The scanning driving module drives the pixel unit circuit to sequentially form a programming period and a driving period through the first selection line, the second selection line and the third selection line, and the programming period sequentially comprises a pre-charging period, a compensation period and an interval period.
The storage capacitor is charged during a precharge period, discharged during a compensation period, and maintained at a compensation period reserve value during an interval period, and a stored value of the storage capacitor is applied between the first terminal of the fourth transistor and the gate of the fourth transistor during a driving period.
During the compensation period, the storage value of the storage capacitor depends on the threshold voltage of the fourth transistor, the cross voltage of the light emitting device and the gray scale voltage.
The display is an organic electroluminescent display or an active matrix light emitting display.
The light emitting device is an organic light emitting diode.
At least one of the first to fifth transistors is amorphous, nanocrystalline, microcrystalline, polycrystalline, organic, N-type, P-type, or CMOS silicon.
When the driving system for the display disclosed by the invention programs the pixel unit circuit and drives the circuit, the circuit can realize the compensation of the brightness attenuation of the light-emitting device, and can generate high-precision and high-stability current.
Drawings
FIG. 1 is a schematic diagram of a pixel cell circuit according to the present invention;
FIG. 2 shows a timing diagram provided in accordance with the pixel cell circuit of FIG. 1;
FIG. 3 shows the structure of a drive system formed by the pixel cell circuit of FIG. 1;
in the figure: the scan driving module SD, the data driving module DD, the pixel unit circuit 100, the storage capacitor 112, the light emitting device 114, the first transistor 102, the second transistor 104, the third transistor 106, the fourth transistor 108, the fifth transistor 110, the first selection line S1, the second selection line S2, the third selection line S3, the programming period 120, the driving period 122, the pre-charging period X11, the compensation period X12, and the interval period X13.
Detailed Description
The invention is further illustrated by the following figures and examples.
The present embodiment is described by a pixel circuit of a light emitting device using an organic light emitting diode and a plurality of transistors. However, the pixel circuits may include different classes of OLED devices, the transistors in the pixel circuits may be n-type, P-type, or a combination thereof, and the transistors in the pixel circuits may be fabricated using amorphous silicon (a-Si), polysilicon (P-Si), Low Temperature Polysilicon (LTPS), NMOS/PMOS technology, or CMOS technology. The display with pixel cell circuits may be a monochrome, multi-color or full-color display and may include one or more light-emitting elements. The display can be used in DVD, PDA, computer, notebook computer and TV.
In the following description, "pixel circuit" and "pixel" are used interchangeably. In the following description, "connected" and "coupled" are used interchangeably. In the following description, "control line" and "selection line" and "address line" are used interchangeably.
Fig. 1 shows a pixel cell circuit 100 having 5 transistors (5T). The pixel cell circuit 100 in fig. 1 includes transistors, a storage capacitor 112, and an OLED light emitting device 114. The pixel unit circuit 100 is connected to three selection lines S1, S2, S3, a data line Vdata, a voltage line VDD, and a ground line VSS.
The transistor is a P-type TFT, however, the transistor can also be an N-type TFT. The transistors can be fabricated using amorphous silicon (a-Si), polysilicon (P-Si), Low Temperature Polysilicon (LTPS), NMOS/PMOS technology, or CMOS technology, and a plurality of pixel unit circuits are arranged in a matrix to form an AMOLED display.
The fourth transistor 108 is a driving transistor. The source and drain of the fourth transistor 108 are connected to the cathode of the OLED light emitting device 114 and the source of the fifth transistor 110, respectively. The gate of the fourth transistor 108 is connected to the data line Vdata through the storage capacitor 112 and the first transistor 102, and is connected to the source of the third transistor 106.
The drain of the third transistor 106 is connected to the source of the fifth transistor 110 and the drain of the fourth transistor 108, the source of the third transistor 106 is connected to the gate of the fourth transistor 108, and the gate of the third transistor 106 is connected to the first select line S1.
The drain of the second transistor 104 is connected to the cathode of the OLED light emitting device 114, the source of the second transistor 104 is connected to the drain of the first transistor 102, and the gate of the second transistor 104 is connected to the third select line S3.
The first transistor 102 is a switch transistor, the source of the first transistor 102 is connected to one end of a data line Vdata, the other end of the data line Vdata is connected to the data driving module DD, the drain of the first transistor 102 is connected to the source of the second transistor 104, and the gate of the first transistor 102 is connected to the first selection line S1.
The fifth transistor 110 is a light emitting control transistor, a source of the fifth transistor 110 is connected to a drain of the fourth transistor 108, a drain of the fifth transistor 110 is connected to one end of a ground line VSS, the other end of the ground line VSS is connected to a low potential end of the power supply, and a gate of the fifth transistor 110 is connected to the second selection line S2.
The first transistor 102, the second transistor 104 and the storage capacitor 112 are connected at a node A. The third transistor 106, the fourth transistor 108 and the storage capacitor 112 are connected at node B.
The anode of the OLED light emitting device 114 is connected to a high potential terminal of a power supply through a voltage line VDD.
Fig. 2 is a schematic diagram of waveforms that may be used in the embodiment of fig. 1, although other waveforms are applicable to fig. 1.
Referring to fig. 1 and 2, the operation of the pixel unit circuit 100 includes two operation cycles: a program cycle 120 and a drive cycle 122. At the end of the programming cycle 120, node A charges to VPIn which V isPIs a gray scale voltage; node B charges to VDD-VOLED_0+VTH，VTHIs the threshold voltage, V, of the fourth transistor 108DDIs the voltage of the high potential side of the power supply, VOLED_0Is the initial voltage at the cathode terminal of the OLED light emitting device 114. The storage capacitor is charged to VA-VB=VP-（VDD-VOLED_0+VTH) Wherein V isTH<0。
The programming cycle 120 includes three sub-cycles: precharge period X11, compensation period X12, interval period X13. In the precharge period X11, the first selection line S1, the second selection line S2 are low and the third selection line S3 is high, turning on the first transistor 102, the third transistor 106 and the fifth transistor 110, respectively, and turning off the second transistor 104. The voltage of the data line Vdata is set to VP，VPIs a gray scale voltage. At the end of precharge period X11, node A is charged to VPWhen node B is charged to VSS, the size of the storage capacitor 112 is VP-VSS，VSSIs the voltage of the low potential terminal of the power supply, VSSMay be 0 or may be a negative voltage.
In the compensation period X12, the first selection line S1 is kept low and the second selection line S2 and the third selection line S3 are high, so that the first transistor 102 and the third transistor 106 are turned on, and the second transistor 104 and the fifth transistor 110 are turned off. As a result, storeThe storage capacitor 112 discharges through the third transistor 106, the fourth transistor 108, and the OLED light emitting device 114 until the fourth transistor 108 is turned off and the current flowing through the OLED light emitting device approaches zero. At the end of the compensation period X12, the node B voltage is V by discharging the storage capacitor 112B=VDD-VOLED_0+VTHThen the value of the storage capacitor 112 is VA-VB=VP-（VDD-VOLED_0+VTH) Wherein V isTHIs the threshold voltage of the fourth transistor 108, and VTH<0。
In the interval period X13, the first selection line S1, the second selection line S2 and the third selection line S3 are all high, the transistor is turned off, and the period acts as an interval of the driving period to improve the contrast. At this stage, the value of the storage capacitor 112 is maintained at VP-（VDD-VOLED_0+VTH）。
In the driving period 122, the first selection line S1 is high, the second selection line S2 and the third selection line S3 are low, the first transistor 102 and the third transistor 106 are turned off, and the second transistor 104 and the fifth transistor 110 are turned on. As a result, node A records the voltage across the OLED light emitting device, i.e., VA=VDD-VOLEDIn the drive period, VOLED_0Increase to VOLEDNode B is floating, and the voltage at node B will jump equally with node A, a phenomenon known as self-lift effect, Δ VA=VDD-VOLED-VPThen V isB＝（VDD-VOLED_0+VTH）+（VDD-VOLED-VP) The value of the storage capacitor 112 is:
VA-VB=(VDD-VOLED)-[(VDD-VOLED_0+VTH)+(VDD-VOLED-VP)]
=-VDD+VOLED_0+VP-VTH
when the fourth transistor 108 enters the saturation region, the current flowing through the OLED light emitting device 114 is:
i＝β[Vsg+VTH]2
=β[-VDD+VOLED_0+VP-VTH+VTH]2
=β[VDD-VOLED_0-VP]2
wherein,is the transconductance coefficient, V, of the fourth transistor 108SGIndicating the voltage between the source and the gate of the fourth transistor 108.
Based on the above analysis, the current flowing through the OLED light emitting device 114 is finally related to the gray-scale voltage VPInitial voltage V across the OLEDDD-VOLED_0The current flowing through the OLED light-emitting device is independent of the change of the cross voltage along with the increase of the service time, so that the brightness attenuation phenomenon of the OLED light-emitting device caused by the overlong service time is compensated.
Fig. 3 is a driving system structure formed by the pixel unit circuit of fig. 1. The system includes a plurality of pixel unit circuits 100, a scan driving module SD and a data driving module DD shown in fig. 1, and in fig. 3, the pixels are arranged in two rows and two columns, however, the number of pixels may be different according to the system design and is not limited to 4. The pixel array is an active matrix light emitting display and may form an AMOLED display.
Claims (8)
1. A driving system for a display, the driving system comprising a scan driving module (SD), a data driving module (DD), a power supply and a number of pixel cell circuits (100), characterized in that: the pixel cell circuit (100) includes a light emitting device (114), a storage capacitor (112) having a first terminal and a second terminal, a first transistor (102) having a gate terminal, a first terminal, and a second terminal, a second transistor (104), a third transistor (106), a fourth transistor (108), and a fifth transistor (110);
the grid end of the first transistor (102) is connected with the scanning driving module (SD), the first end of the first transistor (102) is connected with the data driving module (DD), and the second end of the first transistor (102) is connected with the first end of the storage capacitor (112) and the first end of the second transistor (104);
the gate terminal of the second transistor (104) is connected with the scanning driving module (SD), the first terminal of the second transistor (104) is connected with the first terminal of the storage capacitor (112), and the second terminal of the second transistor (104) is connected with the first terminal of the fourth transistor (108);
the gate terminal of the third transistor (106) is connected with the scan driving module (SD), the first terminal of the third transistor (106) is connected with the second terminal of the storage capacitor (112) and the gate terminal of the fourth transistor (108), the second terminal of the third transistor (106) is connected with the second terminal of the fourth transistor (108) and the first terminal of the fifth transistor (110);
the gate terminal of the fourth transistor (108) is connected to the second terminal of the storage capacitor (112), and the second terminal of the fourth transistor (108) is connected to the first terminal of the fifth transistor (110);
the gate terminal of the fifth transistor (110) is connected to the scan driving module (SD), and the second terminal of the fifth transistor (110) is connected to the low potential terminal of the power supply;
one terminal of the light emitting device (114) is connected to the second terminal of the second transistor (104) and the first terminal of the fourth transistor (108), and the other terminal is connected to a high potential terminal of a power supply.
2. A driving system for a display according to claim 1, wherein: a first selection line (S1), a second selection line (S2) and a third selection line (S3) are led out from the scanning driving module (SD), the grid end of the first transistor (102) and the grid end of the third transistor (106) are connected with the first selection line (S1), the grid end of the fifth transistor (110) is connected with the second selection line (S2), and the grid end of the second transistor (104) is connected with the third selection line (S3).
3. A driving system for a display according to claim 2, wherein: the scan driving module (SD) drives the pixel unit circuit (100) through the first selection line (S1), the second selection line (S2) and the third selection line (S3) to sequentially form a programming period (120) and a driving period (122), wherein the programming period (120) sequentially includes a pre-charging period (X11), a compensation period (X12) and an interval period (X13).
4. A driving system for a display according to claim 3, wherein: the storage capacitor (112) is charged during a precharge period (X11), discharged during a compensation period (X12), maintained at a compensation period reserve value during an interval period (X13), and the stored value of the storage capacitor (112) is applied between the first terminal of the fourth transistor (108) and the gate of the fourth transistor (108) during the drive period (122).
5. A driving system for a display according to claim 3, wherein: during the compensation period (X12), the stored value of the storage capacitor (112) is determined by the threshold voltage of the fourth transistor (108), the voltage across the light emitting device (114), and the gray scale voltage.
6. A drive system for a display according to claim 1, 2, 3, 4 or 5, characterized in that: the display is an organic electroluminescent display or an active matrix light emitting display.
7. A drive system for a display according to claim 1, 2, 3, 4 or 5, characterized in that: the light emitting device (114) is an organic light emitting diode.
8. A drive system for a display according to claim 1, 2, 3, 4 or 5, characterized in that: at least one of the first to fifth transistors is amorphous, nanocrystalline, microcrystalline, polycrystalline, organic, N-type, P-type, or CMOS silicon.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103440841A (en) * | 2013-07-23 | 2013-12-11 | 深圳典邦科技有限公司 | Pixel circuit of organic light-emitting display and control method thereof |
| CN103578428A (en) * | 2013-10-25 | 2014-02-12 | 华南理工大学 | Method for driving pixel circuit of active organic electroluminescence displayer |
| CN103839520A (en) * | 2014-02-28 | 2014-06-04 | 京东方科技集团股份有限公司 | Pixel circuit, method for driving pixel circuit, display panel and display device |
| CN104575378A (en) * | 2014-12-23 | 2015-04-29 | 北京大学深圳研究生院 | Pixel circuit, display device and display driving method |
| CN106340268A (en) * | 2016-11-11 | 2017-01-18 | 京东方科技集团股份有限公司 | Pixel driving circuit and driving method thereof, and display device |
| CN110301000A (en) * | 2019-01-04 | 2019-10-01 | 京东方科技集团股份有限公司 | The method and corresponding display device that brightness disproportionation for display device compensates |
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| CN104575378A (en) * | 2014-12-23 | 2015-04-29 | 北京大学深圳研究生院 | Pixel circuit, display device and display driving method |
| CN106340268A (en) * | 2016-11-11 | 2017-01-18 | 京东方科技集团股份有限公司 | Pixel driving circuit and driving method thereof, and display device |
| CN106340268B (en) * | 2016-11-11 | 2017-11-28 | 京东方科技集团股份有限公司 | A kind of pixel-driving circuit and its driving method, display device |
| CN110301000A (en) * | 2019-01-04 | 2019-10-01 | 京东方科技集团股份有限公司 | The method and corresponding display device that brightness disproportionation for display device compensates |
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