CN102290027B - Pixel circuit and display device - Google Patents

Abstract

The present invention provides a pixel circuit and a display device, comprising: a power line for supplying power, a capacitor, a first transistor for driving a light-emitting device to emit light, a second transistor for forming a mirror image structure with the first transistor, a third transistor, and a fourth transistor for sampling the data signal supplied by the data line. The present invention only needs to use a simple structure composed of four transistors to generate and eliminate the threshold voltage information of the TFT to provide a stable output current, thereby effectively improving the uneven brightness of the OLED light-emitting device caused by the uneven threshold voltage of the polysilicon TFT panel. Problem; further, the pixel circuit gate scanning signal of the present invention is drawn from the upper and lower level pixels, avoiding additional complexity of scanning lines and peripheral driver ICs.

Description

A pixel circuit and display device

technical field

The invention relates to the technical field of display devices, in particular to an OLED display device and a pixel circuit thereof.

Background technique

Organic Light-Emitting Diode (OLED: Organic Light-Emitting Diode) display has been widely studied in recent years due to its advantages of high brightness, high luminous efficiency, wide viewing angle, and low manufacturing cost, and has been rapidly applied to a new generation of displays. OLED displays can be driven by pixels in two ways: PMOLED (PassiveMatrix OLED: Passive Matrix OLED) and AMOLED (Active Matrix OLED: Active Matrix OLED). Due to the shortcomings of crosstalk, large driving current, and high power consumption, passive matrix drivers cannot realize large-area displays. In contrast, active-matrix drives avoid problems such as duty cycle and crosstalk, require less drive current, lower power consumption, and thus have a longer life. At the same time, active matrix drivers are more likely to meet the needs of large-area, high-resolution, and high-gray-scale displays.

However, there are still many difficulties to be solved in order to commercialize active-matrix OLEDs. At present, the main processes of AMOLED pixel circuits are polycrystalline silicon (poly-Si) technology, amorphous silicon (a-Si) technology and microcrystalline silicon (uC-Si) technology. TFT (Thin Film Transistor: Thin Film Transistor) made of LTPS (Low Temperature Poly Silicon) technology has high carrier mobility, and can have two types of N-channel and P-channel devices. Peripheral driver IC integration; compared with a-Si technology, poly-Si technology basically does not have the phenomenon of threshold voltage drift under long-term bias, and the stability is better, but the threshold voltage difference between each transistor on the entire panel is relatively large , Poor uniformity, this is a problem that needs to be solved when using poly-Si TFT as pixel driver.

OLED is a current-mode light-emitting device, and its brightness is proportional to the current passing through it. In the traditional pixel circuit with two TFT structures, as shown in Figure 1, due to the inhomogeneity of the poly-Si TFT panel, different threshold voltages of the same data voltage will lead to different driving currents, that is, different brightness, thus affecting Displays the quality of the picture. In order to solve the problem of uneven brightness caused by the threshold voltage, various pixel circuits have been proposed, and these circuits can be roughly divided into two categories: current-driven pixel circuits and voltage-driven pixel circuits. Compared with the current-driven pixel circuit, the voltage-driven pixel circuit has a faster charging and discharging speed, which can meet the needs of large-area and high-resolution display. However, many voltage-driven pixel circuits introduce multiple control signals and a relatively complicated programming process when compensating for the inconsistency of the threshold voltage, which makes the circuit have higher requirements on the external driver IC, and the layout and wiring of the pixel also becomes complicated.

Contents of the invention

The main technical problem to be solved by the present invention is to provide a pixel circuit and a display device, which can compensate for the OLED caused by the uneven threshold voltage of poly-Si TFT under the premise of not increasing the complexity of the peripheral IC and the pixel circuit as much as possible. Uneven brightness.

To this end, the present invention proposes a pixel circuit arranged between scan lines arranged in a first direction for supplying control signals and data lines arranged in a second direction for supplying data signals, including:

a fourth transistor for sampling a data signal supplied by the data line;

capacitance;

The first transistor is used to drive the light emitting device to emit light;

It is characterized in that it also includes: a power line for providing power, a second transistor and a third transistor, wherein,

The control electrode of the fourth transistor is connected to the scan line of the row where the pixel circuit is located, the second current conduction electrode is connected to the data line, and the first current conduction electrode is connected to the second current conduction electrode of the second transistor. a pass electrode for conducting during a valid period of a given timing to sample a data signal supplied from the data line;

The first electrode of the capacitor is respectively connected to the control electrode of the first transistor and the control electrode of the second transistor to provide a turn-on voltage for the first transistor and the second transistor, and the second electrode is connected to first power source;

The first transistor is connected between the power supply line and the ground through its first and second current conduction poles, and provides current to the light emitting device under the voltage control of the first electrode of the capacitor;

The first current conduction electrode of the second transistor and its control electrode are connected together to form a diode connection;

The control electrode of the third transistor is connected to the scan line of the row before the pixel circuit, and the second current conduction electrode is connected with the first current conduction electrode and the control electrode of the second transistor and the control electrode of the first transistor. Connected to the first electrode of the capacitor, the first current conducting electrode is connected to the second power supply.

Further, the pixel circuit further includes: a light emitting device, the light emitting device and the first transistor are connected in series between the power line and ground.

In one embodiment, the cathode of the light-emitting device is grounded, and the anode is connected to the second current conduction electrode of the first transistor; the first current conduction electrode of the first transistor is connected to the power line; The second power supply is the power line; the first power supply is the ground or the anode of the light emitting device or the power line.

In another embodiment, the anode of the light emitting device is connected to the power supply line, and the cathode thereof is connected to the first current conduction electrode of the first transistor; the second current conduction electrode of the first transistor is grounded ; The second power supply is the power line; the first power supply is ground or the power line.

Preferably, the first transistor, the second transistor, the third transistor, and the fourth transistor are all N-channel polysilicon thin film transistors.

In yet another embodiment, the cathode of the light-emitting device is grounded, and its anode is connected to the second current conduction pole of the first transistor; the first current conduction pole of the first transistor is directly connected to the power line connected; the second power supply is the ground; the first power supply is the ground or the anode of the light emitting device or the power line.

Wherein, the first transistor, the second transistor, the third transistor, and the fourth transistor are all P-channel polysilicon thin film transistors; or, the first transistor and the second transistor are P-channel a polysilicon thin film transistor, and the third transistor and the fourth transistor are N-channel polysilicon thin film transistors.

In the above pixel circuit, the light emitting device is an organic light emitting diode.

The present invention accordingly provides a display device, comprising:

a plurality of scan lines arranged in a first direction;

A scanning driving circuit, used to generate scanning signals, the output ends of which are respectively connected to a plurality of scanning lines;

a plurality of data lines arranged in a second direction;

A data drive circuit, used to generate data signals, the output ends of which are respectively connected to a plurality of data lines;

It also includes a plurality of pixel circuits as described above, and the pixel circuits are arranged between the intersecting scanning lines and the data lines.

The beneficial effects of the present invention are:

(1) The pixel circuit of the present invention only needs four thin film transistors and one capacitor. Compared with other pixel circuits with a similar structure capable of compensating the threshold voltage, the circuit of the present invention can reduce the number of transistors by one or two. Achieve the same function, so it can reduce the complexity and cost of the pixel, and increase the aperture ratio of the pixel

(2) The threshold voltage is generated by using a circuit structure composed of different transistors, and the influence of the threshold voltage on the light-emitting device is reduced through the mirror image relationship between the second transistor and the first transistor and the generated threshold voltage information, thereby effectively compensating for the threshold voltage. Uneven brightness caused by unevenness;

(3) The pixel circuit of the present invention only needs to use the scan line of the row where the pixel circuit is located and the scan line of the previous row to drive each transistor respectively, and the existing peripheral ICs originally provide these scan lines, so this The inventive solution does not increase the complexity of the peripheral driver IC.

Description of drawings

Fig. 1 is a schematic diagram of two TFT pixel circuits of a technology;

FIG. 2 is a schematic diagram of Embodiment 1 of the pixel circuit of the present invention;

Fig. 3a is a schematic diagram of Embodiment 2 of the pixel circuit of the present invention;

Fig. 3b is a schematic diagram of Embodiment 3 of the pixel circuit of the present invention;

Fig. 3c is a schematic diagram of Embodiment 4 of the pixel circuit of the present invention;

Fig. 3d is a schematic diagram of Embodiment 5 of the pixel circuit of the present invention;

Fig. 4 is a schematic diagram of the gate scanning signal of the embodiment shown in Fig. 2 to Fig. 3d;

FIG. 5 is a schematic diagram of Embodiment 6 of the pixel circuit of the present invention;

FIG. 6 is a schematic diagram of Embodiment 7 of the pixel circuit of the present invention;

FIG. 7 is a schematic diagram of Embodiment 8 of the pixel circuit of the present invention;

FIG. 8 is a schematic diagram of the gate scan signal of the embodiment shown in FIG. 5 to FIG. 7;

Fig. 9a is a schematic diagram of a ninth embodiment of a pixel circuit;

Fig. 9b is a schematic diagram of the gate scanning signal of the embodiment shown in Fig. 9a;

Fig. 10 is a schematic diagram of an embodiment of the display device of the present invention.

Detailed ways

The present invention will be further described in detail below through specific embodiments in conjunction with the accompanying drawings.

Embodiment one:

The pixel circuit shown in FIG. 2 includes: a power line V _DD , a data line V _DATA , a first transistor T1 , a second transistor T2 , a third transistor T3 , a fourth transistor T4 and a capacitor C _S .

The scan line of the row where the pixel circuit is located is called the gate scan line V _N of the current row, where N is a natural number; the scan line of the previous row of the row where the pixel circuit is located is called the gate scan line V _N-1 of the previous row.

The power line V _DD is used to provide power for the pixel circuit, and in each embodiment herein, the power line provides a high-level constant-voltage power supply.

In the embodiment, the light-emitting device is an organic light-emitting diode (OLED) as an example for illustration.

The first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4, these four transistors in the embodiment are N-channel thin film transistors, the control electrode of the transistor corresponds to the gate of the TFT, and the first current is turned on The pole and the second current conduction pole are reciprocal, that is, the first current conduction pole can be the source or the drain, and correspondingly, the second current conduction pole can be the drain or the source .

The connection relationship between each component is:

The gate of the fourth transistor T4 is connected to V _N , the drain is connected to the data line V _DATA , and the source is connected to the source of the second transistor T2 for conducting during the active period of the given timing to sample the data line the supplied data signal;

The first electrode of the capacitor C _S is respectively connected to the gate of the first transistor T1 and the gate of the second transistor T2, for providing a turn-on voltage for the first transistor T1 and the second transistor T2, and the second electrode is connected to the first power supply, The first power supply is either the power supply line V _DD or the ground or the anode of the OLED. In Embodiment 1, the first power supply is the ground, that is, the second electrode is grounded;

The drain of the first transistor T1 is connected to the power line V _DD , and the source is connected to the anode of the OLED;

the drain of the second transistor T2 is connected together with its gate forming a diode connection;

The gate of the third transistor T3 is connected to V _N-1 , the source is connected to the first electrode of the capacitor _CS , and the drain is connected to the second power supply. The second power supply can be the power supply line V _DD or the ground. Embodiment 1 The second power supply is the power line V _DD , that is, the drain is connected to the power line;

The anode of the OLED is connected to the source of the first transistor T1, and the cathode is grounded.

The working process of the circuit shown in the first embodiment, as shown in FIG. 4 , is divided into three stages: pre-charging stage, programming stage and light-emitting stage.

Precharge phase:

Gate scanning line V _N-1 changes from low level to high level, V _N keeps low level, T4 is turned off, and because T3 is turned on, the potential on the first electrode of capacitor C _s is charged very high, close to V _DD .

Programming stage:

The gate scan line V _N-1 changes from high level to low level, and V _N changes from low level to high level, so that T3 is turned off and T4 is turned on. The charge on the capacitor C _s is discharged through the branch circuit composed of T2 and T4 until T2 is cut off, at this time the potential on the first electrode of C _s is equal to V _{TH_T2} +V _DATA .

Luminous stage:

The gate scanning lines V _N-1 and V _N both become low level, and both T3 and T4 are cut off; the voltage of the first electrode of C _s in the programming phase is saved until the next frame scan; the voltage at point A provides current for OLED:

I=K(V _{GS_T1} -V _{TH_T1} ) ² ＝K(V _DATA +V _{TH_T2} -V _OLED -V _{TH_T1} ) ²

Since T1 and T2 are adjacent in position and adopt the same process, it can be considered that the threshold voltages of the two are equal, that is, V _{TH_T2} = V _{TH_T1} , so the above formula can be simplified as:

I=K(V _DATA -V _OLED ) ² (1)

Among them, V _{TH_T1} and V _{TH_T2} represent the threshold voltages of T1 and T2 respectively, and V _OLED represents the anode potential of the OLED in the light-emitting phase. K=0.5μC _OX (W/L) is the gain factor, μ and C _OX are the carrier mobility and gate insulating layer capacitance of TFT respectively, W and L represent the channel width and length of TFT respectively. It can be known from the above formula (1) that the OLED current has nothing to do with the threshold voltage V _TH of the TFT, thus compensating the uneven brightness caused by the uneven threshold voltage.

The driving timing of the pixel circuit shown in Embodiment 1 adopts the gate signals of the upper and lower pixels: the gate signals V _N-1 and V _N in the circuit become high level in turn during the entire frame scanning process, and the duration of the high level phase They are the same and do not overlap with each other, so the grid scanning line of the previous row of pixels on the panel can be used as V _N-1 , and the grid scanning line V _N of this row provides scanning signals for the pixels of this row, and is used as the next A row of raster lines preceding a row of pixels. This is equivalent to using only one gate scan signal for each level of pixels without requiring additional gate scan lines, which greatly simplifies the peripheral driver IC and reduces the complexity of pixel wiring.

Embodiment two:

As shown in FIG. 3 a , the difference between the second embodiment and the first embodiment is that the first power supply is the anode voltage of the OLED, that is, the second electrode of the capacitor C _s is connected to the anode of the OLED at this time.

The working process of the circuit in the second embodiment is the same as that in the first embodiment, and will not be repeated here.

Embodiment three:

As shown in FIG. 3 b , the difference between the third embodiment and the first embodiment is that the first power source is the power line V _DD , that is, the second electrode of the capacitor C _s is connected to the power line V _DD at this time.

The working process of the circuit in the third embodiment is the same as that in the first embodiment, and will not be repeated here.

Embodiment four:

As shown in FIG. 3 c , the difference between the fourth embodiment and the first embodiment is that the power line V _DD is connected to the anode of the OLED, the cathode of the OLED is connected to the drain of the first transistor T1 , and the source of the first transistor T1 is grounded.

The difference between the working process of the circuit of the fourth embodiment and the first embodiment is that in the light-emitting phase, the current of the OLED is I=K(V _DATA ) ² . At this time, to achieve the same brightness, the required data voltage is smaller.

Embodiment five:

As shown in FIG. 3d , the difference between the fifth embodiment and the third embodiment is that the power line V _DD is connected to the anode of the OLED, the cathode of the OLED is connected to the drain of the first transistor T1 , and the source of the first transistor T1 is grounded.

The circuit working process of the fifth embodiment is the same as that of the fourth embodiment, and will not be repeated here.

In the above embodiments 1 to 5, the four transistors T1, T2, T3, and T4 may all be N-channel polysilicon TFTs, or all may be P-channel polysilicon TFTs. For details, see Embodiments 6 to 8.

Embodiment six:

As shown in Figure 5, the difference between the sixth embodiment and the third embodiment is that the four transistors T1, T2, T3, and T4 are P-channel polysilicon TFTs, and the second power supply is the ground, that is, the drain of T3 grounded.

The working process of the circuit shown in the sixth embodiment is shown in FIG. 8 , which is also divided into three stages: pre-discharge stage, programming stage and light-emitting stage.

Pre-discharge phase:

The gate scanning line V _N-1 changes from high level to low level, V _N is high level, T4 is turned off, and since T3 is turned on, the voltage on the first electrode of the capacitor Cs is discharged to zero through T3.

Programming stage:

The gate scanning line V _N-1 changes from low level to high level, and V _N changes from high level to low level, so that T3 is turned off and T4 is turned on. The data voltage V _DATA charges the first electrode of the storage capacitor Cs to V _{TH_T2} +V _DATA (at this time V _{TH_T2} <0).

Luminous stage:

The gate scanning lines V _N-1 and V _N both become high level, and both T3 and T4 are cut off. In the programming phase, the voltage of the first electrode of Cs is saved until the next frame scan. T1 supplies current to the OLED:

I=K(V _{GS_T1} -V _{TH_T1} ) ² ＝K(V _DATA +V _{TH_T2} -V _DD -V _{TH_T1} ) ²

Since T1 and T2 are adjacent in position and adopt the same process, it can be considered that the threshold voltages of the two are equal, that is, V _{TH_T2} = V _{TH_T1} , so the above formula can be simplified as:

I＝K(V _DATA -V _DD ) ² (1)

It can be seen from the above formula that the OLED current has nothing to do with the TFT threshold voltage _VTH , so as to compensate the problem of uneven brightness caused by the uneven threshold voltage of the polysilicon TFT panel. Additional gate scanning lines are required, which greatly simplifies the peripheral driver IC, and at the same time reduces the complexity of pixel wiring.

Embodiment seven:

As shown in FIG. 6 , the difference between the seventh embodiment and the sixth embodiment is that the first power supply is the anode voltage of the OLED, that is, the second electrode of the capacitor C _s is connected to the anode of the OLED.

The working process of the circuit of the seventh embodiment is the same as that of the sixth embodiment, and will not be repeated here.

Embodiment eight:

As shown in FIG. 7 , the difference between the eighth embodiment and the sixth embodiment is that the first power supply is grounded, that is, the second electrode of the capacitor C _s is grounded.

The working process of the circuit in the eighth embodiment is the same as that in the sixth embodiment, and will not be repeated here.

T1 , T2 , T3 , and T4 in the foregoing sixth to eighth embodiments are P-channel polysilicon TFTs; in other implementation manners, the transistors of the pixel circuit may also be complementary, such as Embodiment 9.

Embodiment nine:

In the ninth embodiment shown in Figure 9a, the circuit structure is roughly the same as that of the sixth embodiment, except that T1 and T2 are N-channel TFTs, and T3 and T4 are P-channel TFTs; at this time, the data signal line V _DATA adopts the data voltage line of the full P-channel TFT pixel circuit described in Embodiment 6; and the gate scan line, that is, V _N-1 and V _N adopts the gate scan signal of the full N-channel TFT pixel circuit described in Embodiment 1. and, controlling the effective turn-on levels of the third transistor T3 and the fourth transistor T4 to be high level.

The driving timing of Embodiment 9 is shown in Figure 9b. Similar to the analysis of the previous embodiments, this circuit can also effectively compensate for the influence of uneven threshold voltage in the pixel circuit, and the control signal uses the gate scanning line between the upper and lower pixels. No extra scan lines are added.

In summary, the all N-channel polysilicon TFT pixel drive circuit, the all P-channel polysilicon TFT pixel drive circuit and the complementary channel polysilicon TFT pixel drive circuit proposed by the embodiments of the present invention have the following advantages:

(1) Only four polysilicon thin film transistors and a capacitor are needed; compared with other pixel circuits with similar structure capable of compensating threshold voltage, the circuit of the present invention can not only compensate the influence of TFT threshold voltage unevenness on panel brightness, but also On the premise of reducing one or two transistors, the same function can be realized, so the complexity and cost of the pixel can be reduced, and the aperture ratio of the pixel can be increased.

(2) The embodiments of the present invention can compensate the uneven brightness caused by the uneven threshold voltage in the pixel circuit. Among them, only one type of TFT (N-channel or P-channel) is used in the all-N-channel or all-P-channel TFT pixel drive circuit, the process is relatively simple and the cost is low; all N-channel TFTs and complementary In the pixel circuit of TFT, the low-level duration of the gate scanning signal occupies most of the period, and the duty cycle is very small, which is easier to realize; the pixel circuit using P-channel TFT and complementary TFT has a drive tube of a P-channel device, Under long-term bias, the characteristics of P-channel devices are more stable.

(3) The driving timing of the circuit adopts the gate scanning signals of the upper and lower pixels: the gate signals V _N-1 and V _N in the circuit become high level (or low level) in turn during the entire frame scanning process, and the high level The flat (or low) phases do not overlap each other. Therefore, the gate signal of the previous level of pixels can be used as the V _N-1 of the pixels in this row, and the gate scanning line V _N of this row provides the gate driving signal for the pixels of the current level and is also used as V _N-1 of the pixels in the next row. . This is equivalent to using only one gate scan signal for each level of pixels without adding additional gate scan lines; compared with circuits that require several gate signals, this circuit greatly simplifies the peripheral gate drive circuit and also reduces the number of pixels. Wiring complexity.

The above-mentioned embodiments are described according to the situation that the light-emitting device has been connected. In other embodiments, the pixel circuit that does not include the light-emitting device can also be fabricated on the substrate first, leaving a connection terminal connected to the light-emitting device. , and then make the light-emitting device, and connect the light-emitting device and the pixel circuit during the assembly process.

The foregoing embodiments can be applied to a display device, as shown in FIG. 10 , including:

a plurality of scan lines arranged in a first direction;

A scanning driving circuit, used to generate scanning signals, the output ends of which are respectively connected to a plurality of scanning lines;

a plurality of data lines arranged in a second direction;

A data drive circuit, used to generate data signals, the output ends of which are respectively connected to a plurality of data lines;

A plurality of pixel circuits as described in the above embodiment, the pixel circuits are arranged between the intersecting scanning lines and data lines.

In this display device, the gate scan line V _N-1 of the previous row is drawn from the scan line of the current row (N-1 row) of pixels in the N-th row of pixels, and V _N-1 becomes an effective open voltage in the driving process. Level (high level or low level, depending on the specific TFT used), the effective turn-on level lasts for a period of time before flipping; the gate scanning line V _N of this row provides scanning signals for the pixels in the Nth row, during the driving process V _N flips to an effective on-level after V _N-1 changes from an effective on-level to an inverting level, and lasts for the same time as the effective on-level of V _{N -1} ; A previous row of raster scan lines for the next row (N+1) of pixels, where N is a natural number. In one embodiment, there is a row of grid scan lines before the first row of pixels used as V _N-1 of the first row of pixels; for example, there are 320 rows of pixels, and 321 rows of grid scan lines need to exist in the embodiment, wherein row 0 The gate scanning line is used as V _N-1 of the pixels in the first row.

The aforementioned various embodiments, including the pixel circuit embodiment and the display device embodiment, the gate scanning lines V _N and V _N-1 of the upper and lower pixels used in it can also be such as V in other pixel circuit embodiments or display device embodiments. The raster scan lines in the form of _N and V _N+1 , etc., wherein V _N is the raster scan line of the current row of pixels, and V _N+1 is the next row of raster scan lines of the current row of pixels. At this time, the data signal V _DATA should be delayed by one scanning line's gate time so as to cooperate with the scanning line signal to provide a data voltage for the pixel.

The above content is a further detailed description of the present invention in conjunction with specific embodiments, and it cannot be assumed that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deduction or replacement can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (7)

1. image element circuit, it is disposed in the sweep trace that is used for supply control signal arranged with first direction and comprises between the data line of supplies data signals with second direction being used for of arranging:

The 4th transistor is for the data-signal of the described data line supply of sampling;

Electric capacity;

The first transistor, it is luminous to be used for driving luminescent device;

Characterized by further comprising: be used for providing power lead, transistor seconds and the 3rd transistor of power supply, wherein,

The described the 4th transistorized control utmost point is connected to the sweep trace that this image element circuit is expert at, the second current lead-through utmost point is connected to described data line, the first current lead-through utmost point is connected to the second current lead-through utmost point of described transistor seconds, is used at the data-signal of the valid period of given sequential conducting with the described data line supply of sampling;

The first electrode of described electric capacity connects respectively the control utmost point of described the first transistor and the control utmost point of described transistor seconds, is used to described the first transistor and described transistor seconds that cut-in voltage is provided, and the second electrode is connected to the first power supply;

Described the first transistor is connected between described power lead and the ground by its first current lead-through utmost point and the second current lead-through utmost point, and provides electric current for luminescent device under the Control of Voltage of the first electrode of described electric capacity;

The first current lead-through utmost point of described transistor seconds is joined together to form diode with its control utmost point and is connected;

The described the 3rd transistorized control utmost point is connected to the sweep trace of the previous row that this image element circuit is expert at, the second current lead-through utmost point is connected to the first electrode of described electric capacity with the control utmost point of the first current lead-through utmost point of transistor seconds, the control utmost point and the first transistor, and the first current lead-through utmost point is connected to second source;

Wherein, described the first transistor adopts identical technique with described transistor seconds; In addition, described the first transistor, described transistor seconds, described the 3rd transistor, described the 4th transistor are N raceway groove polycrystalline SiTFT; Perhaps, described the first transistor, described transistor seconds, described the 3rd transistor, described the 4th transistor are P raceway groove polycrystalline SiTFT; Perhaps, described the first transistor and described transistor seconds are P raceway groove polycrystalline SiTFT, and described the 3rd transistor and described the 4th transistor are N raceway groove polycrystalline SiTFT.

2. image element circuit as claimed in claim 1 is characterized in that, also comprises: luminescent device, described luminescent device and described the first transistor are connected between described power lead and the ground.

3. image element circuit as claimed in claim 2 is characterized in that, the plus earth of described luminescent device, and anodic bonding is to the second current lead-through utmost point of described the first transistor; The first current lead-through utmost point of described the first transistor links to each other with described power lead; Described second source is described power lead; Described the first power supply is ground or for the anode of described luminescent device or be described power lead.

4. image element circuit as claimed in claim 2 is characterized in that, the anode of described luminescent device is connected with described power lead, and its negative electrode is connected to the first current lead-through utmost point of described the first transistor; The second current lead-through utmost point ground connection of described the first transistor; Described second source is described power lead; Described the first power supply is ground or is described power lead.

5. image element circuit as claimed in claim 2 is characterized in that, the plus earth of described luminescent device, and its anodic bonding is to the second current lead-through utmost point of described the first transistor; The first current lead-through of described the first transistor extremely directly links to each other with described power lead; Described second source is ground; Described the first power supply is ground or for the anode of described luminescent device or be described power lead.

6. such as each described image element circuit of claim 2 to 5, it is characterized in that: described luminescent device is Organic Light Emitting Diode.

7. display device comprises:

Multi-strip scanning line with the first direction arrangement;

Scan drive circuit, for generation of sweep signal, its output terminal is connected with the multi-strip scanning line respectively;

Many data lines with the second direction arrangement;

Data drive circuit, for generation of data-signal, its output terminal is connected with many data lines respectively;

It is characterized in that also comprise a plurality ofly such as each described image element circuit of claim 1-6, described image element circuit is disposed between the described sweep trace and described data line that intersects.

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