CN102739250A - Current Corrected Digital-to-Analog Converter - Google Patents
Current Corrected Digital-to-Analog Converter Download PDFInfo
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- CN102739250A CN102739250A CN2011100945430A CN201110094543A CN102739250A CN 102739250 A CN102739250 A CN 102739250A CN 2011100945430 A CN2011100945430 A CN 2011100945430A CN 201110094543 A CN201110094543 A CN 201110094543A CN 102739250 A CN102739250 A CN 102739250A
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Abstract
The invention relates to a current correction digital-to-analog converter, which comprises a signal sending set, a digital-to-analog conversion circuit, a current compensation circuit and a voltage output end, the signal transmitting set has a plurality of control signal terminals, the digital-to-analog converting circuit has a first inverter set, a first transistor set and a resistor, the first inverter set is electrically connected to the signal transmitting set, the first transistor set is electrically connected to the first inverter set, the resistor is electrically connected to the first transistor set, the current compensation circuit has an AND gate set, a second inverter set and a second transistor set, the AND gate set is electrically connected to the control signal terminals of the signal transmission set, the second inverter set is electrically connected to the AND gate set, the second transistor set is electrically connected with the second inverter set, and the first transistor, the second transistor and the resistor are electrically connected with the voltage output end.
Description
Technical field
The present invention relates to a kind of digital analog converter, particularly relate to a kind of current correction digital analog converter.
Background technology
Digital analog converter is for converting one or more groups digital signal into the conversion equipment of analog signal; The analog output signal of digital analog converter very easily receives the influence of external environment, technology drift and circuit design and produces the phenomenon of signal bias; So will significantly influence the linearity of analog output signal; Therefore the differential type digital analog converter that is disclosed for 7242338B2 number like United States Patent (USP) is in order to improve this phenomenon; See also Fig. 4; This differential type digital analog converter 20 has one first signal input buffer device 21, a secondary signal input buffer 22, a plurality of bit switch 23, at least one thermometer-code switch 24, a plurality of R-2R electric resistance structure 25, one first output 26 and one second output 27; Wherein those bit switches 23 and this thermometer-code switch 24 electrically connect this first signal input buffer device 21 and this secondary signal input buffer 22; Respectively this R-2R electric resistance structure 25 electrically connects respectively this bit switch 23 and this thermometer-code switch 24; This first output 26 and this second output 27 electrically connect those R-2R electric resistance structures 25; This differential type digital analog converter 20 by those bit switches 23 to determine whether this first signal input buffer device 21 and this secondary signal input buffer 22 import one first reference signal and one second reference signal respectively to compensate the terminal voltage of this first output 26 and this second output 27; Only, those R-2R electric resistance structures 25 are easy to receive the influence of technology drift and make resistance value between R to 2R, change, and respectively the situation that do not match between this R-2R electric resistance structure 25 will significantly reduce the linearity of this differential digital analog converter 20.
This shows that above-mentioned existing digital analog converter obviously still has inconvenience and defective, and demands urgently further improving in structure and use.In order to solve the problem of above-mentioned existence; Relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly; But do not see always that for a long time suitable design is developed completion, and common product does not have appropriate structure to address the above problem, this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of new Digital analog converter, real one of the current important research and development problem that belongs to, also becoming the current industry utmost point needs improved target.
Summary of the invention
Main purpose of the present invention is; A kind of current correction digital analog converter is provided; By this current compensation circuit this D/A conversion circuit is carried out the current compensation action; And adopt this first control signal end, this second control signal end, the 3rd control signal end, the 4th control signal end and the 5th control signal end current compensation input as this current compensation circuit; The electric connection design that should reach the lock group by those control signal ends and this current compensation circuit can effectively promote the electric current linearity of this D/A conversion circuit, and make this digital analog converter reach the effect of high accurancy and precision.
The object of the invention and solve its technical problem and adopt following technical scheme to realize.A kind of current correction digital analog converter according to the present invention's proposition; It comprises: a signal transmission group, and it has one first control signal end, one second control signal end, one the 3rd control signal end, one the 4th control signal end and one the 5th control signal end; One D/A conversion circuit; It has one first inverter group, a first transistor group and a resistance; This first inverter group electrically connects this signal transmission group, and this first transistor group electrically connects this first inverter group, and this resistance electrically connects this first transistor group; One current compensation circuit; It has one and lock group, one second inverter group and a transistor seconds group; Should reach this first control signal end, this second control signal end, the 3rd control signal end, the 4th control signal end and the 5th control signal end that the lock group electrically connects this signal transmission group; This second inverter group is to electrically connect to reach the lock group, and this transistor seconds group is to electrically connect this second inverter group; And a voltage output end, this first transistor group, this resistance and this transistor seconds group electrically connect this voltage output end.
The object of the invention and solve its technical problem and also can adopt following technical measures further to realize.
Aforesaid current correction digital analog converter; Wherein said current compensation circuit should and the lock group have one first and lock, one second and lock, the 3rd and lock, the 4th and lock, the 5th and lock, the 6th and lock, the 7th and lock, the 8th and lock, the 9th and lock and the tenth and lock; Wherein this first and lock electrically connect this first control signal end and this second control signal end; This second and lock electrically connect this first control signal end and the 3rd control signal end; The 3rd and lock electrically connect the 4th control signal end; The 4th and lock electrically connect the 4th control signal end and the 5th control signal end, the 5th and lock electrically connect the 3rd control signal end and the 5th control signal end, the 6th and lock electrically connect the 3rd control signal end and the 4th control signal end; This first and lock have an output, this output electrically connects the 3rd and lock, the 7th and lock, the 8th and lock, the 9th and lock and the tenth and lock.
Aforesaid current correction digital analog converter; This of wherein said current compensation circuit second inverter group has one first inverter, one second inverter, one the 3rd inverter, one the 4th inverter, one the 5th inverter, a hex inverter and one the 7th inverter; This first inverter electrically connect this first and lock, this second inverter electrically connect this second and lock, the 3rd inverter electrically connects the 3rd and lock; Electric connection the 7th of the 4th inverter and lock; Electric connection the 8th of the 5th inverter and lock, this hex inverter electric connection the 9th and lock, electric connection the tenth of the 7th inverter and lock.
Aforesaid current correction digital analog converter; This transistor seconds group of wherein said current compensation circuit has a first transistor, a transistor seconds, one the 3rd transistor, one the 4th transistor, one the 5th transistor, one the 6th transistor, one the 7th transistor, one the 8th transistor, one the 9th transistor, 1 the tenth transistor, 1 the 11 transistor, 1 the tenth two-transistor, 1 the 13 transistor and 1 the 14 transistor; This first inverter electrically connects this first transistor; This second inverter electrically connects this transistor seconds, and the 3rd inverter electrically connects the 3rd transistor, and the 4th inverter electrically connects the 4th transistor; The 5th inverter electrically connects the 5th transistor; This hex inverter electrically connects the 6th transistor, and the 7th inverter electrically connects the 7th transistor, and the 8th transistor electrically connects this first transistor; The 9th transistor electrically connects this transistor seconds; The tenth transistor electrically connects the 3rd transistor, and the 11 transistor electrically connects the 4th transistor, and the tenth two-transistor electrically connects the 5th transistor; The 13 transistor electrically connects the 6th transistor, and the 14 transistor electrically connects the 7th transistor.
Aforesaid current correction digital analog converter; This first transistor group of wherein said D/A conversion circuit has a first transistor, a transistor seconds, one the 3rd transistor, one the 4th transistor, one the 5th transistor, one the 6th transistor, one the 7th transistor, one the 8th transistor, one the 9th transistor and 1 the tenth transistor; This first transistor electrically connects the 9th transistor; This transistor seconds electrically connects the tenth transistor, and the 3rd transistor, the 4th transistor, the 5th transistor, the 6th transistor, the 7th transistor, the 8th transistor, the 9th transistor and the tenth transistor electrically connect this resistance and this voltage output end.
Aforesaid current correction digital analog converter, it has a bias voltage input in addition, and this bias voltage input electrically connects this first transistor group and this transistor seconds group.
Aforesaid current correction digital analog converter; Wherein said signal transmission group has one the 6th control signal end, one the 7th control signal end and one the 8th control signal end in addition, and this inverter group electrically connects the 6th control signal end, the 7th control signal end and the 8th control signal end.
The present invention compared with prior art has tangible advantage and beneficial effect.
By technique scheme; Current correction digital analog converter of the present invention has advantage and beneficial effect at least: the present invention carries out the current compensation action by this current compensation circuit to this D/A conversion circuit; And adopt this first control signal end, this second control signal end, the 3rd control signal end, the 4th control signal end and the 5th control signal end current compensation input as this current compensation circuit; The electric connection design that should reach the lock group by those control signal ends and this current compensation circuit; Can effectively promote the electric current linearity of this D/A conversion circuit, and make this digital analog converter reach the effect of high accurancy and precision.
Above-mentioned explanation only is the general introduction of technical scheme of the present invention; Understand technological means of the present invention in order can more to know; And can implement according to the content of specification, and for let of the present invention above-mentioned with other purposes, feature and advantage can be more obviously understandable, below special act preferred embodiment; And conjunction with figs., specify as follows.
Description of drawings
Fig. 1 is according to preferred embodiment of the present invention, a kind of circuit block diagram of current correction digital analog converter.
Fig. 2 is according to preferred embodiment of the present invention, the circuit diagram of the D/A conversion circuit of this current correction digital analog converter.
Fig. 3 is according to preferred embodiment of the present invention, the circuit diagram of the current compensation circuit of this current correction digital analog converter.
Fig. 4 is the circuit diagram of the digital analog converter of existing convention.
10: the current correction digital analog converter
11: signal transmission group
112: the second control signal ends of 111: the first control signal ends
114: the four control signal ends of 113: the three control signal ends
116: the six control signal ends of 115: the five control signal ends
118: the eight control signal ends of 117: the seven control signal ends
12: D/A conversion circuit
121: the first inverter group
1212: the second inverters of 1211: the first inverters
1214: the four inverters of 1213: the three inverters
1216: the hex inverters of 1215: the five inverters
1218: the eight inverters of 1217: the seven inverters
122: the first transistor group
122a: the first transistor 122b: transistor seconds
122c: the 3rd transistor 122d: the 4th transistor
122e: the 5th transistor 122f: the 6th transistor
122g: the 7th transistor 122h: the 8th transistor
122i: the 9th transistor 122j: the tenth transistor
122k: the 11 transistor 122l: the tenth two-transistor
122m: the 13 transistor 122n: the 14 transistor
122o: the 15 transistor 122p: the 16 transistor
122q: the 17 transistor 122r: the 18 transistor
123: resistance
13: current compensation circuit
131: and the lock group
1311: the first and lock 1311a: output
1312: the second and lock 1313: the three and lock
1314: the four and lock 1315: the five and lock
1316: the six and lock 1317: the seven and lock
1318: the eight and lock 1319: the nine and lock
131a: the tenth and lock
132: the second inverter group
1321: the first inverter 1,322 second inverters
1323: the three inverter 1324 the 4th inverters
1326: the hex inverters of 1325: the five inverters
1327: the seven inverters
133: the transistor seconds group
133a: the first transistor 133b: transistor seconds
133c: the 3rd transistor 133d: the 4th transistor
133e: the 5th transistor 133f: the 6th transistor
133g: the 7th transistor 133h: the 8th transistor
133i: the 9th transistor 133j: the tenth transistor
133k: the 11 transistor 133l: the tenth two-transistor
133m: the 13 transistor 133n: the 14 transistor
14: voltage output end
15: the bias voltage input
20: the differential type digital analog converter
21: the first signal input buffer devices
22: the secondary signal input buffer
23: bit switch 24 thermometer-code switches
26: the first outputs of 25:R-2R electric resistance structure
27: the second outputs
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention; Below in conjunction with accompanying drawing and preferred embodiment; To its embodiment of current correction digital analog converter, structure, characteristic and the effect thereof that proposes according to the present invention, specify as after.
See also Fig. 1, Fig. 2 and shown in Figure 3; It is a preferred embodiment of the present invention; A kind of current correction digital analog converter 10 comprises a signal transmission group 11, a D/A conversion circuit 12, a current compensation circuit 13 and a voltage output end 14; This signal transmission group 11 has one first control signal end 111, one second control signal end 112, one the 3rd control signal end 113, one the 4th control signal end 114 and one the 5th control signal end 115; This D/A conversion circuit 12 has one first inverter group 121, a first transistor group 122 and a resistance 123; This first inverter group 121 electrically connects this signal transmission group 11; This first transistor group 122 electrically connects this first inverter group 121; This resistance 123 electrically connects these the first transistor groups 122, and this current compensation circuit 13 has one and lock group 131, one second inverter group 132 and a transistor seconds group 133, should and lock group 131 electrically connect these first control signal ends 111, this second control signal end 112, the 3rd control signal end 113, the 4th control signal end 114 and the 5th control signal end 115; This second inverter group 132 electrically connects and should reach lock group 131; This transistor seconds group 133 electrically connects this second inverter group 132, and this first transistor group 122, this transistor seconds group 133 and this resistance 123 electrically connect this voltage output end 14, in the present embodiment; (metal-oxide-semiconductor field-effect transistor MOSFET) constitutes by a plurality of metal-oxide half field effect transistors for this first transistor group 122 and this transistor seconds group 133.
Please consult Fig. 2 again; In the present embodiment; This signal transmission group 11 has one the 6th control signal end 116, one the 7th control signal end 117, and one the 8th control signal end 118 in addition; This first inverter group 121 is to electrically connect the 6th control signal end 116, the 7th control signal end 117 and the 8th control signal end 118; Respectively this transmitting terminal can provide a digital controlled signal; This first inverter group 121 have one electrically connect this first control signal end 111 first inverter 1211, second inverter 1212, that electrically connects this second control signal end 112 the 3rd inverter 1213, that electrically connects the 3rd control signal end 113 the 4th inverter 1214, that electrically connects the 4th control signal end 114 the 5th inverter 1215, that electrically connects the 5th control signal end 115 hex inverter 1216, that electrically connects the 6th control signal end 116 the 7th inverter 1217 and that electrically connects the 7th control signal end 117 electrically connect the 8th inverter 1218 of the 8th control signal end 118, please consult Fig. 2 again, this first transistor group 122 of this D/A conversion circuit 12 has a first transistor 122a, a transistor seconds 122b, one the 3rd transistor 122c, one the 4th transistor 122d, one the 5th transistor 122e, one the 6th transistor 122f, one the 7th transistor 122g, one the 8th transistor 122h, one the 9th transistor 122i and 1 the tenth transistor 122j; Respectively this inverter electrically connects respectively this transistor; Preferably, this first transistor 122a electrically connects the 9th transistor 122i, and this transistor seconds 122b electrically connects the tenth transistor 122j; The 3rd transistor 122c, the 4th transistor 122d, the 5th transistor 122e, the 6th transistor 122f, the 7th transistor 122g, the 8th transistor 122h, the 9th transistor 122i and the tenth transistor transistor 122j electrically connect this resistance 123 and this voltage output end 14; In the present embodiment, the 9th transistor 122i and the tenth transistor 122j are in order to increase output impedance, to alleviate the electric current change that this first control signal end 111 and this second control signal end 112 are caused when signal switches; Reducing noise disturbs; In addition, the drain electrode end of the 9th transistor 122i is highest significant position unit (Most Significant Bit, MSB) end; The drain electrode end of the 8th transistor 122h is (the Least Significant Bit of least significant bit unit; LSB) hold, please consult Fig. 2 again, this first transistor group 122 has the 11 transistor 122k of this first transistor of electric connection 122a, the tenth two-transistor 122l of this transistor seconds of electric connection 122b, the 13 transistor 122m of an electric connection the 3rd transistor 122c, the 14 transistor 122n of an electric connection the 4th transistor 122d, the 15 transistor 122o of an electric connection the 5th transistor 122e, the 16 transistor 122p of an electric connection the 6th transistor 122f, the 17 transistor 122q of an electric connection the 7th transistor 122g and the 18 transistor 122r of an electric connection the 8th transistor 122h in addition; In the present embodiment; This current correction digital analog converter 10 has a bias voltage input 15 in addition, and this bias voltage input 15 electrically connects this first transistor group 122 and this transistor seconds group 133, and this bias voltage input 15 is in order to produce a plurality of current sources; It is to increase with 2 power power that the size of those current sources is held to highest significant position unit end from least significant bit unit; In addition, those transistors can be considered a switch, and in order to the circulation that determines those current sources whether those switches.
Please consult Fig. 3 again, because the 6th control signal end 116, the 7th control signal end 117 and the 8th control signal end 118 be in the signal bias of control signal in the time interval and not obvious, so present embodiment is selected this first control signal end 111, this second control signal end 112, the 3rd control signal end 113, the 4th control signal end 114 and the 5th control signal end 115 current compensation input as this current compensation circuit 13; In the present embodiment, this current compensation circuit 13 should and lock group 131 have one first and lock 1311, one second and lock 1312, the 3rd and lock 1313, the 4th and lock 1314, the 5th and lock 1315, the 6th and lock 1316, the 7th and lock 1317, the 8th and lock 1318, the 9th and lock 1319 and the tenth and lock 131a, wherein this first and lock 1311 electrically connect this first control signal end 111 and this second control signal ends 112; This second and lock 1312 electrically connect that these first control signal ends 111 and the 3rd control signal end 113, the three and lock 1313 electrically connect the 4th control signal ends 114, the four and lock 1314 electrically connects the 4th control signal end 114 and the 5th control signal ends 115; The 5th and lock 1315 electrically connect the 3rd control signal ends 113 and the 5th control signal end 115, the six and lock 1316 and electrically connect the 3rd control signal end 113 and the 4th control signal ends 114, this first and lock 1311 have an output 1311a; This output 1311a electrically connects the 3rd and lock 1313, the 7th and lock 1317, the 8th and lock 1318, the 9th and lock 1319 and the tenth and lock 131a, please consults Fig. 3 again, and this second inverter group 132 of this current compensation circuit 13 has one first inverter 1321, one second inverter 1322, one the 3rd inverter 1323, one the 4th inverter 1324, one the 5th inverter 1325, a hex inverter 1326 and one the 7th inverter 1327; This first inverter 1321 electrically connect this first and lock 1311, this second inverter 1322 electrically connect this second and lock 1312, the three inverters 1323 electrically connect the 3rd and locks 1313; The 4th inverter 1324 electric connection the 7th and locks 1317; The 5th inverter 1325 electric connection the 8th and locks 1318, these hex inverter 1326 electric connections the 9th and lock 1319, the seven inverters 1327 electric connection the tenth and lock 131a; Please consult Fig. 3 again; This transistor seconds group 133 of this current compensation circuit 13 has a first transistor 133a, a transistor seconds 133b, one the 3rd transistor 133c, one the 4th transistor 133d, one the 5th transistor 133e, one the 6th transistor 133f, one the 7th transistor 133g, one the 8th transistor 133h, one the 9th transistor 133i, 1 the tenth transistor 133j, 1 the 11 transistor 133k, 1 the tenth two-transistor 133l, 1 the 13 transistor 133m and 1 the 14 transistor 133n, and this first inverter 1321 electrically connects this first transistor 133a, and this second inverter 1322 electrically connects this transistor seconds 133b; The 3rd inverter 1323 electrically connects the 3rd transistor 133c; The 4th inverter 1324 electrically connects the 4th transistor 133d, and the 5th inverter 1325 electrically connects the 5th transistor 133e, and this hex inverter 1326 electrically connects the 6th transistor 133f; The 7th inverter 1327 electrically connects the 7th transistor 133g; The 8th transistor 133h electrically connects this first transistor 133a, and the 9th transistor 133i electrically connects this transistor seconds 133b, and the tenth transistor 133j electrically connects the 3rd transistor 133c; The 11 transistor 133k electrically connects the 4th transistor 133d; The tenth two-transistor 133l electrically connects the 5th transistor 133e, and the 13 transistor 133m electrically connects the 6th transistor 133f, and the 14 transistor 133n electrically connects the 7th transistor 133g; Behind the current compensation via this current compensation circuit 13; The integral nonlinearity degree of this current correction digital analog converter 10 output bits (Integrated Non-linearity, INL) and differential nonlinearity (Differential Non-linearity DNL) all can be lower than 0.5LSB.
The present invention adopts this first control signal end 111, this second control signal end 112, the 3rd control signal end 113, the 4th control signal end 114 and the 5th control signal end 115 current compensation input as this current compensation circuit 13; The electric connection design that should reach lock group 131 by those control signal ends and this current compensation circuit 13; Make integral nonlinearity degree (the Integrated Non-linearity that this D/A conversion circuit 12 is produced; INL) and differential nonlinearity (Differential Non-linearity; DNL) all can be lower than 0.5LSB, reach the requirement of this current correction digital analog converter 10 of high accurancy and precision, high linearity.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction; Though the present invention discloses as above with preferred embodiment; Yet be not in order to limiting the present invention, anyly be familiar with the professional and technical personnel, in not breaking away from technical scheme scope of the present invention; When the technology contents of above-mentioned announcement capable of using is made a little change or is modified to the equivalent embodiment of equivalent variations; In every case be the content that does not break away from technical scheme of the present invention, to any simple modification, equivalent variations and modification that above embodiment did, all still belong in the scope of technical scheme of the present invention according to technical spirit of the present invention.
Claims (7)
1. current correction digital analog converter is characterized in that it comprises:
One signal transmission group, it has one first control signal end, one second control signal end, one the 3rd control signal end, one the 4th control signal end and one the 5th control signal end;
One D/A conversion circuit; It has one first inverter group, a first transistor group and a resistance; This first inverter group electrically connects this signal transmission group, and this first transistor group electrically connects this first inverter group, and this resistance electrically connects this first transistor group;
One current compensation circuit; It has one and lock group, one second inverter group and a transistor seconds group; Should reach this first control signal end, this second control signal end, the 3rd control signal end, the 4th control signal end and the 5th control signal end that the lock group electrically connects this signal transmission group; This second inverter group is to electrically connect to reach the lock group, and this transistor seconds group is to electrically connect this second inverter group; And
One voltage output end, this first transistor group, this resistance and this transistor seconds group electrically connect this voltage output end.
2. current correction digital analog converter according to claim 1; It is characterized in that wherein said current compensation circuit should and the lock group have one first and lock, one second and lock, the 3rd and lock, the 4th and lock, the 5th and lock, the 6th and lock, the 7th and lock, the 8th and lock, the 9th and lock and the tenth and lock; Wherein this first and lock electrically connect this first control signal end and this second control signal end; This second and lock electrically connect this first control signal end and the 3rd control signal end; The 3rd and lock electrically connect the 4th control signal end; The 4th and lock electrically connect the 4th control signal end and the 5th control signal end; The 5th and lock electrically connect the 3rd control signal end and the 5th control signal end; The 6th and lock electrically connect the 3rd control signal end and the 4th control signal end, this first and lock have an output, this output electrically connects the 3rd and lock, the 7th and lock, the 8th and lock, the 9th and lock and the tenth and lock.
3. current correction digital analog converter according to claim 2; This second inverter group that it is characterized in that wherein said current compensation circuit has one first inverter, one second inverter, one the 3rd inverter, one the 4th inverter, one the 5th inverter, a hex inverter and one the 7th inverter; This first inverter electrically connect this first and lock; This second inverter electrically connect this second and lock; Electric connection the 3rd of the 3rd inverter and lock, electric connection the 7th of the 4th inverter and lock, electric connection the 8th of the 5th inverter and lock; This hex inverter electric connection the 9th and lock, electric connection the tenth of the 7th inverter and lock.
4. current correction digital analog converter according to claim 3; This transistor seconds group that it is characterized in that wherein said current compensation circuit has a first transistor, a transistor seconds, one the 3rd transistor, one the 4th transistor, one the 5th transistor, one the 6th transistor, one the 7th transistor, one the 8th transistor, one the 9th transistor, 1 the tenth transistor, 1 the 11 transistor, 1 the tenth two-transistor, 1 the 13 transistor and 1 the 14 transistor; This first inverter electrically connects this first transistor; This second inverter electrically connects this transistor seconds, and the 3rd inverter electrically connects the 3rd transistor, and the 4th inverter electrically connects the 4th transistor; The 5th inverter electrically connects the 5th transistor; This hex inverter electrically connects the 6th transistor, and the 7th inverter electrically connects the 7th transistor, and the 8th transistor electrically connects this first transistor; The 9th transistor electrically connects this transistor seconds; The tenth transistor electrically connects the 3rd transistor, and the 11 transistor electrically connects the 4th transistor, and the tenth two-transistor electrically connects the 5th transistor; The 13 transistor electrically connects the 6th transistor, and the 14 transistor electrically connects the 7th transistor.
5. current correction digital analog converter according to claim 1; This first transistor group that it is characterized in that wherein said D/A conversion circuit has a first transistor, a transistor seconds, one the 3rd transistor, one the 4th transistor, one the 5th transistor, one the 6th transistor, one the 7th transistor, one the 8th transistor, one the 9th transistor and 1 the tenth transistor; This first transistor electrically connects the 9th transistor; This transistor seconds electrically connects the tenth transistor, and the 3rd transistor, the 4th transistor, the 5th transistor, the 6th transistor, the 7th transistor, the 8th transistor, the 9th transistor and the tenth transistor electrically connect this resistance and this voltage output end.
6. current correction digital analog converter according to claim 1 is characterized in that it has a bias voltage input in addition, and this bias voltage input electrically connects this first transistor group and this transistor seconds group.
7. current correction digital analog converter according to claim 1; It is characterized in that wherein said signal transmission group has one the 6th control signal end, one the 7th control signal end and one the 8th control signal end in addition, this inverter group electrically connects the 6th control signal end, the 7th control signal end and the 8th control signal end.
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| CN104298287A (en) * | 2013-07-17 | 2015-01-21 | 联发科技（新加坡）私人有限公司 | Current correcting method and device and resistance correcting method and device |
| CN104298287B (en) * | 2013-07-17 | 2016-04-20 | 联发科技（新加坡）私人有限公司 | Current correction method and device and resistance bearing calibration and device |
| CN104734719A (en) * | 2014-01-06 | 2015-06-24 | 南台科技大学 | Digital-to-analog conversion device and method |
| CN104734719B (en) * | 2014-01-06 | 2017-09-29 | 南台科技大学 | Digital-to-analog conversion device and method |
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