CN102569559B - Method for manufacturing an array of light emitting elements - Google Patents
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- CN102569559B CN102569559B CN201210014943.0A CN201210014943A CN102569559B CN 102569559 B CN102569559 B CN 102569559B CN 201210014943 A CN201210014943 A CN 201210014943A CN 102569559 B CN102569559 B CN 102569559B
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Abstract
Description
本申请是申请号为200810169439.1、发明名称为“制造发光元件阵列的方法”的发明专利申请的分案申请。This application is a divisional application of the invention patent application with the application number 200810169439.1 and the invention title "Method for Manufacturing Light-Emitting Element Array".
技术领域 technical field
本发明涉及一种发光元件阵列的制造方法,特别是涉及一种具有绝缘层封闭沟槽的发光元件阵列。The invention relates to a method for manufacturing a light-emitting element array, in particular to a light-emitting element array with grooves closed by an insulating layer.
背景技术 Background technique
发光二极管(Light Emitting Diode;LED)是一种固态物理半导体元件,发光二极管阵列(LED Array)具有多个LED,依需求做适当的串联或并联。在串联或并联前,需要先形成沟槽以区隔各个LED,接着在沟槽及LED之间形成绝缘层以电绝缘各个LED,再形成电连接线在绝缘层之上并电连接各个LED的电极,以达成串联或并联。然而由于沟槽的尺寸影响,例如沟槽的深度太深,导致在沟槽的侧壁上形成电连接线时会出现断线或电连接不良的现象。已知的解决方法是采用增加电连接线的厚度以填满沟槽或是完整地覆盖在沟槽侧壁上,以达到良好的电连接;但是增加电连接线的厚度也同时增加生产的成本。A light emitting diode (Light Emitting Diode; LED) is a solid-state physical semiconductor component. A light emitting diode array (LED Array) has multiple LEDs, which can be connected in series or in parallel as required. Before connecting in series or in parallel, it is necessary to form a groove to separate each LED, then form an insulating layer between the groove and the LED to electrically insulate each LED, and then form an electrical connection line on the insulating layer and electrically connect each LED. electrodes for series or parallel connection. However, due to the influence of the size of the trench, for example, the depth of the trench is too deep, disconnection or poor electrical connection may occur when electrical connection lines are formed on the sidewall of the trench. The known solution is to increase the thickness of the electrical connection line to fill the trench or completely cover the sidewall of the trench to achieve good electrical connection; but increasing the thickness of the electrical connection line also increases the production cost .
发明内容 Contents of the invention
一种制造发光元件阵列的方法,包含:提供基板;形成发光叠层于该基板之上,其中该发光叠层包含:第一半导体层,位于该基板之上;发光层,位于该第一半导体层之上;及第二半导体层,位于该发光层之上;形成至少一沟槽于该基板之上,其中该沟槽曝露部分该基板,并将该发光叠层分隔成至少一第一发光元件与第二发光元件;及形成绝缘层于该发光叠层与该沟槽之上,该沟槽的宽度不大于两倍的该绝缘层的厚度。A method of manufacturing a light-emitting element array, comprising: providing a substrate; forming a light-emitting stack on the substrate, wherein the light-emitting stack includes: a first semiconductor layer located on the substrate; a light-emitting layer located on the first semiconductor layer layer; and a second semiconductor layer, located on the light-emitting layer; forming at least one groove on the substrate, wherein the groove exposes a portion of the substrate, and separates the light-emitting stack into at least one first light-emitting an element and a second light-emitting element; and forming an insulating layer on the light-emitting stack and the trench, the width of the trench is not greater than twice the thickness of the insulating layer.
一种制造发光元件阵列的方法,包含提供基板;形成发光叠层于基板之上,其中发光叠层包含第一半导体层,位于基板之上;发光层,位于第一半导体层之上;及第二半导体层,位于发光层之上。移除部分发光叠层以形成至少一沟槽,其中沟槽曝露部分基板,并将发光叠层划分成第一发光元件与第二发光元件。移除部分第一发光元件的第二半导体层与发光层与第二发光元件的第二半导体层与发光层,以曝露部分第一发光元件的第一半导体层与第二发光元件的第一半导体层。接着形成第二电极于第二半导体层之上,与第一电极于暴露的第一半导体层之上。形成绝缘层于发光叠层与沟槽之上,绝缘层大致封闭沟槽以于沟槽之中形成至少一空洞,并暴露第一电极与第二电极。形成电连接线电连接第一发光元件的第一电极与第二发光元件的第二电极。A method of manufacturing a light-emitting element array, comprising providing a substrate; forming a light-emitting stack on the substrate, wherein the light-emitting stack includes a first semiconductor layer and is located on the substrate; a light-emitting layer is located on the first semiconductor layer; and The second semiconductor layer is located on the light emitting layer. Part of the light-emitting stack is removed to form at least one groove, wherein the groove exposes part of the substrate, and the light-emitting stack is divided into a first light-emitting element and a second light-emitting element. removing part of the second semiconductor layer and the light emitting layer of the first light emitting element and the second semiconductor layer and the light emitting layer of the second light emitting element to expose part of the first semiconductor layer of the first light emitting element and the first semiconductor of the second light emitting element layer. Then forming a second electrode on the second semiconductor layer, and a first electrode on the exposed first semiconductor layer. An insulating layer is formed on the light emitting stack and the trench, the insulating layer substantially closes the trench to form at least one cavity in the trench, and exposes the first electrode and the second electrode. An electrical connection line is formed to electrically connect the first electrode of the first light-emitting element and the second electrode of the second light-emitting element.
一种发光元件阵列,包含基板;第一发光元件,位于基板之上;第二发光元件,位于基板之上;至少一沟槽,分隔第一发光元件与第二发光元件;以及绝缘层,大致封闭沟槽以形成至少一空洞于沟槽之中。A light-emitting element array, comprising a substrate; a first light-emitting element located on the substrate; a second light-emitting element located on the substrate; at least one groove separating the first light-emitting element and the second light-emitting element; and an insulating layer roughly The trench is closed to form at least one cavity in the trench.
附图说明 Description of drawings
图1为显示依据本发明实施例的发光元件阵列的制造流程剖面图。FIG. 1 is a cross-sectional view showing a manufacturing process of a light emitting element array according to an embodiment of the present invention.
图2为显示依据本发明实施例的沟槽的剖面图。FIG. 2 is a cross-sectional view showing a trench according to an embodiment of the present invention.
图3为显示依据本发明另一实施例的沟槽的剖面图。FIG. 3 is a cross-sectional view showing a trench according to another embodiment of the present invention.
图4为显示依据本发明另一实施例的沟槽的剖面图。FIG. 4 is a cross-sectional view showing a trench according to another embodiment of the present invention.
图5为显示利用本发明实施例的发光元件阵列组成的光源产生装置的示意图。FIG. 5 is a schematic diagram showing a light source generating device composed of an array of light emitting elements according to an embodiment of the present invention.
图6为显示利用本发明实施例的发光元件阵列组成的背光模块的示意图。FIG. 6 is a schematic diagram showing a backlight module composed of an array of light emitting elements according to an embodiment of the present invention.
附图标记说明Explanation of reference signs
1:发光元件阵列 10:基板1: Light-emitting element array 10: Substrate
12:发光叠层 122:第一半导体层12: Light emitting stack 122: The first semiconductor layer
124:发光层 126:第二半导体层124: Light-emitting layer 126: Second semiconductor layer
14:沟槽 142、144、146:空洞14: Groove 142, 144, 146: Hollow
16:绝缘层 15:第一电极16: insulating layer 15: first electrode
17:第二电极 11:第一发光元件17: Second electrode 11: First light emitting element
13:第二发光元件 2:光源产生装置13: Second light-emitting element 2: Light source generating device
21:光源 22:电源供应系统21: Light source 22: Power supply system
23:控制元件 3:背光模块23: Control element 3: Backlight module
31:光学元件 18:电连接线31: Optical components 18: Electrical connection wires
w:宽度 t:厚度w: width t: thickness
具体实施方式 Detailed ways
如图1所示,提供发光二极管1的晶片,包含基板10;发光叠层12,形成于基板10之上,其中发光叠层12至少包含第一半导体层122、活性层124与第二半导体层126。移除部分发光叠层12以形成沟槽14,其中沟槽14曝露部分基板10,并将发光叠层12分隔成第一发光元件11与第二发光元件13,移除的方式包含但不限于蚀刻。移除部分第一发光元件11与第二发光元件13的第二半导体层126与发光层124以曝露部分第一半导体层122,其中移除的方式包含但不限于感应耦合式等离子体蚀刻(InductivelyCoupled Plasma;ICP)。此时沟槽14两侧的第一半导体层122的上表面约略在同一水平面,即第一发光元件11的第一半导体层122的上表面与基板10的距离与第二发光元件13的第一半导体层122的上表面与基板10的距离大约相同,亦或是沟槽14两侧侧壁的高度约略相等。然后形成第一电极15在第一半导体层122的上表面,与第二电极17在第二半导体层126的上表面。接着形成绝缘层16于沟槽14、第一发光元件11与第二发光元件13之上,但裸露出第一电极15与第二电极17,其中绝缘层16的形成方式包含但不限于电子束蒸镀法(E-Gun)、溅镀法(Sputtering)或等离子体增强化学气相沉积法(PECVD)。最后形成电连接线18于绝缘层16之上,以电连接第一发光元件11的第一电极15与第二发光元件13的第二电极17,其中电连接线18的形成方式包含蒸镀、化学镀或电镀,例如物理气相沉积法(PVD),化学气相沉积法(CVD),有机金属化学气相沉积法(MOCVD),电子束蒸镀法(E-Gun)或等离子体增强化学气相沉积法(PECVD)。如图2所示,绝缘层16大致封闭沟槽14以形成空洞142于沟槽14之中,其中沟槽14的宽度w不大于第一半导体层122上的绝缘层16的厚度t的两倍。绝缘层在形成时具有侧向成长的特性,换言之,绝缘层材料在水平方向的成长速率大于垂直方向的成长速率,使绝缘层16于形成时可大致封闭沟槽14,防止电连接线18形成于沟槽14的侧壁上,避免断线或电连接不良。As shown in FIG. 1 , a wafer of light-emitting diodes 1 is provided, including a substrate 10; a light-emitting stack 12 is formed on the substrate 10, wherein the light-emitting stack 12 includes at least a first semiconductor layer 122, an active layer 124, and a second semiconductor layer. 126. Removing part of the light-emitting stack 12 to form a trench 14, wherein the trench 14 exposes part of the substrate 10, and separates the light-emitting stack 12 into a first light-emitting element 11 and a second light-emitting element 13. The removal method includes but is not limited to etch. Removing part of the second semiconductor layer 126 and the light emitting layer 124 of the first light emitting element 11 and the second light emitting element 13 to expose part of the first semiconductor layer 122, wherein the removal method includes but not limited to inductively coupled plasma etching (InductivelyCoupled Plasma; ICP). At this time, the upper surfaces of the first semiconductor layer 122 on both sides of the trench 14 are approximately at the same level, that is, the distance between the upper surface of the first semiconductor layer 122 of the first light-emitting element 11 and the substrate 10 is the same as that of the first light-emitting element 13 . The distance between the upper surface of the semiconductor layer 122 and the substrate 10 is about the same, or the heights of the sidewalls on both sides of the trench 14 are about the same. Then the first electrode 15 is formed on the upper surface of the first semiconductor layer 122 , and the second electrode 17 is formed on the upper surface of the second semiconductor layer 126 . Next, an insulating layer 16 is formed on the trench 14, the first light-emitting element 11 and the second light-emitting element 13, but the first electrode 15 and the second electrode 17 are exposed, wherein the insulating layer 16 is formed in a manner including but not limited to electron beam Evaporation (E-Gun), sputtering (Sputtering) or plasma enhanced chemical vapor deposition (PECVD). Finally, an electrical connection line 18 is formed on the insulating layer 16 to electrically connect the first electrode 15 of the first light-emitting element 11 and the second electrode 17 of the second light-emitting element 13, wherein the formation method of the electrical connection line 18 includes evaporation, Electroless or electroplating, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), metalorganic chemical vapor deposition (MOCVD), electron beam evaporation (E-Gun) or plasma enhanced chemical vapor deposition (PECVD). As shown in FIG. 2 , the insulating layer 16 substantially closes the trench 14 to form a cavity 142 in the trench 14, wherein the width w of the trench 14 is not greater than twice the thickness t of the insulating layer 16 on the first semiconductor layer 122 . The insulating layer has a characteristic of lateral growth during formation, in other words, the growth rate of the insulating layer material in the horizontal direction is greater than the growth rate in the vertical direction, so that the insulating layer 16 can roughly close the trench 14 when it is formed, preventing the formation of the electrical connection line 18 On the sidewalls of the trench 14 , avoid disconnection or poor electrical connection.
基板10的材料包含但不限于铜(Cu)、钨(W)、氮化铝(AlN)、金属基复合材料(Metal Matrix Composite;MMC)、陶瓷基复合材料(Ceramic MatrixComposite;CMC)、碳化硅(SiC)、铝(Al)、硅(Si)、钻石(Diamond)、砷化镓铝(AlGaAs)、磷化镓(GaP)、氮化铝(AlN)、氧化锂铝(LiAlO2)、碳化硅(SiC)、氧化锌(ZnO)、磷化铟(InP)、氮化铝(AlN)、蓝宝石(Sapphire)、玻璃(Glass),其他透明材料或此等材料的组合。基板10的材料优选为电绝缘材料,若为导电材料,电绝缘层(未显示)形成于基板10与发光叠层12之间以电绝缘第一发光元件11与第二发光元件13。The material of the substrate 10 includes but not limited to copper (Cu), tungsten (W), aluminum nitride (AlN), metal matrix composite (Metal Matrix Composite; MMC), ceramic matrix composite (Ceramic Matrix Composite; CMC), silicon carbide (SiC), aluminum (Al), silicon (Si), diamond (Diamond), gallium aluminum arsenide (AlGaAs), gallium phosphide (GaP), aluminum nitride (AlN), lithium aluminum oxide (LiAlO 2 ), carbide Silicon (SiC), zinc oxide (ZnO), indium phosphide (InP), aluminum nitride (AlN), sapphire (Sapphire), glass (Glass), other transparent materials or a combination of these materials. The material of the substrate 10 is preferably an electrically insulating material. If it is a conductive material, an electrically insulating layer (not shown) is formed between the substrate 10 and the light-emitting stack 12 to electrically insulate the first light-emitting element 11 and the second light-emitting element 13 .
发光叠层12的材料包含但不限于一种或一种以上的物质,如镓(Ga)、铝(Al)、铟(In)、砷(As)、磷(P)、氮(N)或硅(Si)。绝缘层16的材料为电绝缘材料,例如聚酰亚胺(PI)、过氟环丁烷(PFCB)、旋涂玻璃、Su8、苯并环丁烯(BCB)、环氧树脂(Epoxy)、丙烯酸树脂(Acrylic Resin)、环烯烃聚合物(COC)、聚甲基丙烯酸甲酯(PMMA)、聚对苯二甲酸二乙酯(PET)、聚碳酸酯(PC)、聚醚酰亚胺(Polyetherimide)、氟碳聚合物(FluorocarbonPolymer)、硅胶(Silicone)、玻璃、氧化铝(Al2O3)、氮化硅(SiNx)、氧化硅(SiO2)、氧化钛(TiO2)、上述材料的组合或其他透明绝缘材料。电连接线18的材料为导电材料,例如金(Au)、铜(Cu)、镍(Ni)或上述材料的组合。The material of the light emitting stack 12 includes but not limited to one or more substances, such as gallium (Ga), aluminum (Al), indium (In), arsenic (As), phosphorus (P), nitrogen (N) or Silicon (Si). The material of the insulating layer 16 is an electrical insulating material, such as polyimide (PI), perfluorocyclobutane (PFCB), spin-on-glass, Su8, benzocyclobutene (BCB), epoxy resin (Epoxy), Acrylic resin (Acrylic Resin), cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide ( Polyetherimide), Fluorocarbon Polymer, Silicone, Glass, Aluminum Oxide (Al 2 O 3 ), Silicon Nitride (SiN x ), Silicon Oxide (SiO 2 ), Titanium Oxide (TiO 2 ), the above combination of materials or other transparent insulating materials. The material of the electrical connection wire 18 is a conductive material, such as gold (Au), copper (Cu), nickel (Ni) or a combination of the above materials.
如图3与图4所示,沟槽14可包含多个次沟槽,被绝缘层16覆盖且大致封闭其开口以形成多个空洞142、144和146,其中每个次沟槽的宽度w不大于两倍第一半导体层122上的绝缘层16的厚度t。As shown in FIG. 3 and FIG. 4 , the trench 14 may include a plurality of sub-trenches, covered by the insulating layer 16 and substantially closing its opening to form a plurality of cavities 142, 144 and 146, wherein the width of each sub-trench is w Not more than twice the thickness t of the insulating layer 16 on the first semiconductor layer 122 .
图5绘示出光源产生装置示意图。光源产生装置2可以是照明装置,例如路灯、车灯、或室内照明光源,也可以是交通号志、或平面显示器中背光模块的背光光源。光源产生装置2包含光源21,可为本发明任一实施例中的发光元件阵列、电源供应系统22以供应光源21电流、以及控制元件23,用以控制电源供应系统22。FIG. 5 shows a schematic diagram of a light source generating device. The light source generating device 2 may be a lighting device, such as a street lamp, a car lamp, or an indoor lighting source, or a traffic sign, or a backlight source of a backlight module in a flat-panel display. The light source generating device 2 includes a light source 21 , which can be an array of light emitting elements in any embodiment of the present invention, a power supply system 22 for supplying current to the light source 21 , and a control element 23 for controlling the power supply system 22 .
图6绘示出背光模块剖面示意图。背光模块3包含前述实施例中的光源产生装置2,以及光学元件31。光学元件31可将由光源产生装置2发出的光加以处理,以应用于平面显示器,例如散射光源产生装置2所发的光。FIG. 6 is a schematic cross-sectional view of the backlight module. The backlight module 3 includes the light source generating device 2 in the foregoing embodiments, and an optical element 31 . The optical element 31 can process the light emitted by the light source generating device 2 to be applied to a flat panel display, for example, diffuse the light emitted by the light source generating device 2 .
惟上述实施例仅为例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域一般技术人员均可在不违背本发明的技术原理及精神的情况下,对上述实施例进行修改及变化。因此本发明的权利保护范围如后述的权利要求所列。However, the above-mentioned embodiments are only for illustrating the principles and effects of the present invention, rather than limiting the present invention. Any person skilled in the art can modify and change the above-mentioned embodiments without violating the technical principle and spirit of the present invention. Therefore, the protection scope of the present invention is as listed in the following claims.
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