[go: up one dir, main page]

CN102569559A - Method for manufacturing an array of light emitting elements - Google Patents

Method for manufacturing an array of light emitting elements Download PDF

Info

Publication number
CN102569559A
CN102569559A CN2012100149430A CN201210014943A CN102569559A CN 102569559 A CN102569559 A CN 102569559A CN 2012100149430 A CN2012100149430 A CN 2012100149430A CN 201210014943 A CN201210014943 A CN 201210014943A CN 102569559 A CN102569559 A CN 102569559A
Authority
CN
China
Prior art keywords
light
emitting
manufacturing
emitting element
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012100149430A
Other languages
Chinese (zh)
Other versions
CN102569559B (en
Inventor
刘宗宪
陈昭兴
郭政达
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Epistar Corp
Original Assignee
Epistar Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Epistar Corp filed Critical Epistar Corp
Priority to CN201210014943.0A priority Critical patent/CN102569559B/en
Publication of CN102569559A publication Critical patent/CN102569559A/en
Application granted granted Critical
Publication of CN102569559B publication Critical patent/CN102569559B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Led Devices (AREA)

Abstract

The invention discloses a method for manufacturing a light-emitting element array, which comprises the following steps: providing a substrate; forming a light emitting stack on the substrate, wherein the light emitting stack comprises: a first semiconductor layer located on the substrate; a light emitting layer on the first semiconductor layer; and a second semiconductor layer located on the light-emitting layer; forming at least one groove on the substrate, wherein the groove exposes part of the substrate and separates the light-emitting laminated layer into at least one first light-emitting element and at least one second light-emitting element; and forming an insulating layer on the light-emitting laminated layer and the groove, wherein the width of the groove is not more than twice the thickness of the insulating layer.

Description

Make the method for light-emitting device array
The application is that application number is 200810169439.1, denomination of invention is divided an application for the application for a patent for invention of " making the method for light-emitting device array ".
Technical field
The present invention relates to a kind of manufacturing approach of light-emitting device array, particularly relate to a kind of light-emitting device array with insulating barrier closed groove.
Background technology
Light-emitting diode (Light Emitting Diode; LED) be a kind of solid-state physics semiconductor element, light emitting diode matrix (LED Array) has a plurality of LED, does suitable serial or parallel connection on demand.Before serial or parallel connection, need to form earlier groove to distinguish at a distance from each LED, then between groove and LED, form insulating barrier with each LED of electric insulation, form electric connection line again on insulating barrier and be electrically connected the electrode of each LED, to reach serial or parallel connection.Yet because the size impact of groove, for example the degree of depth of groove is too dark, can occur breaking or being electrically connected bad phenomenon when causing on the sidewall of groove, forming electric connection line.Known solution is to adopt the thickness that increases electric connection line to fill up groove or intactly to cover on the trenched side-wall, to reach good electrical connection; But the thickness that increases electric connection line also increases production cost simultaneously.
Summary of the invention
A kind of method of making light-emitting device array comprises: substrate is provided; Form luminous being stacked on this substrate, wherein this luminous lamination comprises: first semiconductor layer is positioned on this substrate; Luminescent layer is positioned on this first semiconductor layer; And second semiconductor layer, be positioned on this luminescent layer; Form at least one groove on this substrate, this this substrate of groove exposed portion wherein, and should be separated at least one first light-emitting component and second light-emitting component by luminous lamination; And forming insulating barrier on this luminous lamination and this groove, the width of this groove is not more than the thickness of this insulating barrier of twice.
A kind of method of making light-emitting device array, comprising provides substrate; Form luminous being stacked on the substrate, wherein luminous lamination comprises first semiconductor layer, is positioned on the substrate; Luminescent layer is positioned on first semiconductor layer; And second semiconductor layer, be positioned on the luminescent layer.Remove the luminous lamination of part to form at least one groove, groove exposed portion substrate wherein, and luminous lamination is divided into first light-emitting component and second light-emitting component.Remove second semiconductor layer of part first light-emitting component and second semiconductor layer and the luminescent layer of the luminescent layer and second light-emitting component, with first semiconductor layer of exposed portion first light-emitting component and first semiconductor layer of second light-emitting component.Then form second electrode on second semiconductor layer, with first electrode on first semiconductor layer that exposes.Form insulating barrier on luminous lamination and groove, insulating barrier roughly closed groove and exposes first electrode and second electrode with at least one cavity of formation among groove.Form electric connection line and be electrically connected first electrode of first light-emitting component and second electrode of second light-emitting component.
A kind of light-emitting device array comprises substrate; First light-emitting component is positioned on the substrate; Second light-emitting component is positioned on the substrate; At least one groove is separated first light-emitting component and second light-emitting component; And insulating barrier, roughly closed groove is to form at least one cavity among groove.
Description of drawings
Fig. 1 is for showing the manufacturing process profile according to the light-emitting device array of the embodiment of the invention.
Fig. 2 is for showing the profile according to the groove of the embodiment of the invention.
Fig. 3 is for showing the profile according to the groove of another embodiment of the present invention.
Fig. 4 is for showing the profile according to the groove of another embodiment of the present invention.
Fig. 5 is the sketch map that shows the light-source generation device of the light-emitting device array composition that utilizes the embodiment of the invention.
Fig. 6 is the sketch map that shows the backlight module of the light-emitting device array composition that utilizes the embodiment of the invention.
Description of reference numerals
1: light-emitting device array 10: substrate
12: 122: the first semiconductor layers of luminous lamination
124: 126: the second semiconductor layers of luminescent layer
14: groove 142,144,146: cavity
16: 15: the first electrodes of insulating barrier
11: the first light-emitting components of 17: the second electrodes
Light-emitting component 2 in 13: the second: light-source generation device
21: light source 22: power system
23: control element 3: backlight module
31: optical element 18: electric connection line
W: width t: thickness
Embodiment
As shown in Figure 1, the wafer of light-emitting diode 1 is provided, comprise substrate 10; Luminous lamination 12 is formed on the substrate 10, and wherein luminous lamination 12 comprises first semiconductor layer 122, active layer 124 and second semiconductor layer 126 at least.Remove the luminous lamination 12 of part to form groove 14, groove 14 exposed portion substrates 10 wherein, and luminous lamination 12 is separated into first light-emitting component 11 and second light-emitting component 13, the mode that removes comprises but is not limited to etching.Second semiconductor layer 126 that removes part first light-emitting component 11 and second light-emitting component 13 and luminescent layer 124 are with exposed portion first semiconductor layer 122, and the mode that wherein removes comprises but is not limited to inductive coupling type plasma etching (Inductively Coupled Plasma; ICP).The upper surface of first semiconductor layer 122 of groove 14 both sides is rough at same horizontal plane at this moment; Promptly the distance of the upper surface of the distance of the upper surface of first semiconductor layer 122 of first light-emitting component 11 and substrate 10 and first semiconductor layer 122 of second light-emitting component 13 and substrate 10 is approximately identical, also or the height of groove 14 both sides sidewalls is rough to be equated.Form the upper surface of first electrode 15 then, with the upper surface of second electrode 17 at second semiconductor layer 126 at first semiconductor layer 122.Then form insulating barrier 16 on groove 14, first light-emitting component 11 and second light-emitting component 13; But expose first electrode 15 and second electrode 17, wherein the generation type of insulating barrier 16 comprises but is not limited to electron beam evaporation plating method (E-Gun), sputtering method (Sputtering) or plasma enhanced chemical vapor deposition method (PECVD).Form electric connection line 18 at last on insulating barrier 16; With first electrode 15 that is electrically connected first light-emitting component 11 and second electrode 17 of second light-emitting component 13; Wherein the generation type of electric connection line 18 comprises vapor deposition, chemical plating or plating, physical vaporous deposition (PVD) for example, chemical vapour deposition technique (CVD); Metalorganic chemical vapor deposition method (MOCVD), electron beam evaporation plating method (E-Gun) or plasma enhanced chemical vapor deposition method (PECVD).As shown in Figure 2, roughly closed groove 14 is to form cavity 142 among groove 14 for insulating barrier 16, and wherein the width w of groove 14 is not more than the twice of the thickness t of the insulating barrier 16 on first semiconductor layer 122.Insulating barrier has the characteristic that side direction is grown up when forming; In other words; Insulating layer material growth speed in the horizontal direction is greater than the growth speed of vertical direction; Make insulating barrier 16 closed groove 14 roughly when forming, prevent that electric connection line 18 is formed on the sidewall of groove 14, avoid broken string or be electrically connected bad.
The material of substrate 10 comprises but is not limited to copper (Cu), tungsten (W), aluminium nitride (AlN), metal-base composites (Metal Matrix Composite; MMC), ceramic matric composite (Ceramic Matrix Composite; CMC), carborundum (SiC), aluminium (Al), silicon (Si), diamond (Diamond), Aluminum gallium arsenide (AlGaAs), gallium phosphide (GaP), aluminium nitride (AlN), lithia aluminium (LiAlO 2), carborundum (SiC), zinc oxide (ZnO), indium phosphide (InP), aluminium nitride (AlN), sapphire (Sapphire), glass (Glass), the combination of other transparent materials or these materials.The material of substrate 10 is preferably electrical insulating material, if electric conducting material, the electric insulation layer (not shown) is formed between substrate 10 and the luminous lamination 12 with electric insulation first light-emitting component 11 and second light-emitting component 13.
The material of luminous lamination 12 comprises but is not limited to one or more material, like gallium (Ga), aluminium (Al), indium (In), arsenic (As), phosphorus (P), nitrogen (N) or silicon (Si).The material of insulating barrier 16 is an electrical insulating material, for example polyimides (PI), mistake fluorine cyclobutane (PFCB), spin-coating glass, Su8, benzocyclobutene (BCB), epoxy resin (Epoxy), acrylic resin (Acrylic Resin), cyclic olefin polymer (COC), polymethyl methacrylate (PMMA), poly terephthalic acid diethylester (PET), Merlon (PC), PEI (Polyetherimide), fluorocarbon polymer (Fluorocarbon Polymer), silica gel (Silicone), glass, aluminium oxide (Al 2O 3), silicon nitride (SiN x), silica (SiO 2), titanium oxide (TiO 2), combination or other transparent insulation materials of above-mentioned material.The material of electric connection line 18 is an electric conducting material, for example the combination of gold (Au), copper (Cu), nickel (Ni) or above-mentioned material.
Like Fig. 3 and shown in Figure 4; Groove 14 can comprise groove a plurality of times; Being insulated layer 16, to cover and roughly seal its opening a plurality of empty 142,144 and 146 to form, and wherein the width w of each time groove is not more than the thickness t of the insulating barrier 16 on twice first semiconductor layer 122.
Fig. 5 shows the light-source generation device sketch map.Light-source generation device 2 can be a lighting device, and for example street lamp, car light or room lighting light source also can be the back lights of backlight module in traffic sign or the flat-panel screens.Light-source generation device 2 comprises light source 21, can be light-emitting device array among the arbitrary embodiment of the present invention, power system 22 with supply light source 21 electric currents and control element 23, in order to control power system 22.
Fig. 6 shows the backlight module generalized section.Backlight module 3 comprises the light-source generation device 2 in the previous embodiment, and optical element 31.Optical element 31 can be handled the light that is sent by light-source generation device 2, to be applied to flat-panel screens, and scattering light source generation device 2 issued lights for example.
Only the foregoing description is merely illustrative principle of the present invention and effect thereof, but not is used to limit the present invention.Any persons skilled in the art all can be under the situation of know-why of the present invention and spirit, and the foregoing description is made amendment and changed.Therefore rights protection scope of the present invention as after the claim stated listed.

Claims (10)

1.一种制造发光元件阵列的方法,包含:1. A method of manufacturing an array of light-emitting elements, comprising: 提供基板;Provide the substrate; 形成发光叠层于该基板之上,其中该发光叠层包含:forming a light-emitting stack on the substrate, wherein the light-emitting stack includes: 第一半导体层,位于该基板之上;a first semiconductor layer located on the substrate; 发光层,位于该第一半导体层之上;及a light emitting layer located on the first semiconductor layer; and 第二半导体层,位于该发光层之上;a second semiconductor layer located on the light-emitting layer; 形成至少一沟槽于该基板之上,其中该沟槽曝露部分该基板,并将该发光叠层分隔成至少一第一发光元件与第二发光元件;及forming at least one groove on the substrate, wherein the groove exposes a portion of the substrate, and separates the light emitting stack into at least a first light emitting element and a second light emitting element; and 形成绝缘层于该发光叠层与该沟槽之上,该沟槽的宽度不大于两倍的该绝缘层的厚度。An insulating layer is formed on the light-emitting stack and the trench, and the width of the trench is not greater than twice the thickness of the insulating layer. 2.如权利要求1所述的制造发光元件阵列的方法,还包含:2. The method for manufacturing a light-emitting element array as claimed in claim 1, further comprising: 移除部分该第一发光元件与该第二发光元件的该第二半导体层与该发光层以曝露部分该第一半导体层;removing part of the second semiconductor layer and the light emitting layer of the first light emitting element and the second light emitting element to expose part of the first semiconductor layer; 于各该第二半导体层之上形成第二电极;及forming a second electrode over each of the second semiconductor layers; and 于各该暴露的第一半导体层之上形成第一电极。A first electrode is formed on each exposed first semiconductor layer. 3.如权利要求1所述的制造发光元件阵列的方法,其中该绝缘层封闭该沟槽以于该沟槽之中形成至少一空洞。3. The method of manufacturing a light-emitting element array as claimed in claim 1, wherein the insulating layer seals the trench to form at least one cavity in the trench. 4.如权利要求1所述的制造发光元件阵列的方法,其中形成该绝缘层的方法是选自电子束蒸镀法、溅镀法与等离子体增强化学气相沉积法所构成的群组。4. The method for manufacturing a light-emitting device array as claimed in claim 1, wherein the insulating layer is formed by a method selected from the group consisting of electron beam evaporation, sputtering and plasma enhanced chemical vapor deposition. 5.如权利要求1所述的制造发光元件阵列的方法,在形成该绝缘层于该发光叠层与该沟槽之上之后,还包含形成电连接线于该绝缘层之上。5 . The method for manufacturing a light-emitting element array as claimed in claim 1 , after forming the insulating layer on the light-emitting stack and the trench, further comprising forming electrical connection lines on the insulating layer. 6.如权利要求5所述的制造发光元件阵列的方法,其中形成该电连接线的方法是选自物理气相沉积法、化学气相沉积法、化学镀、电镀所构成的群组。6. The method for manufacturing a light-emitting device array as claimed in claim 5, wherein the method for forming the electrical connection line is selected from the group consisting of physical vapor deposition, chemical vapor deposition, electroless plating, and electroplating. 7.如权利要求6所述的制造发光元件阵列的方法,其中该化学气相沉积法为有机金属化学气相沉积法和等离子体增强化学气相沉积法。7. The method for manufacturing a light-emitting element array as claimed in claim 6, wherein the chemical vapor deposition method is a metalorganic chemical vapor deposition method and a plasma enhanced chemical vapor deposition method. 8.如权利要求6所述的制造发光元件阵列的方法,其中该物理气相沉积法为电子束蒸镀法。8. The method for manufacturing a light-emitting element array as claimed in claim 6, wherein the physical vapor deposition method is an electron beam evaporation method. 9.如权利要求1所述的制造发光元件阵列的方法,还包含:9. The method for manufacturing a light-emitting element array as claimed in claim 1, further comprising: 形成次沟槽于该沟槽。A subtrench is formed in the trench. 10.如权利要求9所述的制造发光元件阵列的方法,其中该次沟槽的宽度不大于两倍的该绝缘层的厚度。10. The method of manufacturing a light-emitting element array as claimed in claim 9, wherein the width of the sub-trench is not greater than twice the thickness of the insulating layer.
CN201210014943.0A 2008-10-22 2008-10-22 Method for manufacturing an array of light emitting elements Active CN102569559B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210014943.0A CN102569559B (en) 2008-10-22 2008-10-22 Method for manufacturing an array of light emitting elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210014943.0A CN102569559B (en) 2008-10-22 2008-10-22 Method for manufacturing an array of light emitting elements

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN2008101694391A Division CN101728322B (en) 2008-10-22 2008-10-22 Method for manufacturing an array of light emitting elements

Publications (2)

Publication Number Publication Date
CN102569559A true CN102569559A (en) 2012-07-11
CN102569559B CN102569559B (en) 2015-05-13

Family

ID=46414495

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210014943.0A Active CN102569559B (en) 2008-10-22 2008-10-22 Method for manufacturing an array of light emitting elements

Country Status (1)

Country Link
CN (1) CN102569559B (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW425658B (en) * 1999-09-02 2001-03-11 United Microelectronics Corp Manufacturing method of shallow trench isolation structure
TWI270223B (en) * 2005-11-21 2007-01-01 Epistar Corp A method of making a light emitting element
CN100418242C (en) * 2006-05-17 2008-09-10 广州南科集成电子有限公司 LED manufacturing method

Also Published As

Publication number Publication date
CN102569559B (en) 2015-05-13

Similar Documents

Publication Publication Date Title
US11658273B2 (en) Passivation for a semiconductor light emitting device
EP2523230B1 (en) Light emitting device package and ultraviolet lamp having the same
US8349629B2 (en) Semiconductor light-emitting element and method of manufacturing same
EP2402995B1 (en) Light emitting device and light unit
RU2604956C2 (en) Light emitting device bonded to a support substrate
KR101735670B1 (en) A light emitting device
EP2161752A2 (en) Light-emitting device and method of manufacturing the same
CN110797331B (en) Micro light emitting diode structure and method for manufacturing the same
CN102263182A (en) Light emitting device, manufacturing method thereof, light emitting device package, and lighting system
CN102148307B (en) Light emitting device
CN103178074A (en) Light emitting diode array and forming method thereof
CN102163665B (en) Light emitting device and method of manufacturing the same
CN102201426A (en) Light emitting diode and manufacturing method thereof
CN102148318B (en) Light emitting device package, method of manufacturing the same, and lighting system
CN106471630A (en) Semiconductor device, packaging, luminescent panel device, chip and the method manufacturing semiconductor device
CN102456795A (en) Light emitting device
CN1933202A (en) Method for producing a luminescent diode component
KR20160000513A (en) Semiconductor light emitting device package
CN109273572B (en) Semiconductor light emitting device
CN102623582A (en) Manufacturing method of light emitting diode chip
CN104752454A (en) Light emitting element
CN102299226B (en) LED (light emitting diode) with vertical structure and manufacturing method thereof
CN101728322A (en) Method for manufacturing light emitting element array
CN102891224A (en) Method for forming a plurality of semiconductor light emitting devices
JP2006135313A (en) Light emitting diode

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant