CN102497203A - Phase-locked subdivision method for displacement detection - Google Patents
Phase-locked subdivision method for displacement detection Download PDFInfo
- Publication number
- CN102497203A CN102497203A CN2011103944603A CN201110394460A CN102497203A CN 102497203 A CN102497203 A CN 102497203A CN 2011103944603 A CN2011103944603 A CN 2011103944603A CN 201110394460 A CN201110394460 A CN 201110394460A CN 102497203 A CN102497203 A CN 102497203A
- Authority
- CN
- China
- Prior art keywords
- circuit
- voltage
- frequency
- output
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000006073 displacement reaction Methods 0.000 title claims abstract description 5
- 238000001514 detection method Methods 0.000 title abstract 2
- 238000005070 sampling Methods 0.000 claims abstract description 10
- 230000010355 oscillation Effects 0.000 claims abstract 2
- 230000011218 segmentation Effects 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 230000009466 transformation Effects 0.000 claims 1
- 230000010354 integration Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 4
- 238000005259 measurement Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000007599 discharging Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Images
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
本发明公布了一种用于位移检测中的锁相倍频细分方法，包括一个积分电路，控制电压电路，以及受控振荡电路和分频电路。当一定频率的输入脉冲电压信号fi加入到IC1的输入端时在积分器的输出端将形成同频率的三角波电压，在采样开关T1的作用下，控制电压电路IC2输出合适的控制电压，从而改变受控振荡电路输出电压的频率fo，并使该频率fo始终大于输入电压的频率fi。同时，振荡电路的输出脉冲电压又通过分频电路的适当分频后，由采样开关反馈到控制电压电路，用以调节IC2的输出电压，最终实现振荡输出电压对输入电压的自动细分与锁相跟踪状态。本方法中的电路简单，成本低廉，特别易于调整，应用灵活，稳定可靠。
The invention discloses a phase-locked frequency multiplication and subdivision method used in displacement detection, which includes an integration circuit, a control voltage circuit, a controlled oscillation circuit and a frequency division circuit. When the input pulse voltage signal fi of a certain frequency is added to the input terminal of IC1, a triangular wave voltage with the same frequency will be formed at the output terminal of the integrator. Under the action of the sampling switch T1, the control voltage circuit IC2 outputs a suitable control voltage, thereby Change the frequency f o of the output voltage of the controlled oscillating circuit, and make this frequency f o always greater than the frequency f i of the input voltage. At the same time, the output pulse voltage of the oscillating circuit is properly divided by the frequency division circuit, and fed back to the control voltage circuit by the sampling switch to adjust the output voltage of IC2, and finally realize the automatic subdivision and locking of the oscillating output voltage to the input voltage. phase tracking status. The circuit in the method is simple, low in cost, particularly easy to adjust, flexible in application, stable and reliable.
Description
Technical field:
The present invention relates to a kind of lock phase divided method, be applicable to displacement measurement, conversion of signals, frequency multiplication segmentation, phase locked track, technical fields such as accurate demonstration based on feedback sample.
Background technology:
At present, mostly the Phase Lock Technique field is integrated circuit technique, though there is volume little, and characteristics such as energy consumption is low, its very flexible, adjustment inconvenience, weak point such as supply voltage and power output are restricted influences the application and the expansion of Phase Lock Technique.
Summary of the invention:
The technical problem that the present invention solved is, proposed a kind of simple in structurely, uses flexibly, and is easy to adjust, particularly adapts to the phase locked track method of supply voltage wide ranges.
According to one of technical scheme of the present invention is the circuit composition frame chart: the circuit block diagram that this lock segments mutually, comprise by circuit and square-wave, and integrating circuit, sampling hold circuit, and control the phase detector circuit that voltage forming circuit is formed; The controlled oscillator circuit of voltage amplification; The divider circuit of selected multiple.As shown in Figure 1.
According to two of technical scheme of the present invention are circuit principle structures: the square wave in the said scheme forms circuit, comprises resistor R 1, R2, capacitor C1, C3, integrated transporting discharging IC1; Integrating circuit comprises resistor R 3, capacitor C2; Sampling hold circuit comprises transistor T 1, T2, resistor R 5, R6, R7, R8, R9, capacitor C4, C5, C6; The control voltage forming circuit comprises resistor R 4, integrated transporting discharging IC2, diode D1; The controlled oscillator circuit comprises integrated logic gates IC3, IC4, transistor T 3, resistor R 10, R11, R12, capacitor C7, C8; Divider circuit comprises integrated logic circuit IC5, IC6 etc.As shown in Figure 2.
Description of drawings:
Fig. 1 is based on the composition block diagram of feedback sample lock phase divided method.
Fig. 2 is based on the principle assumption diagram of feedback sample lock phase divided method.
Embodiment:
As shown in Figure 1, the circuit square frame of the present invention's technology comprises by square wave forming circuit, integrating circuit, sampling hold circuit, control potential circuit, the phase discriminator block diagram of composition; Controlled oscillator block diagram and frequency divider block diagram.
As shown in Figure 2, the circuit theory of the present invention's technology is:
1. the measurement signal voltages of certain frequency is added to the input of circuit and square-wave IC1, then produces the square-wave voltage identical with frequency input signal at its output.
2. square-wave voltage is input to the integrating circuit of being made up of R3, C2, then on C2, produces the triangle wave voltage with the square-wave voltage same frequency.
3. triangular wave keeps electric T1, C4 to join the input of control voltage forming circuit IC2 through sampling, then on its output, will produce and input voltage frequency variation Δ f
iProportional control voltage.
4. control voltage joins the input of controlled oscillator IC circuit 3, IC4, then changes the output voltage frequency of oscillator, and make frequency of its vibration output voltage be the input measurement electric voltage frequency n doubly.
5. the output voltage of pierce circuit is added to the input of frequency divider; Behind n times of frequency division; Then at the output generation of divider circuit IC5 and the feedback sample control voltage of input measurement signal same frequency; Frequency in order to the regulation and control sampled voltage makes the output voltage signal of oscillator and the state that tested voltage signal remains phase locked track.So reach segmentation purpose to measured signal voltage.
Claims (4)
1. the lock phase divided method of a displacement detecting is the method for the count pulse that detects being carried out Subdividing Processing, and comprising: square wave forms circuit, integrating circuit, control potential circuit, controlled oscillation circuit, frequency dividing circuit and sampling switch circuit.
The above method is characterised in that: the count pulse voltage of input, and at the output formation square-wave voltage of waveform transformation circuit, and integrating circuit is transformed to square-wave voltage the triangle wave voltage of same frequency; Triangle wave voltage makes the output voltage of control circuit change with the frequency of input voltage increment.Therefore, the output voltage frequency of controlled oscillator also produces corresponding increment and changes, to keep the segmentation effect to the input voltage frequency.Simultaneously, the output pulse of oscillating circuit is again through behind the selected divide ratio frequency division, and the action of control sampling switch is with the purpose of pulse voltage that reaches segmentation and the pulse voltage phase locked track of importing counting.
2. according to the lock phase divided method of claim 1, it is characterized in that: in the said method, the phase-locked loop joint is to be realized by the feedback circuit of a sampling switch control.Comprise discharge circuit IC2, diode D1, sampling switch T1 and anti-phase drive circuit T2.Feedback control signal behind the frequency division is through C5, C6 coupled transfer.
3. according to the lock phase divided method of claim 1, it is characterized in that: in the said method, controlled oscillator is by R10, R11, R12, C7, C8, and IC 3, IC4, T3 are formed.
4. according to the lock phase divided method of claim 1, it is characterized in that: in the said method, have counter IC5 to constitute the frequency dividing circuit of selected multiple, its segmentation multiple n can be 10 to 1000 times.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103944603A CN102497203A (en) | 2011-12-02 | 2011-12-02 | Phase-locked subdivision method for displacement detection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103944603A CN102497203A (en) | 2011-12-02 | 2011-12-02 | Phase-locked subdivision method for displacement detection |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102497203A true CN102497203A (en) | 2012-06-13 |
Family
ID=46188999
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103944603A Pending CN102497203A (en) | 2011-12-02 | 2011-12-02 | Phase-locked subdivision method for displacement detection |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102497203A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9252788B1 (en) | 2014-09-11 | 2016-02-02 | International Business Machines Corporation | Phase error detection in phase lock loop and delay lock loop devices |
| CN106026989A (en) * | 2016-06-17 | 2016-10-12 | 沈阳工业大学 | Continuous time function signal generating circuit controlled by digital signals |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02311021A (en) * | 1989-05-26 | 1990-12-26 | Sony Corp | Phase locked loop circuit |
| CN1382995A (en) * | 2002-04-24 | 2002-12-04 | 清华大学 | Digital measuring method of frequency and phase |
| CN101105583A (en) * | 2006-07-12 | 2008-01-16 | 群康科技(深圳)有限公司 | Pulse light modulation circuit |
| US7388441B2 (en) * | 2006-05-23 | 2008-06-17 | Tektronix. Inc. | Robust phase-lock detector |
| CN102045062A (en) * | 2011-01-27 | 2011-05-04 | 中山大学 | Digital phase-locked loop based on Cordic algorithm |
-
2011
- 2011-12-02 CN CN2011103944603A patent/CN102497203A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02311021A (en) * | 1989-05-26 | 1990-12-26 | Sony Corp | Phase locked loop circuit |
| CN1382995A (en) * | 2002-04-24 | 2002-12-04 | 清华大学 | Digital measuring method of frequency and phase |
| US7388441B2 (en) * | 2006-05-23 | 2008-06-17 | Tektronix. Inc. | Robust phase-lock detector |
| CN101105583A (en) * | 2006-07-12 | 2008-01-16 | 群康科技(深圳)有限公司 | Pulse light modulation circuit |
| CN102045062A (en) * | 2011-01-27 | 2011-05-04 | 中山大学 | Digital phase-locked loop based on Cordic algorithm |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9252788B1 (en) | 2014-09-11 | 2016-02-02 | International Business Machines Corporation | Phase error detection in phase lock loop and delay lock loop devices |
| US9590643B2 (en) | 2014-09-11 | 2017-03-07 | International Business Machines Corporation | Phase error detection in phase lock loop and delay lock loop devices |
| US9735789B2 (en) | 2014-09-11 | 2017-08-15 | International Business Machines Corporation | Phase error detection in phase lock loop and delay lock loop devices |
| US10164648B2 (en) | 2014-09-11 | 2018-12-25 | International Business Machines Corporation | Phase error detection in phase lock loop and delay lock loop devices |
| CN106026989A (en) * | 2016-06-17 | 2016-10-12 | 沈阳工业大学 | Continuous time function signal generating circuit controlled by digital signals |
| CN106026989B (en) * | 2016-06-17 | 2019-03-29 | 沈阳工业大学 | The Continuous time functions signal generating circuit of Digital Signals |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103997317B (en) | A kind of relaxor significantly improving the control electric current output frequency linearity | |
| US6456170B1 (en) | Comparator and voltage controlled oscillator circuit | |
| KR102331790B1 (en) | A transmitter-receiver system | |
| CN1862273B (en) | A system-on-chip for testing clock signal jitter | |
| CN102645583B (en) | Broadband rapid frequency measuring method based on cluster period phase process | |
| CN104485948B (en) | The control method and time standard device of a kind of time standard equipment | |
| WO2010053215A1 (en) | Phase error correction in rotary traveling wave oscillators | |
| US8258834B2 (en) | Lock detector, method applicable thereto, and phase lock loop applying the same | |
| CN104620532B (en) | Clock forming device and clock data recovery device | |
| CN102714499A (en) | Phase detection circuits and methods | |
| CN109075775A (en) | Integrated oscillator circuit system | |
| CN102347762B (en) | Locking detection circuit of phase-locked loop circuit | |
| CN102497203A (en) | Phase-locked subdivision method for displacement detection | |
| CN103338036B (en) | Based on the frequency signal link control method of atomic clock of phase group process | |
| CN203151469U (en) | System capable of narrowing the frequency range for the dynamic detection of atomic energy level transitions in atomic clocks | |
| CN203275896U (en) | Low-cost subnanosecond-grade time interval detection circuit | |
| Harikrushna et al. | Design, implementation and characterization of XOR phase detector for DPLL in 45 nm CMOS technology | |
| CN104065344A (en) | Low-consumption oscillator | |
| Gaggatur et al. | Time of arrival measurement for indoor distance monitoring in 130-nm CMOS | |
| CN103326717B (en) | A kind of rubidium clock scan capture secondary locking method | |
| CN102427342A (en) | Switched capacitor clock generator | |
| Yin et al. | An intermittent frequency synthesizer with accurate frequency detection for fast duty-cycled receivers | |
| CN207869089U (en) | Phaselocked loop start-up circuit | |
| CN108964658A (en) | Clock Generating Device Based on Phase Locked Loop and Standard Scale Delay Line and Its Implementation Method | |
| CN205430207U (en) | Treatment circuit and phase -locked loop |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120613 |