CN102437037B - Method for effectively reducing water mark defects - Google Patents
Method for effectively reducing water mark defects Download PDFInfo
- Publication number
- CN102437037B CN102437037B CN201110265322.5A CN201110265322A CN102437037B CN 102437037 B CN102437037 B CN 102437037B CN 201110265322 A CN201110265322 A CN 201110265322A CN 102437037 B CN102437037 B CN 102437037B
- Authority
- CN
- China
- Prior art keywords
- wafer
- etching
- cleaning
- clean
- washmarking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Cleaning Or Drying Semiconductors (AREA)
Abstract
The invention discloses a method for effectively reducing water mark defects, which is used for the cleaning process in the process that wafers form double polysilicon gates. After the wafer annealing, the cleaning process is firstly carried out before the tungsten metal silicide deposition. The method is characterized in that the cleaning process comprises the following steps that: the wafers are fed into a wet type etching cleaning system; the wafers are etched in a wet process for removing organic matters and microparticles, and then, the wafers are subjected to drying treatment so that the wafer surface is the hydrophilic surface for reducing the water mark defect formation; and an oxidation layer of the crystal surface is removed through the dry process etching , and the water mark residue is avoided.
Description
Technical field
The present invention relates to the etching field of semiconductor wafer, in particular to a kind of method of effective minimizing washmarking defect.
Background technology
Some memory devices need to be applied Dual Poly Gate(dual poly grid) processing procedure, in prior art, first form P type Poly with B Implantation, form N-type Poly with P Implantation again, then with reference to figure 1, complete after the step of above-mentioned Implantation, carry out step S210: (annealing herein refers to Post-Implant Anneal in annealing, abbreviation PIA), perform step again S211: manufacturing process for cleaning (Clean Split), wherein, step S211 generally carries out on the board of Wet-type etching purging system (WET bench), with etch buffer liquid or hydrofluoric acid treatment ending.Then perform step S212: tungsten metal silicide deposit (WSix deposition).Due to Dual Poly Gate(dual poly grid) processing procedure is prior art, and the present invention does not relate to other steps, and therefore in this not go into detail.
For above-mentioned these steps, the existing defect of Dual Poly Gate making technology of prior art is, because N-type and P type Poly are after etch buffer liquid or hydrofluoric acid treatment, the hydrophobicity on surface is different, easily forms zonal washmarking defect in follow-up dry run.
Therefore, be necessary to provide a kind of new process to reduce the washmarking generating on wafer after Dual Poly Gate processing procedure in prior art and just seem particularly important.
Summary of the invention
The object of the invention is the formation of the washmarking defect that reduces wafer surface, simultaneously in conjunction with conventional process techniques, do not increase too much operation, to avoid increasing unnecessary cost.
For the defect of prior art, the present invention discloses a kind of method of effective minimizing washmarking defect, cleaning for wafer in the process of formation dual poly grid, after annealing of wafer (anneal), before the deposit of carrying out tungsten metal silicide, first carry out described cleaning, wherein, described cleaning comprises the steps:
Described wafer is sent in Wet-type etching purging system;
Described in wet etching, wafer to be to remove organic substance and particulate, more described wafer is dried to processing, and making described wafer surface is hydrophilic surface, to reduce the formation of washmarking defect;
Dry etching is removed the oxide layer of described wafer surface, to avoid washmarking residual.
Above-mentioned method, wherein, the step of wafer comprises described in described wet etching:
First with clean solution S PM(H2SO4:H2O2) clean described wafer to remove organic substance;
Then clean described wafer with etching solution;
Again with clean solution A PM(NH4OH:H2O2:H2O) clean described wafer to remove particulate and organic substance.
Above-mentioned method, wherein, described etching solution is hydrofluoric acid.
Above-mentioned method, wherein, described etching solution is the buffering etching solution that comprises ammonium fluoride and hydrofluoric acid, described ammonium fluoride is as buffer.
Above-mentioned method, wherein, described dry etching is removed in the step of wafer surface oxide layer, comprising:
To wafer surface injection ammonia and hydrofluoric steam, make the silicon dioxde reaction of itself and wafer surface, generate thus ammonium fluosilicate;
Improve temperature and make described ammonium fluosilicate volatilization.
Above-mentioned method, wherein, in the step of generation ammonium fluosilicate, temperature range is that 20 degree Celsius are between 40 degree Celsius.
Above-mentioned method, wherein, makes in the step of ammonium fluosilicate volatilization in raising temperature, and temperature is increased to 100° centigrade between 200 degree Celsius.
Above-mentioned method, wherein, described wafer is the wafer for the manufacture of memory device.
The inventive method is for washmarking defect, first uses wet etching, then adopts dry etching to remove oxide layer, with in prior art only with compared with wet etching, can not produce washmarking defect.
Accompanying drawing explanation
By reading the detailed description of non-limiting example being done with reference to the following drawings, it is more obvious that the present invention and feature thereof, profile and advantage will become.In whole accompanying drawings, identical mark is indicated identical part.Deliberately proportionally do not draw accompanying drawing, focus on illustrating purport of the present invention.In the accompanying drawings, for cheer and bright, part parts have been amplified.
Fig. 1 shows according to prior art, a kind of dual poly grid processing procedure flow diagram of portions;
Fig. 2 shows according to of the present invention, generates the schematic diagram of ammonium fluosilicate in a kind of method of effective minimizing washmarking defect in dry wafer surface; And
Fig. 3 shows according to of the present invention, removes ammonium fluosilicate to avoid producing the schematic diagram of washmarking in a kind of method of effective minimizing washmarking defect.
In accompanying drawing, indicate the chemical formula of portion gas, but do not indicated all reactants completely, specifically can understand in conjunction with following embodiment.
Embodiment
Below in conjunction with the drawings and the specific embodiments, the present invention is further elaborated.Embodiment described herein is only for explaining the present invention, the protection range being not intended to limit the present invention.
Adopting before method of the present invention, first according to prior art Dual Poly Gate(dual poly grid) fabrication process wafer, carrying out to the step of annealing of wafer, adopt method of the present invention to carry out cleaning, described cleaning comprises the steps:
Described wafer is sent in Wet-type etching purging system, in order to wafer is carried out to follow-up wet etching process; Then with wafer described in wet etching to remove organic substance and particulate, more described wafer is dried to processing, making described wafer surface is hydrophilic surface, to reduce the formation of washmarking defect; Remove again the oxide layer of described plane of crystal with dry etching, to avoid washmarking residual.
In a specific embodiment, the step of wafer comprises described in above-mentioned wet etching:
First with clean solution S PM(H2SO4:H2O2) clean described wafer to remove organic substance, the organic hydrocarbon key of strong oxidizing property destruction of the mixed liquor by H2SO4 and H2O2; Then clean described wafer with etching solution; Again with clean solution A PM(NH4OH:H2O2:H2O) clean described wafer to remove particulate and organic substance, this step is mainly to utilize the alkalescent of NH4OH to remove the particulate of wafer surface, wherein, the ratio of H2SO4 and H2O2, the ratio of NH4OH, H2O2 and H2O proportioning as required, those skilled in the art can, in conjunction with existing techniques in realizing, not repeat them here.
In a preference, described etching solution is hydrofluoric acid.
Change in example at one, described etching solution is the buffering etching solution that comprises ammonium fluoride and hydrofluoric acid, and described ammonium fluoride is as buffer.
Further, in conjunction with Fig. 2 and Fig. 3, remove in the step of wafer surface oxide layer at described dry etching, comprising:
First by ammonia and hydrofluoric vapor injection to wafer surface, make the silicon dioxde reaction of itself and wafer surface, generate thus ammonium fluosilicate.Preferably, in this step, temperature range is controlled at 20 degree Celsius between 40 degree Celsius.In Fig. 2, on device 102 in cavity 100, there is a wafer 2, water filling 103 in device 102, with stable temperature, make temperature be controlled at 20 degree Celsius between 40 degree Celsius, the steam of ammonia (NH3) and hydrogen fluoride (HF) injects from two pipelines, thereby and the silicon dioxide on wafer 2 surfaces (in Fig. 2 for indicating) reaction generate in fluosilicic acid as byproduct ammonium (NH4) 2SiF6(Fig. 2 not sign).
Improving temperature makes not indicate in described ammonium fluosilicate (NH4) 2SiF6(Fig. 3 again) volatilization.Preferably, in this step, temperature is increased to 100° centigrade between 200 degree Celsius.In Fig. 3, wafer 2 is positioned on the device 104 of another cavity 101, heats with heater 105, thereby realizes the effect of removing silicon dioxide on wafer 2.
Further, described wafer 2 is the wafer for the manufacture of memory device, is particularly useful for Dual Poly Gate processing procedure.
Completed above-mentioned in steps after, according to prior art Dual Poly Gate(dual poly grid) processing procedure, carry out the subsequent step of cleaning, carry out the deposit of tungsten metal silicide.
It should be appreciated by those skilled in the art that those skilled in the art can realize described variation example in conjunction with prior art and above-described embodiment, such variation example does not affect flesh and blood of the present invention, does not repeat them here.
Above preferred embodiment of the present invention is described.It will be appreciated that, the present invention is not limited to above-mentioned specific implementations, and the equipment of wherein not describing in detail to the greatest extent and structure are construed as to be implemented with the common mode in this area; Any those of ordinary skill in the art, do not departing from technical solution of the present invention scope situation, all can utilize method and the technology contents of above-mentioned announcement to make many possible variations and modification to technical solution of the present invention, or being revised as the equivalent embodiment of equivalent variations, this does not affect flesh and blood of the present invention.Therefore, every content that does not depart from technical solution of the present invention,, all still belongs in the scope of technical solution of the present invention protection any simple modification made for any of the above embodiments, equivalent variations and modification according to technical spirit of the present invention.
Claims (7)
1. one kind is effectively reduced the method for washmarking defect, cleaning for wafer in the process of formation dual poly grid after annealing of wafer, was first carried out described cleaning before the deposit of carrying out tungsten metal silicide, it is characterized in that, described cleaning comprises the steps:
Described wafer is sent in Wet-type etching purging system;
First with cleaning solution S PM(H
2sO
4: H
2o
2) clean described wafer to remove organic substance, then clean described wafer with etching solution, then with clean solution A PM(NH
4oH:H
2o
2: H
2o) clean described wafer to remove particulate and organic substance, more described wafer is dried to processing, making described wafer surface is hydrophilic surface, to reduce the formation of washmarking defect;
Dry etching is removed the oxide layer of described plane of crystal, to avoid washmarking residual.
2. the method for claim 1, is characterized in that, described etching solution is hydrofluoric acid.
3. the method for claim 1, is characterized in that, described etching solution is the buffering etching solution that comprises ammonium fluoride and hydrofluoric acid, and described ammonium fluoride is as buffer.
4. the method for claim 1, is characterized in that, described dry etching is removed in the step of plane of crystal oxide layer, comprising:
Ammonia and hydrofluoric vapor injection, to wafer surface, are made to the silicon dioxde reaction of itself and wafer surface, generate thus ammonium fluosilicate;
Improve temperature and make described ammonium fluosilicate volatilization.
5. method as claimed in claim 4, is characterized in that, in the step of generation ammonium fluosilicate, range of reaction temperature is that 20 degree Celsius are between 40 degree Celsius.
6. method as claimed in claim 4, is characterized in that, makes in the step of ammonium fluosilicate volatilization in raising temperature, and temperature is increased to 100° centigrade between 200 degree Celsius.
7. the method as described in any one in claim 1 to 6, is characterized in that, described wafer is the wafer for the manufacture of memory device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110265322.5A CN102437037B (en) | 2011-09-08 | 2011-09-08 | Method for effectively reducing water mark defects |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110265322.5A CN102437037B (en) | 2011-09-08 | 2011-09-08 | Method for effectively reducing water mark defects |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102437037A CN102437037A (en) | 2012-05-02 |
CN102437037B true CN102437037B (en) | 2014-06-04 |
Family
ID=45985033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110265322.5A Active CN102437037B (en) | 2011-09-08 | 2011-09-08 | Method for effectively reducing water mark defects |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102437037B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106206597B (en) * | 2016-07-27 | 2019-06-28 | 上海华虹宏力半导体制造有限公司 | Avoid the remaining method of etching polysilicon and Split-gate flash memory manufacturing method |
CN109950148A (en) * | 2017-12-20 | 2019-06-28 | 中芯国际集成电路制造(上海)有限公司 | A kind of manufacturing method of semiconductor devices |
CN115159449B (en) * | 2022-07-25 | 2024-11-12 | 上海华虹宏力半导体制造有限公司 | Methods for improving etching defects |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100360399B1 (en) * | 2000-03-07 | 2002-11-13 | 삼성전자 주식회사 | Method of manufacturing semiconductor capacitor having a hemispherical grain layer |
US7795148B2 (en) * | 2006-03-28 | 2010-09-14 | Tokyo Electron Limited | Method for removing damaged dielectric material |
CN101079376B (en) * | 2006-05-22 | 2010-05-12 | 中芯国际集成电路制造(上海)有限公司 | Making method for semiconductor part |
CN101740379B (en) * | 2008-11-27 | 2012-06-06 | 中芯国际集成电路制造(上海)有限公司 | Method for eliminating surface defect of semiconductor device and semiconductor device |
-
2011
- 2011-09-08 CN CN201110265322.5A patent/CN102437037B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN102437037A (en) | 2012-05-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103107066B (en) | A kind of photoresist minimizing technology and semiconductor manufacturing process | |
JP2001319918A (en) | Substrate surface treatment method, substrate surface treatment method for semiconductor devices | |
CN105609408B (en) | The forming method of semiconductor devices | |
CN102437037B (en) | Method for effectively reducing water mark defects | |
JP2008244252A (en) | Surface treatment method, etching processing method and manufacturing method of electronic device | |
CN102103992B (en) | Method for manufacturing gate oxide | |
US9704719B2 (en) | Systems and methods to mitigate nitride precipitates | |
JP5233277B2 (en) | Semiconductor substrate processing method and semiconductor device manufacturing method | |
CN103646871A (en) | Method for improving uniformity of oxide layer on surface of amorphous silicon | |
CN104465367B (en) | A kind of method handled field oxide and application | |
CN100576453C (en) | The manufacture method of grid and nmos pass transistor | |
KR20130072664A (en) | Manufacturing method of semiconductor memory device | |
CN100461342C (en) | Method for forming groove type gate dielectric layer | |
CN105742177A (en) | Method for removing virtual gate electrode dielectric layer | |
CN108074803B (en) | Semiconductor structure and forming method thereof | |
CN113497142B (en) | Semiconductor structure and method for forming semiconductor structure | |
CN104716041B (en) | A kind of manufacture method of semiconductor devices | |
CN100479118C (en) | Method for removing photoresist and method for manufacturing semiconductor element | |
CN101783296B (en) | Forming method of grid electrode side wall layer | |
KR101575131B1 (en) | method for treating substrate | |
KR20140091327A (en) | Method for cleaning wafer | |
CN103151256B (en) | Remove the dry etching method of residual polycrystalline silicon below grid side wall | |
KR100825004B1 (en) | Method of manufacturing semiconductor device having bulb type recess gate | |
KR100865442B1 (en) | Wafer cleaning method to remove streak defect | |
CN104992928B (en) | A kind of method of active area critical size difference between improvement different chips |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |