CN102301451A - Wafer processing deposition shield - Google Patents
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Abstract
本发明所述的实施例大体关于一种用于将材料均匀溅射沉积至基材上具有高深宽比的特征结构的底部及侧壁的设备及方法。在一个实施例中,提供一种定位在溅射靶材与基材支撑座间而用于与屏蔽构件机械及电气连接的准直器。该准直器包含中央区域及周边区域,其中该准直器具有多个延伸贯穿其间的孔口,且其中位于中央区域的孔口具有较位于周边区域的孔口高的深宽比。
Embodiments described herein generally relate to an apparatus and method for uniformly sputter-depositing material onto the bottom and sidewalls of features having a high aspect ratio on a substrate. In one embodiment, a collimator is provided that is positioned between a sputtering target and a substrate support and mechanically and electrically connected to a shielding member. The collimator includes a central region and a peripheral region, wherein the collimator has a plurality of apertures extending therethrough, wherein the apertures in the central region have a higher aspect ratio than the apertures in the peripheral region.
Description
技术领域 technical field
本发明的实施例一般关于一种用于将材料均匀溅射沉积至基材上具有高深宽比的特征结构的底部及侧壁的设备与方法。Embodiments of the invention generally relate to an apparatus and method for uniform sputter deposition of material onto the bottom and sidewalls of high aspect ratio features on a substrate.
背景技术 Background technique
在集成电路的制造中,溅射或物理气相沉积(PVD)是一种广泛用于在基材上沉积薄金属层的技术。使用PVD来沉积作为扩散阻障层、种晶层、主要导体(primary conductor)、抗反射涂层、及蚀刻停止层的层。然而,通过PVD难以形成保有基材形状的均匀薄膜,其中在该基材中发生诸如形成孔或沟槽的阶梯(step)。特定言之,沉积溅射原子的广角分布导致在具有高深宽比特征结构的底部与侧壁(例如孔及沟槽)中的不良覆盖。In the fabrication of integrated circuits, sputtering or physical vapor deposition (PVD) is a technique widely used to deposit thin metal layers on substrates. Layers that act as diffusion barrier, seed layer, primary conductor, antireflective coating, and etch stop layer are deposited using PVD. However, it is difficult to form a uniform thin film maintaining the shape of a substrate in which steps such as forming holes or grooves occur by PVD. In particular, the wide angular distribution of deposited sputtered atoms results in poor coverage in the bottom and sidewalls of features with high aspect ratios, such as holes and trenches.
发展准直器溅射技术以允许使用PVD在具有高深宽比特征结构的底部中沉积薄膜。准直器是定位在溅射源与基材间的过滤板。准直器通常具有均匀的厚度并包括一些贯穿该厚度形成的信道。溅射材料必须在其从溅射源至该基材的路径上通过准直器。准直器过滤掉将以超过期望角度的锐角撞击该工作件的材料。Collimator sputtering techniques were developed to allow deposition of thin films in the bottom of features with high aspect ratios using PVD. A collimator is a filter plate positioned between the sputter source and the substrate. A collimator typically has a uniform thickness and includes channels formed through the thickness. The sputtered material must pass through a collimator on its way from the sputtering source to the substrate. The collimator filters out material that would strike the workpiece at an acute angle beyond the desired angle.
通过给定准直器过滤的实际量取决于通过该准直器的信道的深宽比。因此,沿着接近垂直于该基材的路径行进的粒子通过该准直器并沉积在该基材上。此举可改良在底部具有高深宽比的特征结构中的覆盖。The actual amount filtered by a given collimator depends on the aspect ratio of the channel passing through that collimator. Thus, particles traveling along a path approximately perpendicular to the substrate pass through the collimator and deposit on the substrate. This can improve coverage in features with high aspect ratios at the bottom.
然而,已知准直器结合使用小磁铁磁控管将存在一些问题。使用小磁铁磁控管将产生高离子化金属通量,其有利于填充高深宽比的特征结构。不幸的是,具有结合小磁铁磁控管的已知准直器的PVD横越基材提供不均匀的沉积。来源材料可能在基材的一个区域中沉积较基材上的其它区域厚的层。例如,取决于小磁铁的径向定位,可能在基材的中心或边缘沉积较厚的层。此现象不仅导致横越基材的非均匀沉积,也在基材的一些区域中导致横越具有高深宽比的特征结构侧壁的非均匀沉积。举例来说,径向定位以在靠近基材的周缘的区域中提供最佳磁场均匀性的小磁铁,导致来源材料被沉积在面对基材中心的特征结构侧壁上的量比被沉积在面对基材的周缘的特征结构侧壁上更大。However, the use of small magnet magnetrons in conjunction with collimators has been known to present some problems. Using a small magnet magnetron will result in a high flux of ionized metal, which is good for filling high aspect ratio features. Unfortunately, PVD with known collimators incorporating small magnet magnetrons provides uneven deposition across the substrate. The source material may deposit a thicker layer in one area of the substrate than in other areas on the substrate. For example, depending on the radial positioning of the small magnets, thicker layers may be deposited in the center or edges of the substrate. This phenomenon not only results in non-uniform deposition across the substrate, but also in some regions of the substrate across the sidewalls of features with high aspect ratios. For example, small magnets positioned radially to provide optimal magnetic field uniformity in regions near the periphery of the substrate result in more source material being deposited on the feature sidewalls facing the center of the substrate than on the Larger on the sidewall of the feature facing the periphery of the substrate.
因此,存有一种改良通过PVD技术横越基材沉积来源材料的均匀性的需要。Accordingly, there exists a need to improve the uniformity of deposition of source material across a substrate by PVD techniques.
发明内容 Contents of the invention
本文所述的一个实施例的种沉积设备包含:电气接地腔室;溅射靶材,其通过该腔室支撑并与该腔室电气绝缘;基材支撑座,其定位在该溅射靶材的下方并具有实质平行该溅射靶材的溅射表面的基材支撑表面;屏蔽构件,其通过该腔室支撑并电气连接至该腔室;及准直器,其机械并电气连接至该屏蔽构件且定位在该溅射靶材与该基材支撑座之间。在一个实施例中,准直器具有多个延伸贯穿其间的孔口。在一个实施例中,位于中央区域的孔口具有较位于周边区域的孔口高的深宽比。A deposition apparatus of one embodiment described herein comprises: an electrically grounded chamber; a sputter target supported by and electrically insulated from the chamber; a substrate support positioned on the sputter target and a substrate support surface substantially parallel to the sputtering surface of the sputtering target; a shield member supported by the chamber and electrically connected to the chamber; and a collimator mechanically and electrically connected to the chamber A shielding member is positioned between the sputtering target and the substrate support. In one embodiment, the collimator has a plurality of apertures extending therethrough. In one embodiment, the apertures located in the central region have a higher aspect ratio than the apertures located in the peripheral region.
在另一个实施例中,沉积设备包含:电气接地腔室;溅射靶材,其通过该腔室支撑并与该腔室电气绝缘;基材支撑座,其定位在该溅射靶材的下方并具有实质平行该溅射靶材的溅射表面的基材支撑表面;屏蔽构件,其通过该腔室支撑并电气连接至该腔室;准直器,其机械式及电气式连接至该屏蔽构件且定位在该溅射靶材与该基材支撑座之间;气体源;及控制器。在一个实施例中,该溅射靶材电气连接至DC功率源。在一个实施例中,基材支撑座电气连接至RF功率源。在一个实施例中,该控制器经程序化而提供信号以控制气体源、DC功率源、及RF功率源。在一个实施例中,该准直器具有多个孔口延伸贯穿其间。在一个实施例中,位于中央区域的孔口具有较位于准直器的周边区域的孔口高的深宽比。在一个实施例中,将控制器程序化以提供高偏压至基材支撑座。In another embodiment, a deposition apparatus comprises: an electrically grounded chamber; a sputtering target supported by and electrically insulated from the chamber; a substrate support positioned below the sputtering target and having a substrate support surface substantially parallel to the sputtering surface of the sputtering target; a shield member supported by the chamber and electrically connected to the chamber; a collimator mechanically and electrically connected to the shield components and positioned between the sputtering target and the substrate support; a gas source; and a controller. In one embodiment, the sputter target is electrically connected to a DC power source. In one embodiment, the substrate support is electrically connected to an RF power source. In one embodiment, the controller is programmed to provide signals to control the gas source, the DC power source, and the RF power source. In one embodiment, the collimator has a plurality of apertures extending therethrough. In one embodiment, the apertures located in the central region have a higher aspect ratio than the apertures located in the peripheral region of the collimator. In one embodiment, the controller is programmed to provide a high bias voltage to the substrate support.
在又一个实施例中,一种用于沉积材料至基材上的方法,包含以下步骤:在具有位于溅射靶材与基材支撑座间的准直器的腔室中,对溅射靶材施加DC偏压;在邻近腔室内的溅射靶材的区域中提供处理气体;施加偏压至基材支撑座;及在高偏压及低偏压之间脉冲化施加至该基材支撑座的偏压。在一个实施例中,准直器具有多个孔口延伸贯穿其间。在一个实施例中,位于中央区域的孔口具有较位于准直器的周边区域的孔口高的深宽比。In yet another embodiment, a method for depositing a material onto a substrate comprises the step of: aligning the sputter target with a collimator positioned between the sputter target and the substrate support in a chamber having a collimator applying a DC bias to the material; providing a process gas in a region adjacent to the sputtering target within the chamber; applying a bias to the substrate support; and pulsing the substrate support between a high bias and a low bias seat bias. In one embodiment, the collimator has a plurality of apertures extending therethrough. In one embodiment, the apertures located in the central region have a higher aspect ratio than the apertures located in the peripheral region of the collimator.
在又一个实施例中,提供一种定位在溅射靶材与基材支撑座之间用于机械及电气连接屏蔽构件的准直器。该准直器包含中央区域及周边区域,其中该准直仪具有多个孔口延伸贯穿其间,且其中位于中央区域的孔口具有较位于周边区域的孔口高的深宽比。In yet another embodiment, a collimator positioned between a sputter target and a substrate support for mechanical and electrical connection of a shielding member is provided. The collimator includes a central region and a peripheral region, wherein the collimator has a plurality of apertures extending therethrough, and wherein the apertures in the central region have a higher aspect ratio than the apertures in the peripheral region.
在又一个实施例中,提供一种用于在处理腔室中围绕面对靶材的基材支撑座的下屏蔽。该下屏蔽包含:圆柱状外侧带,其具有经调整尺寸以围绕该溅射靶材的溅射表面与基材支撑座的第一直径,该外侧圆柱状带包含环绕该溅射靶材的溅射表面的上部分;中间部分;及下部分,其环绕该基材支撑座;支撑凸缘,其具有支承表面并从圆柱状外侧带径向向外延伸;基底板,从该圆柱状外侧带的下部分径向向内延伸;及圆柱状内侧带,该圆柱状内侧带连接至该基底板并部分地环绕该基材支撑座的周边。In yet another embodiment, a lower shield for surrounding a substrate support facing a target in a processing chamber is provided. The lower shield includes a cylindrical outer band having a first diameter sized to surround the sputtering surface and substrate support of the sputtering target, the outer cylindrical band including a sputtering surface surrounding the sputtering target An upper portion of the projecting surface; a middle portion; and a lower portion, which surrounds the substrate support seat; a support flange, which has a bearing surface and extends radially outward from the cylindrical outer band; a base plate, which extends from the cylindrical outer band a lower portion extending radially inwardly; and a cylindrical inner band connected to the base plate and partially surrounding the perimeter of the substrate support.
在又一个实施例中,提供一种用于在基材处理腔室中围绕面对支撑座的溅射靶材的上屏蔽。该上屏蔽包含屏蔽部分及用于指向性溅射的整合的流量优化器。In yet another embodiment, an upper shield for surrounding a sputtering target facing a support pedestal in a substrate processing chamber is provided. The upper shield contains a shield portion and an integrated flow optimizer for directional sputtering.
附图说明 Description of drawings
所以,上述简介的本发明的特征可参考对本发明更具体描述的实施例进步理解和叙述,部分实施例示出于附图中。然而要指出的是,附图仅说明本发明的典型实施例,因此不应被视为其范围的限制,本发明亦适用于其它具有同等功效的实施例。Therefore, the features of the invention briefly described above may be further understood and described by reference to a more particularly described embodiment of the invention, some of which are shown in the accompanying drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
图1为具有本文所述的处理套件的一个实施例的半导体处理系统的示意剖面图。FIG. 1 is a schematic cross-sectional view of a semiconductor processing system with one embodiment of the processing kit described herein.
图2为根据本文所述实施例的准直器的俯视平面图。2 is a top plan view of a collimator according to embodiments described herein.
图3为根据本文所述实施例的准直器的示意截面图。3 is a schematic cross-sectional view of a collimator according to embodiments described herein.
图4为根据本文所述实施例的准直器的示意截面图。4 is a schematic cross-sectional view of a collimator according to embodiments described herein.
图5为根据本文所述实施例的准直器的示意截面图。5 is a schematic cross-sectional view of a collimator according to embodiments described herein.
图6为根据本文所述实施例的支架的放大部分截面图,该支架用于将准直器附接至PVD腔室的上屏蔽。6 is an enlarged partial cross-sectional view of a bracket for attaching a collimator to an upper shield of a PVD chamber, according to embodiments described herein.
图7为根据本文所述实施例的支架的部分截面图,该支架用于将准直器附接至PVD腔室的上屏蔽。7 is a partial cross-sectional view of a bracket used to attach a collimator to an upper shield of a PVD chamber, according to embodiments described herein.
图8为具有根据本文所述另一处理套组的半导体处理系统的示意截面图。8 is a schematic cross-sectional view of a semiconductor processing system having another processing kit according to the description herein.
图9A为根据本文所述实施例的单体上屏蔽的部分截面图。9A is a partial cross-sectional view of a shield on a monolith according to embodiments described herein.
图9B为根据本文所述实施例的图9A的单体上屏蔽的俯视平面图。9B is a top plan view of the shield on a monolith of FIG. 9A according to embodiments described herein.
图10A根据本文所述实施例的下屏蔽的截面图。10A is a cross-sectional view of a lower shield according to embodiments described herein.
图10B为图10A的下屏蔽的一个实施例的部分剖面图。Figure 10B is a partial cross-sectional view of one embodiment of the lower shield of Figure 10A.
图10C为图10A的下屏蔽的一个实施例的俯视图。Figure 10C is a top view of one embodiment of the lower shield of Figure 10A.
具体实施方式 Detailed ways
本文所描述的实施例提供在基材上制造集成电路期间用于横越基材的高深宽比特征结构来均匀沉积溅射材料的设备及方法。Embodiments described herein provide apparatus and methods for uniformly depositing sputtered material across high aspect ratio features of a substrate during the fabrication of integrated circuits on the substrate.
图1示出处理腔室100的范例实施例,该处理腔室100具有可处理基材154的处理套组140的一个实施例。处理套组140包括单件式下屏蔽180、单件式上屏蔽186以及准直器110。在所示出的实施例中,处理腔室100包含可在基材上沉积诸如钛、氧化铝、铝、铜、钽、氮化钽、钨、或氮化钨的溅射腔室,亦称为物理气相沉积(PVD)腔室。适当的PVD腔室范例包括皆可购自加州圣塔克拉拉应用材料公司的ALPSPlus及SIPENCOREPVD处理腔室。应了解也可利用得自其它制造商的处理腔室来实行本文所述的实施例。FIG. 1 illustrates an example embodiment of a
腔室100包括溅射源,例如具有溅射表面145的靶材142,及具有周边边缘153的基材支撑座152,该基材支撑座152用于接收半导体基材154于其上。该基材支撑座可位于接地腔室壁150中。The
在一个实施例中,腔室100包括经由介电隔离器146由接地导电配接器144支撑的靶材142。靶材142包含在溅射期间待被沉积至基材154的表面上的材料,并包括用于形成于基材154内的高深宽比特征结构中做为种晶层沉积的铜。在一个实施例中,靶材142也可包括可溅射材料(例如铜)的金属表面层的黏合组成物,及结构材料的背层(例如铝)。In one embodiment, the
在一个实施例中,座152支撑待被溅射涂覆的基材154,其中该基材154具有高深宽比的特征结构,其底部相对于靶材142的主要表面是平面的。基材支撑座152具有通常平行靶材142的溅射表面来设置的平面基材接收表面。座152可垂直地穿过伸缩囊(bellow)158移动,其中该伸缩囊158连接至底部腔室壁160以允许基材经由在腔室100的下部分中的负载锁定阀(未示出)被输送至座152上。座152可随后升高至如所示的沉积位置。In one embodiment, the
在一个实施例中,可从气体源162经由质流控制器164将处理气体供应至腔室100的下部分中。在一个实施例中,可使用连接至腔室100的可控制直流(DC)功率源148来对靶材142施加负电压或偏压。射频(RF)功率源156可连接至座152以在基材154上诱导DC自偏压。在一个实施例中,座152接地。在一个实施例中,座152是电气浮置的。In one embodiment, process gas may be supplied into the lower portion of the
在一个实施例中,将磁控管170定位在靶材142上方。磁控管170可包括多个磁铁172,该等磁铁172通过连接到轴176的基底板174所支撑,轴176可轴向对准腔室100及基材154的中央轴。在一个实施例中,该磁铁呈肾形(kidney-shaped)图案排列。磁铁172在腔室100内靠近靶材142的正面处产生磁场以生成等离子体,而使得大量的离子流撞击靶材142,致使靶材材料溅射出来。磁铁172可围绕轴176旋转以增加横跨靶材142表面的磁场的均匀性。在一个实施例中,磁控管170是小磁铁磁控管。在一个实施例中,磁铁172皆可在实质平行靶材面的线性方向上相互旋转与移动以产生螺旋运动。在一个实施例中,磁铁172可围绕中央轴及独立控制的第二轴旋转以控制其径向位置及角度位置。In one embodiment,
在一个实施例中,腔室100包括接地下屏蔽180,该接地下屏蔽180具有通过腔室侧壁150来支撑并连接至腔室侧壁150的支撑凸缘182。上屏蔽186通过配接器144的凸缘184来支撑并连接至配接器144的凸缘184。上屏蔽186及下屏蔽180如配接器144与腔室壁150的电气连接方式来连接。在一个实施例中,上屏蔽186及下屏蔽180皆包含不锈钢。在一个实施例中,腔室100包括连接至上屏蔽186的中屏蔽(未示出)。在一个实施例中,上屏蔽186及下屏蔽180是在腔室100内电气浮置的。在一个实施例中,上屏蔽186及下屏蔽180可连接至电功率源。In one embodiment, the
在一个实施例中,上屏蔽186具有上部分,该上部分以窄间隙188(介于上屏蔽186及靶材142之间)紧密贴合靶材142之环形侧凹槽,该窄间隙188窄到足以防止等离子体穿透并溅射涂覆该介电隔离器146。上屏蔽186也可包括向下突出的顶部190,顶部190覆盖下屏蔽180与上屏蔽186之间的接口,从而防止该等屏蔽通过溅射沉积材料连结。In one embodiment, the
在一个实施例中,下屏蔽180向下延伸至圆柱状外侧带196,该圆柱状外侧带196通常沿着腔室壁150延伸至低于座152之顶表面处。下屏蔽180可具有从圆柱状外侧带196向内径向延伸的基底板198。基底板198可包括环绕座152的周缘而向上延伸的圆柱状内侧带103。在一个实施例中,当座152处于下方的装载位置时,覆盖环102支承在圆柱状内侧带103的顶部;当座处于上方的沉积位置时,覆盖环102支承在座152的外周缘以保护座152不会受到溅射沉积。In one embodiment, the
下屏蔽180环绕靶材142面对支撑座152的溅射表面145并环绕支撑座152的周壁。下屏蔽160覆盖并遮蔽腔室100的腔室壁150以减少源自溅射靶材142的溅射表面145的溅射沉积物沉积至下屏蔽180背面的部件及表面上。举例来说,下屏蔽180可保护支撑座152的表面、基材154的多个部分、腔室壁150、及腔室100的底壁160。The
在一个实施例中,可通过在靶材142及基材支撑座152之间定位准直器110而达成指向性溅射。准直器110可以机械式或电气式连接至上屏蔽186。在一个实施例中,准直器110可连接至定位在腔室100较低处的中屏蔽(未示出)。在一个实施例中,准直器110整合至上屏蔽186,如图8中所示。在一个实施例中,准直器110经焊接至上屏蔽186。在一个实施例中,准直器110可在腔室100内电气浮置的。在一个实施例中,准直器110可连接至电功率源。准直器110包括用以在腔室内引导气体及(或)材料流的多个孔口(在图1中省略)。In one embodiment, directional sputtering can be achieved by positioning the
图2为准直器110的一个实施例的俯视平面视图。准直器110通常为紧密堆积的蜂巢结构,该蜂巢结构具有用于分隔六角形孔口128的六角形壁126。六角形孔口128的深宽比可界定为孔口128的深度(等于准直器的厚度)除以孔128的宽度129。在一个实施例中,壁126的厚度介于约0.06英寸至约0.18英寸。在一个实施例中,壁126的厚度介于约0.12英寸至约0.15英寸。在一个实施例中,准直器包含选自铝、铜、及不锈钢的材料。FIG. 2 is a top plan view of one embodiment of the
图3为根据本文所述的一个实施例的准直器310的示意截面图。准直器310包括中央区域320,其具有高深宽比,例如从约1.5∶1至约3∶1。在一个实施例中,中央区域320的深宽比约2.5∶1。准直器310的深宽比沿着径向方向从中央区域320至外周边区域340而减少。在一个实施例中,准直器310的深宽比从中央区域320至周边区域340,深宽比从约2.5∶1减少至约1∶1。在另一个实施例中,准直器310的深宽比从中央区域320至周边区域340,深宽比从约3∶1减少至约1∶1。在一个实施例中,准直器310的深宽比从中央区域320至周边区域340,深宽比从约1.5∶1减少至约1∶1。FIG. 3 is a schematic cross-sectional view of a
在一个实施例中,通过改变准直器310的厚度来完成准直器310的径向孔的减少。在一个实施例中,准直器310的中央区域320具有增加的厚度,例如介于约3英寸至约6英寸之间。在一个实施例中,准直器310的中央区域320的厚度为约5英寸。在一个实施例中,准直器310的厚度从中央区域320至周边区域340,厚度从约5英寸径向减少至约2英寸。在一个实施例中,准直器310的厚度从中央区域320至周边区域340,厚度从约6英寸径向减少至约2英寸。在一个实施例中,准直器310的厚度从中央区域320,厚度从约2.5英寸径向减少至约2英寸。In one embodiment, the reduction in the radial aperture of the
尽管图3中的准直器310的实施例的深宽比变化显示径向减少的厚度,也可通过从中央区域320至周边区域340增加准直器310孔口的宽度来减少深宽比。在另一个实施例中,准直器310的厚度从中央区域320至周边区域340减少且准直器310的宽度从中央区域320至周边区域340增加。Although the aspect ratio variation of the embodiment of the
一般而言,图3中的实施例示出以线性方式径向减少而获得倒圆锥形形状的深宽比。本发明的其它实施例可包括非线性减少的深宽比。In general, the embodiment in Figure 3 shows an aspect ratio that decreases radially in a linear fashion to obtain an inverse conical shape. Other embodiments of the invention may include non-linearly reduced aspect ratios.
图4为根据本发明的一个实施例的准直器410的示意截面图。准直器410具有以非线性方式从中央区域420至周边区域440减少而获得凸形形状的厚度。FIG. 4 is a schematic cross-sectional view of a
图5为根据本发明的一个实施例的准直器510的示意截面图。准直器510具有以非线性方式从中央区域520至周边区域540减少而获得凹形形状的厚度。FIG. 5 is a schematic cross-sectional view of a
在些实施例中,中央区域320、420、520将近为零,使得中央区域320、420、520在准直器310、410、510的底部呈现为点。In some embodiments, the
回头参看图1,无论准直器110径向减少的深宽比的实际形状,PVD处理腔室100的操作与准直器110的功能是相似的。系统控制器101设置在腔室100的外侧且通常有利于整体系统的控制及自动化。系统控制器101可包括中央处理单元(CPU)(未示出)、内存(未示出)、及支持电路(未示出)。CPU可为任何在工业设备中用于控制多种系统功能及腔室处理的计算机处理器。Referring back to FIG. 1 , regardless of the actual shape of the
在一个实施例中,系统控制器101提供讯号以定位基材支撑座152上的基材154并在腔室100中产生等离子体。系统控制器101发送讯号以透过DC功率源148施加电压来偏压靶材142并将处理气体(例如,氩)激发成等离子体。系统控制器101可进一步提供讯号以致使RF功率源156来DC自偏压该座152。DC自偏压有助于吸引等离子体中产生的带正电离子深入至基材表面上的高深宽比的孔及凹槽中。In one embodiment,
准直器110实行如过滤器的功能以捕陷从靶材142以超过选定角度(几乎垂直基材154)的角度发射出的离子及中性粒子。准直器110可为分别示出于图3、4、5中的准直器310、410、510中的一者。具有从中心径向减少深宽比的特性的准直器110允许从靶材142的周边区域发射出的较大百分比的离子可通过准直器110。因此,可同时增加沉积在基材154的周边区域的离子数以及离子到达的角度。因此,根据本发明实施例,可更均匀地横跨基材154的表面来溅射沉积材料。另外,可更均匀地在高深宽比特征结构的底部及侧壁沉积材料,特别是位在靠近基材154周边的具有高深宽比的孔及凹槽。The
另外,为了在具有高深宽比的特征结构的底部及侧壁提供更大覆盖率的溅射沉积材料,可溅射蚀刻被溅射沉积在特征结构的场域与底部区域上的材料。在一个实施例中,系统控制器101施加高偏压至座152使得靶材142离子蚀刻已沉积在基材154上的膜。因此,减少沉积至基材154上的场沉积速率,且溅射材料再沉积至具有高深宽比的特征结构的侧壁或底部。在一个实施例中,系统控制器101以脉冲或交替方式施加高偏压及低偏压至座152,使得处理变成脉冲沉积/蚀刻处理。在一个实施例中,特别是位于磁铁172下方的准直器110单元引导大量沉积材料朝向基材154。因此,在任何特定时间,可在基材154中的一个区域沉积材料,同时可蚀刻已经沉积在基材154的另一区域的材料。Additionally, in order to provide greater coverage of sputter-deposited material on the bottom and sidewalls of features having high aspect ratios, the material sputter-deposited on the field and bottom regions of the feature may be sputter etched. In one embodiment,
在一个实施例中,为了在具有高深宽比的特征结构的侧壁上提供更大覆盖率的溅射沉积材料,可使用诸如氩等离子体的二级等离子体(其产生在腔室中靠近基材154的区域)来溅射蚀刻被溅射沉积在特征结构的底部的材料。在一个实施例中,腔室100包括RF线圈141,该RF线圈通过多个线圈间隔物143附接至下屏蔽180,该等线圈间隔物143将线圈141与下屏蔽180电气绝缘。系统控制器101发送讯号以透过馈通间距(feedthrough standoff)(未示出)经由屏蔽180将RF功率施加至线圈141。在一个实施例中,RF线圈将RF能量感应式连接至腔室100的内部以离子化前驱物气体(例如氩)而维持靠近基材154的二级等离子体。二级等离子体从高深宽比特征结构的底部再溅射沉积层并再沉积材料至特征结构的侧壁上。In one embodiment, to provide greater coverage of sputter-deposited material on the sidewalls of features with high aspect ratios, a secondary plasma such as an argon plasma (generated in the chamber close to the substrate) can be used. region of material 154) to sputter etch the material that was sputter deposited on the bottom of the feature. In one embodiment, the
仍旧参照图1,准直器110可通过多个径向支架111附接至上屏蔽186。Still referring to FIG. 1 , the
图6为根据本发明实施例用于将准直器110附接至上屏蔽186的支架611的放大截面视图。支架611包括内螺纹管613,该内螺纹管613焊接至准直器110并从准直器110径向向外延伸。紧固构件615(例如螺栓)可插入上屏蔽186的孔口中并螺纹旋入管613中以将准直器110附接至上屏蔽186,同时使可能沉积在管613或紧固构件615的螺纹部分的材料减到最少。6 is an enlarged cross-sectional view of
图7为根据本发明的另一个实施例用于将准直器110附接至上屏蔽186的支架711的放大截面视图。支架711包括螺椿713,该螺椿713焊接至准直器110并从准直器110径向向外延伸。可将内螺纹紧固构件715插入并穿过上屏蔽186中的孔口并螺纹旋至螺椿713上以将准直器110附接至上屏蔽186,同时使可能沉积在螺椿713或紧固构件715的螺纹部分的材料减到最少。7 is an enlarged cross-sectional view of a
图8为具有本文所述的处理套组840的另一个实施例的半导体处理系统800的示意截面图。相似于处理套组140,处理套组840包括单件式下屏蔽180。然而,不像包含透过径向支架111连接至上屏蔽186的分离准直器110的处理套组140,处理套组840包括单体上屏蔽886,该上屏蔽886包含屏蔽部分892及整合的通量优化器部分810。单体上屏蔽886的单体结构允许冷却效率的最大化。整合的通量优化器部分810包括如上述在腔室内引导气体及(或)材料通量的多个孔口(在图8中省略)。8 is a schematic cross-sectional view of a
图9A为根据本文所述实施例的单体上屏蔽886的部分截面图。图9B为根据本文所述实施例的图9A之单体上屏蔽886的上平面视图。调整单体上屏蔽886的尺寸以围绕面对支撑座152的溅射靶材142的溅射表面145。单体上屏蔽886遮蔽腔室100的配接器144以减少源自溅射靶材142的溅射表面145而溅射沉积的沉积物。FIG. 9A is a partial cross-sectional view of a monolithic
如图8、9A及9B中所示,单体上屏蔽886为单结构且包含屏蔽部分892与整合的通量优化器部分810。例如,屏蔽部分892及整合的通量优化器部分810可由单块(single mass)材料来制造。屏蔽部分892包含圆柱状带902。圆柱状带902包含顶壁904及底壁906。支撑凸缘908从圆柱状带902的顶壁904径向向外延伸。支撑凸缘908包含支承表面910,用以支承腔室800的配接器144。在一个实施例中,支承表面910和底壁906相交而形成90度角。在一个实施例中,支撑凸缘908具有多个狭缝,该狭缝经塑型以接收将上屏蔽892对准至配接器144的插销。在一个实施例中,支撑凸缘908具有或多个环绕圆柱状带902呈周期性定位的凹口940。As shown in FIGS. 8 , 9A and 9B , monolithic
如图9A中所示,顶壁904进一步包含顶表面925、内周边926、及外周边928。顶壁904的外周边和支撑凸缘908相交以形成梯状部分932。As shown in FIG. 9A , top wall 904 further includes a top surface 925 , an inner perimeter 926 , and an outer perimeter 928 . The outer perimeter of top wall 904 and support flange 908 meet to form stepped portion 932 .
在一个实施例中,如图8中所示,圆柱状带902的底璧906具有外直径(以箭头“A”示出),经调整尺寸以在配接器144中贴合并支承下屏蔽180的梯状部分1032(示出于图10B)。在一个实施例中,底壁906的外直径“A”介于约18英寸(45.7cm)至约18.5英寸(47cm)之间。在另一个实施例中,底壁906的外直径“A”介于约18.1英寸(46cm)至约18.2英寸(46.2cm)之间。在一个实施例中,圆柱状带902具有以箭头“B”示出的内直径。在一个实施例中,圆柱状带902的内直径“B”介于约17.2英寸(43.7cm)至约17.9英寸(45.5cm)之间。在另一个实施例中,圆柱状带902的内直径“B”介于约17.5英寸(44.5cm)至约17.7英寸(45cm)之间。在一个实施例中,顶壁904具有以箭头“C”示出的外直径。在一个实施例中,顶壁904及底壁906具有相同内直径“B”。In one embodiment, as shown in FIG. 8 , the bottom wall 906 of the cylindrical band 902 has an outer diameter (shown by arrow "A") sized to fit and support the
在一个实施例中,顶壁904的外直径“C”介于约18英寸(45.7cm)至约18.5英寸(47cm)之间。在另一个实施例中,顶壁904的外直径“C”介于约18.3英寸(46.5cm)至约18.4英寸(46.7cm)之间。在一个实施例中,顶壁904的外直径“C”大于底壁906的外直径“A”。In one embodiment, the outer diameter "C" of the top wall 904 is between about 18 inches (45.7 cm) and about 18.5 inches (47 cm). In another embodiment, the outer diameter "C" of the top wall 904 is between about 18.3 inches (46.5 cm) and about 18.4 inches (46.7 cm). In one embodiment, the outer diameter "C" of the top wall 904 is greater than the outer diameter "A" of the bottom wall 906 .
可相似于分别示出在图3、4及5中的准直器310、410或510中之一者来设计整合的通量优化器部分810。如图9B中所示,整合的通量优化器部分810通常为紧密堆积组态的蜂巢结构,该蜂巢结构具有用于分隔六角形孔口944的六角形壁942。六角形孔口944的深宽比可界定为孔口944的深度(等于整合的通量优化器部分810的厚度)除以孔口的宽度946。在一个实施例中,邻近屏蔽部分892的六角形壁942具有斜面(chamfer)950及半径。The integrated
在一个实施例中,单体上屏蔽886可由单块铝经机械成形。单体上屏蔽886可选择性经涂覆或经阳极处理。或者,单体上屏蔽886可由与处理环境兼容的其它材料制成,并且也可包含或多个区段。或者,上屏蔽的屏蔽部分892及整合的通量优化器部分810可以个别片段形成且使用适当的附接方式(诸如焊接)连接在起。In one embodiment, the monolithic
图10A及10B为根据本文所述实施例的下屏蔽的部分截面视图。图10C为图10A的下屏蔽之一个实施例的俯视图。如图1及10A-10C所示,下屏蔽180为单结构且包含圆柱状外侧带196、基底板198及内侧圆柱状带103。圆柱状外侧带196具有经调整尺寸以围绕溅射靶材142的溅射表面145与座152之周边边缘153的直径。圆柱状外侧带196包含上部分1012、中间部分1014、及下部分1016。上部分1012经调整尺寸以围绕溅射靶材142的溅射表面145。支撑凸缘182从该圆柱状外侧带196的上部分1012径向向外延伸。支撑凸缘182包含用以支承腔室100的腔室壁150的支承表面1024。支承表面1024可具有多个狭缝,该狭缝经塑形以接收将下屏蔽180对准至腔室壁150的插销或任何定位在腔室壁150与下屏蔽180之间的配接器。在一个实施例中,支承表面1024具有约10至约80微英寸(microinch)的表面粗糙度,甚至约16至约63微英寸,或在一个实施例中,约32微英寸的表面粗糙度。10A and 10B are partial cross-sectional views of a lower shield according to embodiments described herein. Figure 10C is a top view of one embodiment of the lower shield of Figure 10A. As shown in FIGS. 1 and 10A-10C ,
如图10B中所示,上部分1012包含顶表面1025、内周边1026、及外周边1028。外周边1028向上延伸至顶表面1025上方以形成环形唇部1030。环形唇部1030形成具有顶表面1025的梯状部分1032。在一个实施例中,环形唇部1030经垂直该顶表面1025定位以形成梯状部分1032。梯状部分1032提供支承表面以接合上屏蔽186。As shown in FIG. 10B ,
在一个实施例中,环形唇部1030具有以箭头“D”示出的外直径。在一个实施例中,环形唇部1030的外直径“D”介于约18.4英寸(46.7cm)至约18.7英寸(47.5cm)之间。在另一个实施例中,环形唇部1030的外直径“D”介于约18.5英寸(47cm)至约18.6英寸(47.2cm)之间。在一个实施例中,环形唇部1030具有以箭头“E”示出的内直径。在一个实施例中,环形唇部1030的内直径“E”介于约18.2英寸(46.2cm)至约18.5英寸(47cm)之间。在另一个实施例中,环形唇部1030的内直径“E”介于约18.3英寸(46.5cm)至约18.4英寸(46.7cm)之间。In one embodiment,
在一个实施例中,顶表面1025的外直径相同于环形唇部1030的内直径“E”。在一个实施例中,顶表面具有以箭头“F”示出的内直径。在一个实施例中,顶表面1025的内直径“F”介于约17.2英寸(43.7cm)至约18英寸(45.7cm)之间。在另一个实施例中,顶表面1025的内直径“F”介于约17.5英寸(44.5cm)至约17.6英寸(44.7cm)之间。In one embodiment, the outer diameter of the
在一个实施例中,顶表面1025的外直径相同于环形唇部1030的内直径“E”。在一个实施例中,顶表面具有以箭头“F”图标的内直径。在一个实施例中,顶表面1025的内直径“F”介于约17.2英寸(43.7cm)至约18英寸(45.7cm)之间。在另一个实施例中,顶表面1025的内直径“F”介于约17.5英寸(44.5cm)至约17.6英寸(44.7cm)之间。In one embodiment, the outer diameter of the
在一个实施例中,上部分1012的内周边1026从垂直方向以角度α径向向外成角。在一个实施例中,角度α与垂直方向的夹角是约2°至约10°。在一个实施例中,角度α与垂直方向的夹角是约4°。In one embodiment, the
下部分1016经调整尺寸以围绕座152。基底板198从圆柱状外侧带196的下部分1016径向向内延伸。圆柱状内侧带103与基底板198连接且经调整尺寸以围绕座152。圆柱状内侧带103、基底板198、及圆柱状外侧带196形成U形信道。圆柱状内侧带103包含低于圆柱状外侧带196的高度的高度。在一个实施例中,内侧圆柱状带103的高度约为圆柱状外侧带196的高度的五分之一。在一个实施例中,中间部分1014具有凹口1040。在一个实施例中,圆柱状外侧带196具有多个气体孔1042。
在一个实施例中,基底板198具有以箭头“G”图标的外直径。在一个实施例中,基底板198的外直径“G”介于约17英寸(43.2cm)至约17.4英寸(44.2cm)之间。在另一个实施例中,基底板198的外直径“G”介于约17.1英寸(43.4cm)至约17.2英寸(43.7cm)之间。在一个实施例中,基底板198具有以箭头“I”图标的内直径。在一个实施例中,基底板198的内直径“I”介于约13.9英寸(35.3cm)至约14.4英寸(36.6cm)之间。在另一个实施例中,基底板198的内直径“I”介于约14英寸(35.6cm)至约14.1英寸(35.8cm)之间。In one embodiment,
在一个实施例中,内侧圆柱状带103具有以箭头“H”图标的外直径。在一个实施例中,内侧圆柱状带的外直径“H”介于约14.0英寸(35.6cm)至约14.3英寸(36.3cm)之间。在另一个实施例中,内侧圆柱状带103具有以箭头“H”图标的外直径。在一个实施例中,内侧圆柱状带103的外直径“H”介于约14.2英寸(36.1cm)至约14.3英寸(36.3cm)之间。In one embodiment, the inner
在一个实施例中,圆柱状外侧带196、基底板198、及内侧圆柱状带103包含单一结构。单下屏蔽180优于已知包括多个部件(通常以二或三个个别的片段来组装整个下屏蔽)的屏蔽。举例来说,在加热及冷却处理中,单片段屏蔽较多部件的屏蔽更为热均匀。举例来说,单片段下屏蔽180与腔室壁150仅具有一个热接触面,从而更能控制屏蔽180与腔室壁150之间的热交换。具有多个屏蔽部件的屏蔽180使清洁时移除屏蔽变得更为困难及费力。单片段屏蔽180具有暴露于溅射沉积的连续表面而不具有难以清洁的接口或角落。单片段屏蔽180也可有效地在处理循环期间屏蔽腔室壁150免于溅射沉积。In one embodiment, cylindrical
在一个实施例中,上屏壁186、886及(或)下屏壁180可由300系列不锈钢制成,或在其它实施例中,可由铝制成。在一个实施例中,上屏壁186、886及(或)下屏壁180的暴露表面以CLEANCOATTW处理,其可购自加州圣塔克拉拉的Applied Materials公司。CLEANCOATTW是施加至基材处理腔室部件(例如,上屏壁186、886及(或)下屏壁180)的双芯铝电弧喷涂(twin-wire aluminum arc spray coating),以减少粒子脱落而沉积在屏蔽上,从而防止腔室中的基材的污染。在一个实施例中,在上屏壁186、886及(或)下屏壁180上的双芯铝电弧喷涂具有自约600至约2300微英寸的表面粗糙度。In one embodiment, the
上屏壁186、886及(或)下屏壁180具有在腔室100、800中面对内部空间的暴露表面。在一个实施例中,暴露表面经珠粒喷击(bead blasted)以具有175±75微英寸的表面粗糙度。纹理化的珠粒喷击表面用于减少粒子脱落并防止腔室100、800内的污染。表面粗糙度的平均值是从暴露表面的粗糙度特征峰部至谷部的平均线的位移绝对值的平均。粗糙度平均值、偏斜度或其它性质可由轮廓仪来判定,该轮廓仪在暴露表面上移动针头并产生表面上粗糙度的高度扰动的轨迹,或通过使用自表面反射电子束的扫描电子显微镜来产生表面的影像。The
虽然前文针对本发明的实施例,但是在不脱离本发明的基本范围的情况下,可设计本发明的其它及另外实施例,且本发明的范围由以下权利要求确定。While the foregoing is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from the essential scope of the invention, which is defined by the following claims.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105225911A (en) * | 2014-06-30 | 2016-01-06 | 细美事有限公司 | Substrate processing apparatus |
| CN105887026A (en) * | 2015-02-13 | 2016-08-24 | 台湾积体电路制造股份有限公司 | Physical vapor deposition system and physical vapor deposition method using same |
| CN106987815A (en) * | 2015-10-27 | 2017-07-28 | 应用材料公司 | Biasable Flux Optimizer/Collimator for PVD Sputtering Chambers |
| CN107002220A (en) * | 2014-11-26 | 2017-08-01 | 应用材料公司 | Collimators used in substrate processing chambers |
| CN107614740A (en) * | 2016-03-14 | 2018-01-19 | 株式会社东芝 | Processing Unit and Collimator |
| CN115198236A (en) * | 2021-06-18 | 2022-10-18 | 台湾积体电路制造股份有限公司 | Deposition system and deposition method |
| CN115449762A (en) * | 2022-08-22 | 2022-12-09 | 无锡尚积半导体科技有限公司 | A collimator for magnetron sputtering equipment and magnetron sputtering equipment |
| CN119546797A (en) * | 2022-07-18 | 2025-02-28 | 霍尼韦尔国际公司 | Device for reducing misalignment between sputtering target and shield |
| US12331392B2 (en) | 2021-07-23 | 2025-06-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Deposition system and method |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8702918B2 (en) * | 2011-12-15 | 2014-04-22 | Applied Materials, Inc. | Apparatus for enabling concentricity of plasma dark space |
| US11424112B2 (en) * | 2017-11-03 | 2022-08-23 | Varian Semiconductor Equipment Associates, Inc. | Transparent halo assembly for reduced particle generation |
| US20230335941A1 (en) | 2021-06-11 | 2023-10-19 | Schott Japan Corporation | Hermetic terminal and manufacturing method of same |
| KR102594388B1 (en) * | 2021-08-24 | 2023-10-27 | 전주대학교 산학협력단 | SDN-based packet scheduling method for transmitting emergency data in MEC environments |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5415753A (en) * | 1993-07-22 | 1995-05-16 | Materials Research Corporation | Stationary aperture plate for reactive sputter deposition |
| JPH093639A (en) * | 1995-06-23 | 1997-01-07 | Applied Materials Inc | Pvd device |
| US20030015421A1 (en) * | 2001-07-20 | 2003-01-23 | Applied Materials, Inc. | Collimated sputtering of cobalt |
| US6780294B1 (en) * | 2002-08-19 | 2004-08-24 | Set, Tosoh | Shield assembly for substrate processing chamber |
| US20070102286A1 (en) * | 2005-10-31 | 2007-05-10 | Applied Materials, Inc. | Process kit and target for substrate processing chamber |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11200029A (en) * | 1998-01-13 | 1999-07-27 | Victor Co Of Japan Ltd | Sputtering device |
| JP2004083984A (en) * | 2002-08-26 | 2004-03-18 | Fujitsu Ltd | Sputtering equipment |
| JP2007273490A (en) * | 2004-03-30 | 2007-10-18 | Renesas Technology Corp | Manufacturing method of semiconductor integrated circuit device |
| TW200746268A (en) * | 2006-04-11 | 2007-12-16 | Applied Materials Inc | Process for forming cobalt-containing materials |
-
2010
- 2010-04-06 CN CN2010800064499A patent/CN102301451A/en active Pending
- 2010-04-06 KR KR1020117028097A patent/KR101782355B1/en not_active Expired - Fee Related
- 2010-04-06 WO PCT/US2010/030116 patent/WO2010123680A2/en not_active Ceased
- 2010-04-06 KR KR1020187035627A patent/KR102020010B1/en not_active Expired - Fee Related
- 2010-04-06 KR KR1020197025908A patent/KR102186535B1/en active Active
- 2010-04-06 KR KR1020207034181A patent/KR102262978B1/en active Active
- 2010-04-06 CN CN201710120243.2A patent/CN107039230A/en active Pending
- 2010-04-06 KR KR1020217013278A patent/KR102374073B1/en active Active
- 2010-04-06 KR KR1020177017742A patent/KR101929971B1/en active Active
- 2010-04-07 TW TW110122261A patent/TWI789790B/en active
- 2010-04-07 TW TW099110795A patent/TWI527921B/en active
- 2010-04-07 TW TW111117130A patent/TWI844851B/en active
- 2010-04-07 TW TW109128551A patent/TWI741750B/en not_active IP Right Cessation
- 2010-04-07 TW TW105104782A patent/TWI605144B/en active
- 2010-04-07 TW TW108140207A patent/TWI715279B/en active
- 2010-04-07 TW TW108104471A patent/TWI695078B/en active
- 2010-04-07 TW TW106134224A patent/TWI654329B/en active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5415753A (en) * | 1993-07-22 | 1995-05-16 | Materials Research Corporation | Stationary aperture plate for reactive sputter deposition |
| JPH093639A (en) * | 1995-06-23 | 1997-01-07 | Applied Materials Inc | Pvd device |
| US20030015421A1 (en) * | 2001-07-20 | 2003-01-23 | Applied Materials, Inc. | Collimated sputtering of cobalt |
| US6780294B1 (en) * | 2002-08-19 | 2004-08-24 | Set, Tosoh | Shield assembly for substrate processing chamber |
| US20070102286A1 (en) * | 2005-10-31 | 2007-05-10 | Applied Materials, Inc. | Process kit and target for substrate processing chamber |
Cited By (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10755899B2 (en) | 2014-06-30 | 2020-08-25 | Semes Co., Ltd. | Substrate treating apparatus |
| CN105225911A (en) * | 2014-06-30 | 2016-01-06 | 细美事有限公司 | Substrate processing apparatus |
| CN107002220B (en) * | 2014-11-26 | 2020-04-17 | 应用材料公司 | Collimator for use in a substrate processing chamber |
| CN107002220A (en) * | 2014-11-26 | 2017-08-01 | 应用材料公司 | Collimators used in substrate processing chambers |
| CN109338293A (en) * | 2014-11-26 | 2019-02-15 | 应用材料公司 | Collimators used in substrate processing chambers |
| CN105887026A (en) * | 2015-02-13 | 2016-08-24 | 台湾积体电路制造股份有限公司 | Physical vapor deposition system and physical vapor deposition method using same |
| US9887073B2 (en) | 2015-02-13 | 2018-02-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Physical vapor deposition system and physical vapor depositing method using the same |
| CN105887026B (en) * | 2015-02-13 | 2019-10-15 | 台湾积体电路制造股份有限公司 | Physical vapor deposition system and physical vapor deposition method using same |
| US10727033B2 (en) | 2015-10-27 | 2020-07-28 | Applied Materials, Inc. | Biasable flux optimizer / collimator for PVD sputter chamber |
| CN110438464A (en) * | 2015-10-27 | 2019-11-12 | 应用材料公司 | For PVD sputtering chamber can voltage bias type flux optimizer/collimator |
| CN106987815A (en) * | 2015-10-27 | 2017-07-28 | 应用材料公司 | Biasable Flux Optimizer/Collimator for PVD Sputtering Chambers |
| CN112030123A (en) * | 2015-10-27 | 2020-12-04 | 应用材料公司 | Biasable flux optimizer/collimator for PVD sputtering chamber |
| US11309169B2 (en) | 2015-10-27 | 2022-04-19 | Applied Materials, Inc. | Biasable flux optimizer / collimator for PVD sputter chamber |
| CN107614740A (en) * | 2016-03-14 | 2018-01-19 | 株式会社东芝 | Processing Unit and Collimator |
| CN107614740B (en) * | 2016-03-14 | 2020-12-29 | 株式会社东芝 | Processing Units and Collimators |
| CN115198236A (en) * | 2021-06-18 | 2022-10-18 | 台湾积体电路制造股份有限公司 | Deposition system and deposition method |
| CN115198236B (en) * | 2021-06-18 | 2024-03-08 | 台湾积体电路制造股份有限公司 | Deposition system and deposition method |
| US12331392B2 (en) | 2021-07-23 | 2025-06-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Deposition system and method |
| CN119546797A (en) * | 2022-07-18 | 2025-02-28 | 霍尼韦尔国际公司 | Device for reducing misalignment between sputtering target and shield |
| CN115449762A (en) * | 2022-08-22 | 2022-12-09 | 无锡尚积半导体科技有限公司 | A collimator for magnetron sputtering equipment and magnetron sputtering equipment |
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| KR102262978B1 (en) | 2021-06-08 |
| KR102186535B1 (en) | 2020-12-03 |
| TWI695078B (en) | 2020-06-01 |
| TWI527921B (en) | 2016-04-01 |
| TWI741750B (en) | 2021-10-01 |
| TW202000961A (en) | 2020-01-01 |
| TWI715279B (en) | 2021-01-01 |
| KR102374073B1 (en) | 2022-03-11 |
| TW202102703A (en) | 2021-01-16 |
| TW201920726A (en) | 2019-06-01 |
| KR102020010B1 (en) | 2019-09-09 |
| TW202307237A (en) | 2023-02-16 |
| KR101782355B1 (en) | 2017-09-27 |
| CN107039230A (en) | 2017-08-11 |
| KR20210052600A (en) | 2021-05-10 |
| TWI605144B (en) | 2017-11-11 |
| KR20190105132A (en) | 2019-09-11 |
| WO2010123680A3 (en) | 2011-01-13 |
| KR20170076824A (en) | 2017-07-04 |
| KR20200136061A (en) | 2020-12-04 |
| TWI844851B (en) | 2024-06-11 |
| TW202136549A (en) | 2021-10-01 |
| KR20180133566A (en) | 2018-12-14 |
| TWI654329B (en) | 2019-03-21 |
| WO2010123680A2 (en) | 2010-10-28 |
| TW201814075A (en) | 2018-04-16 |
| KR101929971B1 (en) | 2018-12-18 |
| TW201100571A (en) | 2011-01-01 |
| TWI789790B (en) | 2023-01-11 |
| TW201634719A (en) | 2016-10-01 |
| KR20140014378A (en) | 2014-02-06 |
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