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CN102291129A - Phase-locked loop circuit used for inhibiting VCO (voltage-controlled oscillator) voltage ripple - Google Patents

Phase-locked loop circuit used for inhibiting VCO (voltage-controlled oscillator) voltage ripple Download PDF

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CN102291129A
CN102291129A CN2011101465962A CN201110146596A CN102291129A CN 102291129 A CN102291129 A CN 102291129A CN 2011101465962 A CN2011101465962 A CN 2011101465962A CN 201110146596 A CN201110146596 A CN 201110146596A CN 102291129 A CN102291129 A CN 102291129A
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transmission gate
vco
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CN102291129B (en
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梁筱
韩雁
杨伟伟
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Zhejiang University ZJU
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Abstract

本发明公开了一种用于抑制VCO电压纹波的锁相环电路,包括鉴频鉴相器、电荷泵、自动频带选择器、环路滤波器、压控振荡器、分频器和第一传输门。本发明通过采用传输门作为模式切换开关,减小了由于传统MOS管在锁相环不同工作模式切换时所引起的VCO控制电压纹波,减小了电荷注入和时钟馈通,从而达到抑制VCO电压纹波的目的;同时本发明将传输门嵌入到三阶环路滤波器中,既起到锁相环不同工作模式切换的作用,又利用了传输门的导通电阻作为三阶环路滤波器的电阻,有效地滤除了噪声,从而大大减小了由于噪声而导致的VCO电压纹波。

Figure 201110146596

The invention discloses a phase-locked loop circuit for suppressing VCO voltage ripple, which includes a frequency and phase detector, a charge pump, an automatic frequency band selector, a loop filter, a voltage-controlled oscillator, a frequency divider and a first Portal. The invention reduces the VCO control voltage ripple caused by the traditional MOS tube when switching between different working modes of the phase-locked loop by using the transmission gate as the mode switching switch, and reduces the charge injection and clock feedthrough, thereby achieving the purpose of suppressing the VCO The purpose of the voltage ripple; at the same time, the present invention embeds the transmission gate in the third-order loop filter, which not only plays the role of switching between different operating modes of the phase-locked loop, but also utilizes the on-resistance of the transmission gate as a third-order loop filter The resistance of the resistor effectively filters out the noise, thereby greatly reducing the VCO voltage ripple caused by the noise.

Figure 201110146596

Description

一种用于抑制VCO电压纹波的锁相环电路A Phase Locked Loop Circuit Used to Suppress VCO Voltage Ripple

技术领域 technical field

本发明属于无线电锁相技术领域,具体涉及一种用于抑制VCO电压纹波的锁相环电路。The invention belongs to the technical field of radio phase-locking, and in particular relates to a phase-locked loop circuit for suppressing VCO voltage ripple.

背景技术 Background technique

电荷泵锁相环(CP-PLL)具有快速、低噪声、高精度等特点,被广泛应用于各种通信电路、频率综合器和时钟恢复电路中。传统的电荷泵锁相环如图1所示,它包括以下几个模块:鉴频鉴相器(Phase Frequency Detector,PFD)、电荷泵(Charge-Pump,CP)、环路滤波器(Loop Filter)、压控振荡器(VoltageControlled Oscillator,VCO)和分频器(Frequency Divider)。其中鉴频鉴相器检测参考信号和分频器输出的反馈信号的相位差,输出离散的电压脉冲信号,电荷泵将该信号转化为连续电流信号,并对环路滤波器进行充放电,环路滤波器滤除环路的高频噪声,输出的电压控制压控振荡器的压控输入端,从而对压控振荡器的输出频率进行调谐。压控振荡器采用LC振荡结构,为了在降低相位噪声的同时保证它的调谐范围,可以采用多频带的VCO,它可以通过离散调谐和连续调谐相结合的方法来解决这个难题。Charge-pump phase-locked loop (CP-PLL) has the characteristics of high speed, low noise and high precision, and is widely used in various communication circuits, frequency synthesizers and clock recovery circuits. The traditional charge pump phase-locked loop is shown in Figure 1, which includes the following modules: phase frequency detector (Phase Frequency Detector, PFD), charge pump (Charge-Pump, CP), loop filter (Loop Filter ), Voltage Controlled Oscillator (VoltageControlled Oscillator, VCO) and frequency divider (Frequency Divider). Among them, the frequency and phase detector detects the phase difference between the reference signal and the feedback signal output by the frequency divider, and outputs a discrete voltage pulse signal. The charge pump converts the signal into a continuous current signal, and charges and discharges the loop filter. The circuit filter filters the high-frequency noise of the loop, and the output voltage controls the voltage-controlled input terminal of the voltage-controlled oscillator, thereby tuning the output frequency of the voltage-controlled oscillator. The voltage-controlled oscillator adopts an LC oscillation structure. In order to reduce the phase noise while ensuring its tuning range, a multi-band VCO can be used. It can solve this problem by combining discrete tuning and continuous tuning.

带自动频带选择功能的锁相环如图2所示,它与传统的电荷泵锁相环结构相比,增加了自动频带选择器和两个用来切换锁相环工作模式的开关。自动频带选择器通过比较参考信号和反馈信号的频率,控制开关电容阵列和锁相环工作模式,使得VCO工作在所需要的频带。此种锁相环有两种工作模式,分别为频率锁定模式和相位锁定模式,分别由频率锁定环路和相位锁定环路实现。工作过程如下:当环路开始工作时,开关S1闭合,开关S2断开,锁相环先进行频率锁定,选择合适的开关电容阵列的控制字。然后开关S1断开,开关S2闭合,锁相环进行相位锁定,使锁相环锁定在精确的频率上。The phase-locked loop with automatic frequency band selection function is shown in Figure 2. Compared with the traditional charge pump phase-locked loop structure, it adds an automatic frequency band selector and two switches for switching the phase-locked loop working mode. The automatic frequency band selector controls the working mode of the switched capacitor array and the phase-locked loop by comparing the frequency of the reference signal and the feedback signal, so that the VCO works in the required frequency band. This kind of phase-locked loop has two working modes, which are frequency-locked mode and phase-locked mode, which are realized by frequency-locked loop and phase-locked loop respectively. The working process is as follows: when the loop starts to work, the switch S1 is closed, the switch S2 is opened, the phase-locked loop performs frequency locking first, and selects the appropriate control word of the switched capacitor array. Then the switch S1 is turned off, the switch S2 is closed, and the phase-locked loop performs phase locking, so that the phase-locked loop is locked on an accurate frequency.

该锁相环中的环路滤波器采用的是三阶环路滤波器,三阶环路滤波器与二阶环路滤波器相比能更好的滤除高频噪声;同时锁相环采用MOS管作为开关,在实际应用中,把MOS管的源极和漏极串接到环路中,通过控制MOS管的栅端来实现环路的断开或闭合。The loop filter in the phase-locked loop adopts a third-order loop filter, and the third-order loop filter can filter out high-frequency noise better than the second-order loop filter; at the same time, the phase-locked loop adopts The MOS transistor is used as a switch. In practical applications, the source and drain of the MOS transistor are connected in series to the loop, and the loop is opened or closed by controlling the gate terminal of the MOS transistor.

但是上述带自动频带选择功能的锁相环在开关断开和闭合的时候,会产生电荷注入和时钟馈通现象,这将直接导致VCO控制电压的波动。另外,由于MOS管寄生电阻的存在,其产生的热噪声也导致VCO控制电压的波动。因此带自动频带选择功能的锁相环中VCO的控制电压存在着很大的电压纹波,这大大地恶化了锁相环的相位噪声。However, the phase-locked loop with the automatic frequency band selection function will generate charge injection and clock feedthrough phenomena when the switch is turned off and on, which will directly lead to fluctuations in the VCO control voltage. In addition, due to the existence of the parasitic resistance of the MOS tube, the thermal noise generated by it also leads to the fluctuation of the VCO control voltage. Therefore, there is a large voltage ripple in the control voltage of the VCO in the phase-locked loop with automatic frequency band selection function, which greatly deteriorates the phase noise of the phase-locked loop.

发明内容 Contents of the invention

本发明提供了一种用于抑制VCO电压纹波的锁相环电路,通过采用传输门及其导通电阻来减少电荷注入和时钟馈通,有效地抑制了VCO的电压纹波,滤除了相位噪声。The invention provides a phase-locked loop circuit for suppressing VCO voltage ripple, which effectively suppresses the voltage ripple of VCO and filters out the phase noise.

一种用于抑制VCO电压纹波的锁相环电路,包括:A phase-locked loop circuit for suppressing VCO voltage ripple, comprising:

鉴频鉴相器,用于接收分频器和外部基准源分别提供的反馈信号和参考信号,并产生离散电压脉冲信号;The frequency and phase detector is used to receive the feedback signal and reference signal respectively provided by the frequency divider and the external reference source, and generate a discrete voltage pulse signal;

电荷泵,用于将所述的离散电压脉冲信号转化为连续电流信号;A charge pump for converting the discrete voltage pulse signal into a continuous current signal;

环路滤波器,用于将所述的连续电流信号转化为电压信号;a loop filter, for converting the continuous current signal into a voltage signal;

自动频带选择器,用于接收分频器和外部基准源分别提供的反馈信号和参考信号,并产生状态控制字和正反相模式控制信号;The automatic frequency band selector is used to receive the feedback signal and reference signal respectively provided by the frequency divider and the external reference source, and generate a state control word and a positive and negative mode control signal;

压控振荡器,用于接收所述的电压信号和状态控制字,并产生VCO输出信号;A voltage-controlled oscillator, configured to receive the voltage signal and the state control word, and generate a VCO output signal;

分频器,用于接收所述的VCO输出信号,并产生所述的反馈信号;a frequency divider, configured to receive the VCO output signal and generate the feedback signal;

第一传输门,其中,第一传输门的输入端接收半幅值的电源电压信号,第一传输门的输出端与所述的压控振荡器的压控输入端相连,第一传输门的第一控制端和第二控制端分别接收所述的正相模式控制信号和反相模式控制信号。The first transmission gate, wherein the input end of the first transmission gate receives a half-amplitude power supply voltage signal, the output end of the first transmission gate is connected to the voltage control input end of the voltage-controlled oscillator, and the first transmission gate The first control terminal and the second control terminal respectively receive the normal phase mode control signal and the negative phase mode control signal.

所述的环路滤波器由三个电容、一个电阻和一个传输门构成;其中,第一电容的一端与电阻的一端和第二传输门的输入端相连并构成所述的环路滤波器的输入端,第一电容的另端接地,电阻的另端与第二电容的一端相连,第二电容的另端接地,第二传输门的输出端与第三电容的一端相连并构成所述的环路滤波器的输出端,第三电容的另端接地,第二传输门的第一控制端和第二控制端分别接收所述的反相模式控制信号和正相模式控制信号。The loop filter is composed of three capacitors, a resistor and a transmission gate; wherein, one end of the first capacitor is connected to one end of the resistor and the input of the second transmission gate to form the loop filter The input end, the other end of the first capacitor is grounded, the other end of the resistor is connected to one end of the second capacitor, the other end of the second capacitor is grounded, and the output end of the second transmission gate is connected to one end of the third capacitor to form the The output terminal of the loop filter and the other terminal of the third capacitor are grounded, and the first control terminal and the second control terminal of the second transmission gate respectively receive the control signal of the negative phase mode and the control signal of the normal phase mode.

所述的电荷泵的工作电压为满幅值的电源电压信号。The working voltage of the charge pump is a full-amplitude power supply voltage signal.

优选的技术方案中,所述的第一传输门和第二传输门都是由宽长比为3∶1的PMOS管和NMOS管构成,传输门导通时的等效电阻的线性度最好,能提高环路滤波器的稳定性并能有效的抑制压控输入端的电压纹波。In the preferred technical solution, the first transmission gate and the second transmission gate are both composed of PMOS transistors and NMOS transistors with a width-to-length ratio of 3:1, and the linearity of the equivalent resistance of the transmission gates is the best when they are turned on. , can improve the stability of the loop filter and can effectively suppress the voltage ripple at the voltage control input terminal.

优选的技术方案中,所述的压控振荡器为多频带压控振荡器,能在降低相位噪声的同时保证VCO的调谐范围。In a preferred technical solution, the voltage-controlled oscillator is a multi-band voltage-controlled oscillator, which can ensure the tuning range of the VCO while reducing phase noise.

本发明的工作原理为:Working principle of the present invention is:

锁相环开始工作时,自动频带选择器开始工作,其状态输出端产生预设状态控制字,其模式输出端输出的正相模式控制信号为低电平,反相模式控制信号为高电平,使第二传输门断开,第一传输门闭合,压控振荡器的压控输入端接到基准电压上,压控振荡器中开关电容阵列的MOS管的栅极接收自动频带选择器输出的预设状态控制字,此时环路为频率锁定模式;自动频带选择器通过比较参考信号和反馈信号的频率来确定状态控制字。若检测到反馈信号的频率小于参考信号的频率,则通过减小控制字来提高反馈信号的频率,若检测到反馈信号的频率大于参考信号的频率,则通过增大控制字来减小反馈信号的频率,若检测到反馈信号的频率等于参考信号的频率,则保持控制字不变。When the phase-locked loop starts to work, the automatic frequency band selector starts to work, and its state output terminal produces a preset state control word, the positive phase mode control signal output by its mode output terminal is low level, and the negative phase mode control signal is high level , so that the second transmission gate is disconnected, the first transmission gate is closed, the voltage-controlled input terminal of the voltage-controlled oscillator is connected to the reference voltage, and the gate of the MOS transistor of the switched capacitor array in the voltage-controlled oscillator receives the output of the automatic frequency band selector The preset state control word, the loop is in the frequency lock mode at this time; the automatic frequency band selector determines the state control word by comparing the frequency of the reference signal and the feedback signal. If the frequency of the feedback signal is detected to be lower than the frequency of the reference signal, the frequency of the feedback signal is increased by reducing the control word; if the frequency of the feedback signal is detected to be greater than the frequency of the reference signal, the frequency of the feedback signal is reduced by increasing the control word If the frequency of the feedback signal is detected to be equal to the frequency of the reference signal, the control word remains unchanged.

当环路频率已经锁定,则模式输出端输出的正相模式控制信号为高电平,反相模式控制信号为低电平,使第二传输门闭合,第一传输门断开,压控振荡器的压控输入端接到环路滤波器的输出端,此时环路进入相位锁定模式;鉴频鉴相器检测参考信号和反馈信号的相位差,输出与相位差成比例的离散电压脉冲信号至电荷泵的输入端,控制电荷泵的开启和关断,进而对环路滤波器进行充放电,从而改变压控振荡器的压控输入端的电压,直到环路锁定。When the loop frequency has been locked, the positive phase mode control signal output by the mode output terminal is high level, and the negative phase mode control signal is low level, so that the second transmission gate is closed, the first transmission gate is disconnected, and the voltage-controlled oscillation The voltage control input terminal of the device is connected to the output terminal of the loop filter, and the loop enters the phase lock mode at this time; the frequency and phase detector detects the phase difference between the reference signal and the feedback signal, and outputs discrete voltage pulses proportional to the phase difference The signal is sent to the input terminal of the charge pump to control the opening and closing of the charge pump, and then charge and discharge the loop filter, thereby changing the voltage of the voltage control input terminal of the voltage controlled oscillator until the loop is locked.

本发明的有益技术效果为:The beneficial technical effect of the present invention is:

(1)本发明通过采用传输门作为模式切换开关,减小了由于传统MOS管在锁相环不同工作模式切换时所引起的VCO控制电压纹波,减小了电荷注入和时钟馈通,从而达到抑制VCO电压纹波的目的。(1) The present invention reduces the VCO control voltage ripple caused by the traditional MOS tube when switching between different operating modes of the phase-locked loop by using the transmission gate as the mode switching switch, reduces charge injection and clock feedthrough, thereby The purpose of suppressing the VCO voltage ripple is achieved.

(2)本发明将传输门嵌入到三阶环路滤波器中,既起到锁相环不同工作模式切换的作用,又利用了传输门的导通电阻作为三阶环路滤波器的电阻,有效地滤除了噪声,从而大大减小了由于噪声而导致的VCO电压纹波。(2) The present invention embeds the transmission gate in the third-order loop filter, which not only plays the role of switching between different operating modes of the phase-locked loop, but also utilizes the on-resistance of the transmission gate as the resistance of the third-order loop filter, Noise is effectively filtered, thereby greatly reducing VCO voltage ripple due to noise.

附图说明 Description of drawings

图1为传统锁相环电路的结构示意图。FIG. 1 is a schematic structural diagram of a traditional phase-locked loop circuit.

图2为传统带自动频带选择功能的锁相环电路的结构示意图。FIG. 2 is a schematic structural diagram of a conventional phase-locked loop circuit with an automatic frequency band selection function.

图3为本发明的锁相环电路的结构示意图。FIG. 3 is a schematic structural diagram of a phase-locked loop circuit of the present invention.

图4为传统带自动频带选择功能的锁相环电路中压控振荡器的电压纹波仿真图。Fig. 4 is a voltage ripple simulation diagram of a voltage-controlled oscillator in a traditional phase-locked loop circuit with an automatic frequency band selection function.

图5为本发明的锁相环电路中压控振荡器的电压纹波仿真图。FIG. 5 is a simulation diagram of the voltage ripple of the voltage-controlled oscillator in the phase-locked loop circuit of the present invention.

具体实施方式 Detailed ways

为了更为具体地描述本发明,下面结合附图及具体实施方式对本发明的技术方案及其相关原理进行详细说明。In order to describe the present invention more specifically, the technical solutions and related principles of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

如图3所示,一种用于抑制VCO电压纹波的锁相环电路,包括:鉴频鉴相器、电荷泵、自动频带选择器、环路滤波器、压控振荡器、分频器和第一传输门。As shown in Figure 3, a phase-locked loop circuit for suppressing VCO voltage ripple, including: frequency detector, charge pump, automatic frequency band selector, loop filter, voltage controlled oscillator, frequency divider and the first transmission gate.

鉴频鉴相器的参考输入端与外部基准源相连,鉴频鉴相器的反馈输入端与分频器的输出端相连,以分别接收参考信号和反馈信号,从而产生离散电压脉冲信号。The reference input terminal of the frequency and phase detector is connected to the external reference source, and the feedback input terminal of the frequency and phase detector is connected to the output terminal of the frequency divider to receive the reference signal and the feedback signal respectively, thereby generating a discrete voltage pulse signal.

电荷泵UP输入端与鉴频鉴相器的UP输出端相连,电荷泵DN输入端与鉴频鉴相器的DN输出端相连,以接收离散电压脉冲信号并将其转化为连续电流信号。The UP input of the charge pump is connected to the UP output of the frequency and phase detector, and the DN input of the charge pump is connected to the DN output of the frequency and phase detector to receive the discrete voltage pulse signal and convert it into a continuous current signal.

自动频带选择器的参考输入端与外部基准源相连,自动频带选择器的反馈输入端与分频器的输出端相连,以分别接收参考信号和反馈信号,从而产生状态控制字和正反相模式控制信号。The reference input terminal of the automatic frequency band selector is connected with the external reference source, and the feedback input terminal of the automatic frequency band selector is connected with the output terminal of the frequency divider to receive the reference signal and the feedback signal respectively, so as to generate the state control word and the positive and negative phase mode control Signal.

环路滤波器的输入端与电荷泵的输出端相连,以接收连续电流信号并将其转化为电压信号;The input of the loop filter is connected to the output of the charge pump to receive the continuous current signal and convert it into a voltage signal;

环路滤波器由三个电容、一个电阻和一个传输门构成;其中,第一电容C1的一端与电阻R的一端和第二传输门S2的输入端相连并构成环路滤波器的输入端,第一电容C1的另端接地,电阻R的另端与第二电容C2的一端相连,第二电容C2的另端接地,第二传输门S2的输出端与第三电容C3的一端相连并构成环路滤波器的输出端,第三电容C3的另端接地,第二传输门S2的第一控制端和第二控制端与自动频带选择器的模式输出端相连,并分别接收反相模式控制信号/SW和正相模式控制信号SW。The loop filter is composed of three capacitors, a resistor and a transmission gate; wherein, one end of the first capacitor C1 is connected to one end of the resistor R and the input end of the second transmission gate S2 to form the input end of the loop filter, The other end of the first capacitor C1 is grounded, the other end of the resistor R is connected to one end of the second capacitor C2, the other end of the second capacitor C2 is grounded, and the output end of the second transmission gate S2 is connected to one end of the third capacitor C3 to form a The output end of the loop filter, the other end of the third capacitor C3 is grounded, the first control end and the second control end of the second transmission gate S2 are connected to the mode output end of the automatic frequency band selector, and respectively receive the inverting mode control signal /SW and the normal phase mode control signal SW.

压控振荡器的压控输入端与环路滤波器的输出端相连,以接收电压信号;压控振荡器中开关电容阵列的MOS管的栅极与自动频带选择器的状态输出端相连,以接收状态控制字,从而产生VCO输出信号。The voltage control input terminal of the voltage controlled oscillator is connected with the output terminal of the loop filter to receive the voltage signal; the gate of the MOS transistor of the switched capacitor array in the voltage controlled oscillator is connected with the state output terminal of the automatic frequency band selector to Receives the status control word, thereby produces the VCO output signal.

分频器的输入端与压控振荡器的输出端相连,以接收VCO输出信号并产生反馈信号。The input end of the frequency divider is connected with the output end of the voltage-controlled oscillator to receive the VCO output signal and generate a feedback signal.

第一传输门的输入端接收半幅值的电源电压信号VDD/2,第一传输门的输出端与压控振荡器的压控输入端相连,第一传输门的第一控制端和第二控制端与自动频带选择器的模式输出端相连,并分别接收正相模式控制信号SW和反相模式控制信号/SW。The input terminal of the first transmission gate receives the half-amplitude power supply voltage signal VDD/2, the output terminal of the first transmission gate is connected with the voltage control input terminal of the voltage-controlled oscillator, the first control terminal of the first transmission gate and the second The control terminal is connected to the mode output terminal of the automatic frequency band selector, and receives the normal phase mode control signal SW and the negative phase mode control signal /SW respectively.

第一传输门和第二传输门都是由宽长比为3∶1的PMOS管和NMOS管构成,PMOS管和NMOS管都是采用普通的四端口结构,分别是源极、漏极、栅极和体端。PMOS管的体端都接收电源电压信号VDD以减小电流泄漏,NMOS管的体端都接地以减小电流泄漏。Both the first transmission gate and the second transmission gate are composed of PMOS transistors and NMOS transistors with a width-to-length ratio of 3:1. Pole and body end. The body ends of the PMOS transistors all receive the power supply voltage signal VDD to reduce current leakage, and the body ends of the NMOS transistors are all grounded to reduce current leakage.

本实施方式锁相环开始工作时,自动频带选择器开始工作,其状态输出端产生预设状态控制字,其模式输出端输出的正相模式控制信号SW为低电平,反相模式控制信号/SW为高电平,使第二传输门S2断开,第一传输门S1闭合,压控振荡器的压控输入端接到基准电压VDD/2上,压控振荡器中开关电容阵列的MOS管的栅极接收自动频带选择器输出的预设状态控制字,此时环路为频率锁定模式;自动频带选择器通过比较参考信号和反馈信号的频率来确定状态控制字。若检测到反馈信号的频率小于参考信号的频率,则通过减小控制字来提高反馈信号的频率,若检测到反馈信号的频率大于参考信号的频率,则通过增大控制字来减小反馈信号的频率,若检测到反馈信号的频率等于参考信号的频率,则保持控制字不变。When the phase-locked loop of this embodiment starts to work, the automatic frequency band selector starts to work, and its state output terminal produces the preset state control word, and the positive phase mode control signal SW output by its mode output terminal is low level, and the negative phase mode control signal SW /SW is high level, so that the second transmission gate S2 is disconnected, the first transmission gate S1 is closed, the voltage control input terminal of the voltage controlled oscillator is connected to the reference voltage VDD/2, and the switched capacitor array in the voltage controlled oscillator The gate of the MOS transistor receives the preset state control word output by the automatic frequency band selector. At this time, the loop is in the frequency lock mode; the automatic frequency band selector determines the state control word by comparing the frequency of the reference signal and the feedback signal. If the frequency of the feedback signal is detected to be lower than the frequency of the reference signal, the frequency of the feedback signal is increased by reducing the control word; if the frequency of the feedback signal is detected to be greater than the frequency of the reference signal, the frequency of the feedback signal is reduced by increasing the control word If the frequency of the feedback signal is detected to be equal to the frequency of the reference signal, the control word remains unchanged.

当环路频率已经锁定,则模式输出端输出的正相模式控制信号SW为高电平,反相模式控制信号/SW为低电平,使第二传输门S2闭合,第一传输门S1断开,压控振荡器的压控输入端接到环路滤波器的输出端,此时环路进入相位锁定模式;鉴频鉴相器检测参考信号和反馈信号的相位差,输出与相位差成比例的离散电压脉冲信号UP、DN至电荷泵的输入端,控制电荷泵的开启和关断,进而对环路滤波器进行充放电,从而改变压控振荡器的压控输入端的电压,直到环路锁定。When the loop frequency is locked, the positive phase mode control signal SW output from the mode output terminal is at high level, and the negative phase mode control signal /SW is at low level, so that the second transmission gate S2 is closed and the first transmission gate S1 is off. Open, the voltage control input terminal of the voltage controlled oscillator is connected to the output terminal of the loop filter, and the loop enters the phase lock mode at this time; the frequency and phase detector detects the phase difference between the reference signal and the feedback signal, and the output is proportional to the phase difference The proportional discrete voltage pulse signal UP, DN is sent to the input terminal of the charge pump to control the opening and closing of the charge pump, and then charge and discharge the loop filter, thereby changing the voltage of the voltage control input terminal of the voltage controlled oscillator until the loop Road locked.

图4所示为传统带自动频带选择功能的锁相环电路的Spectre模拟结果示意图,其中横坐标表示仿真时间,纵坐标表示压控输入端的电压。从图中可知,当锁相环锁定时,压控振荡器的压控输入端电压纹波为173mv。Figure 4 is a schematic diagram of the Specter simulation results of a traditional phase-locked loop circuit with an automatic frequency band selection function, where the abscissa represents the simulation time, and the ordinate represents the voltage at the voltage control input terminal. It can be seen from the figure that when the phase-locked loop is locked, the voltage ripple at the voltage-controlled input terminal of the voltage-controlled oscillator is 173mv.

图5所示为本实施例带自动频带选择功能的锁相环电路的Spectre模拟结果示意图。从放大图中可知,当锁相环锁定时,压控振荡器的压控输入端电压纹波为1.85mv。对比可知,本实施例能把压控振荡器的压控输入端电压纹波从原来的173mv减小到1.85mv,抑制了98.93%的纹波。FIG. 5 is a schematic diagram of Specter simulation results of a phase-locked loop circuit with an automatic frequency band selection function in this embodiment. It can be seen from the enlarged figure that when the phase-locked loop is locked, the voltage ripple at the voltage-controlled input terminal of the voltage-controlled oscillator is 1.85mv. It can be seen from the comparison that this embodiment can reduce the voltage ripple at the voltage-controlled input terminal of the voltage-controlled oscillator from the original 173mv to 1.85mv, suppressing 98.93% of the ripple.

Claims (4)

1.一种用于抑制VCO电压纹波的锁相环电路,其特征在于:包括:1. A phase-locked loop circuit for suppressing VCO voltage ripple, is characterized in that: comprising: 鉴频鉴相器,用于接收分频器和外部基准源分别提供的反馈信号和参考信号,并产生离散电压脉冲信号;The frequency and phase detector is used to receive the feedback signal and reference signal respectively provided by the frequency divider and the external reference source, and generate a discrete voltage pulse signal; 电荷泵,用于将所述的离散电压脉冲信号转化为连续电流信号;A charge pump for converting the discrete voltage pulse signal into a continuous current signal; 环路滤波器,用于将所述的连续电流信号转化为电压信号;a loop filter, for converting the continuous current signal into a voltage signal; 自动频带选择器,用于接收分频器和外部基准源分别提供的反馈信号和参考信号,并产生状态控制字和正反相模式控制信号;The automatic frequency band selector is used to receive the feedback signal and reference signal respectively provided by the frequency divider and the external reference source, and generate a state control word and a positive and negative mode control signal; 压控振荡器,用于接收所述的电压信号和状态控制字,并产生VCO输出信号;A voltage-controlled oscillator, configured to receive the voltage signal and the state control word, and generate a VCO output signal; 分频器,用于接收所述的VCO输出信号,并产生所述的反馈信号;a frequency divider, configured to receive the VCO output signal and generate the feedback signal; 第一传输门,其中,第一传输门的输入端接收半幅值的电源电压信号,第一传输门的输出端与所述的压控振荡器的压控输入端相连,第一传输门的第一控制端和第二控制端分别接收所述的正相模式控制信号和反相模式控制信号。The first transmission gate, wherein the input end of the first transmission gate receives a half-amplitude power supply voltage signal, the output end of the first transmission gate is connected to the voltage control input end of the voltage-controlled oscillator, and the first transmission gate The first control terminal and the second control terminal respectively receive the normal phase mode control signal and the negative phase mode control signal. 2.根据权利要求1所述的用于抑制VCO电压纹波的锁相环电路,其特征在于:所述的环路滤波器由三个电容、一个电阻和一个传输门构成;其中,第一电容的一端与电阻的一端和第二传输门的输入端相连并构成所述的环路滤波器的输入端,第一电容的另端接地,电阻的另端与第二电容的一端相连,第二电容的另端接地,第二传输门的输出端与第三电容的一端相连并构成所述的环路滤波器的输出端,第三电容的另端接地,第二传输门的第一控制端和第二控制端分别接收所述的反相模式控制信号和正相模式控制信号。2. the phase-locked loop circuit for suppressing VCO voltage ripple according to claim 1 is characterized in that: described loop filter is made of three electric capacity, a resistor and a transmission gate; Wherein, the first One end of the capacitor is connected to one end of the resistor and the input end of the second transmission gate to form the input end of the loop filter, the other end of the first capacitor is grounded, and the other end of the resistor is connected to one end of the second capacitor. The other end of the second capacitor is grounded, the output end of the second transmission gate is connected to one end of the third capacitor to form the output end of the loop filter, the other end of the third capacitor is grounded, and the first control of the second transmission gate The terminal and the second control terminal respectively receive the reverse mode control signal and the normal phase mode control signal. 3.根据权利要求1或2所述的用于抑制VCO电压纹波的锁相环电路,其特征在于:所述的第一传输门和第二传输门都是由宽长比为3∶1的PMOS管和NMOS管构成。3. The phase-locked loop circuit for suppressing VCO voltage ripple according to claim 1 or 2, characterized in that: the first transmission gate and the second transmission gate are composed of a width-to-length ratio of 3:1 Composed of PMOS tubes and NMOS tubes. 4.根据权利要求1所述的用于抑制VCO电压纹波的锁相环电路,其特征在于:所述的压控振荡器为多频带压控振荡器。4. The phase-locked loop circuit for suppressing VCO voltage ripple according to claim 1, characterized in that: said voltage-controlled oscillator is a multi-band voltage-controlled oscillator.
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