CN102231364B - Nanoscale particle simulation substrate reprocessing method - Google Patents
Nanoscale particle simulation substrate reprocessing method Download PDFInfo
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- CN102231364B CN102231364B CN201110134655.4A CN201110134655A CN102231364B CN 102231364 B CN102231364 B CN 102231364B CN 201110134655 A CN201110134655 A CN 201110134655A CN 102231364 B CN102231364 B CN 102231364B
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- particle
- substrate
- oxide layer
- thermal oxide
- simulation substrate
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- 239000000758 substrate Substances 0.000 title claims abstract description 80
- 238000004088 simulation Methods 0.000 title claims abstract description 71
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000012958 reprocessing Methods 0.000 title claims abstract description 16
- 239000002105 nanoparticle Substances 0.000 title claims abstract description 15
- 239000002245 particle Substances 0.000 claims abstract description 121
- 238000012360 testing method Methods 0.000 claims abstract description 53
- 238000005498 polishing Methods 0.000 claims abstract description 32
- 239000007788 liquid Substances 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 238000011109 contamination Methods 0.000 description 10
- 230000008021 deposition Effects 0.000 description 9
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 8
- 229910052721 tungsten Inorganic materials 0.000 description 8
- 239000010937 tungsten Substances 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000002474 experimental method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
A kind of nanoscale particle simulation substrate reprocessing method, comprising: provide particle simulation substrate, described particle simulation substrate comprises: substrate, is positioned at the thermal oxide layer of substrate surface, and described thermal oxide layer has test surfaces; Along described test surfaces, chemico-mechanical polishing is carried out to described thermal oxide layer, make the amounts of particles of the described test surfaces after polishing be less than 100.Substrate reprocessing method of the present invention saves production cost.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly a kind of nanoscale particle simulation substrate reprocessing method.
Background technology
Along with chip manufacturing live width is more and more to granular development, semiconductor technology is proposed to the requirement of more Gao Gengnan: not only will etch accurate lines, and line defct to control within the specific limits, to ensure function and the rate of finished products of chip.And one of particle contamination (ParticleIssue) topmost factor becoming function and the rate of finished products affecting chip.
Statistics shows: the yield loss caused by particle contamination will account for 80% of total yield loss, and the number of particle contamination is more, and the rate of finished products of disk will be lower, and for this reason, effective particle contamination controls most important to the raising of rate of finished products.It is the relevant information that can also find in the Chinese patent document of CN101414558A that more relevant particle contaminations control at publication number.
Prior art carrys out particle tested pollution condition by particle simulation substrate and corresponding control particle contamination usually, particularly, first test the front value of particle of the test surfaces of described particle simulation substrate, then described particle simulation substrate is adopted to carry out corresponding semiconductor technology, and be worth after testing the particle of described particle simulation substrate, and before value after described particle is deducted described particle, value obtains the particle added value of corresponding semiconductor technology, and judge the degree of particle contamination according to described particle added value.
The test surfaces of described particle simulation substrate requires that particle (ParticleIssue) is lower than being less than some, and described particle simulation substrate is quite expensive.
But, after external environment a period of time that described particle simulation substrate is placed a period of time or is exposed to clean room, the particle added value data of the corresponding semiconductor technology adopting described particle simulation substrate to obtain are inaccurate, described particle simulation substrate is particularly adopted to simulate the particle being greater than 80 nanometers, data are especially inaccurate, new particle simulation substrate must be adopted to simulate, cause particle simulation process costs high.
Summary of the invention
The problem that the present invention solves is that simulation precision is high and the nanoscale particle simulation substrate reprocessing method that cost is low.
For solving the problem, the invention provides a kind of nanoscale particle simulation substrate reprocessing method, comprising: provide particle simulation substrate, described particle simulation substrate comprises: substrate, is positioned at the thermal oxide layer of substrate surface, and described thermal oxide layer has test surfaces; Along described test surfaces, chemico-mechanical polishing is carried out to described thermal oxide layer, make the amounts of particles of the described test surfaces after polishing be less than 100.
Optionally, described CMP (Chemical Mechanical Polishing) process parameter is: polishing speed be 50 A/min of clocks to 10000 A/min of clocks, 5 seconds to 200 seconds are ground to described thermal oxide layer.
Optionally, described CMP (Chemical Mechanical Polishing) process parameter is: the lapping liquid adopting alkalescence, polishing speed is 400 A/min of clocks, grinds 5 seconds to described thermal oxide layer.
Optionally, described thermal oxide layer thickness is that 50 dusts are to 20000 dusts.
Optionally, described thermal oxide layer formation process is furnace oxidation.
Optionally, described particle size is greater than 80 nanometers.
Optionally, described backing material is silicon.
Compared with prior art, the present invention has the following advantages: embodiments of the invention adopt and carry out chemico-mechanical polishing along described test surfaces to described thermal oxide layer, the amounts of particles of the described test surfaces after polishing is made to be less than 100, improve the utilance of nanoscale particle simulation substrate, avoid the increase of production cost.
Further, the lapping liquid of the employing alkalescence of the embodiment of the present invention, polishing speed is 400 dusts to 800 A/min clocks, test surfaces described in 5 seconds to the process of 10 seconds grinding technics conditions is ground to described thermal oxide layer, the amounts of particles that the particle size of the described test surfaces after polishing can be made to be greater than 80 nanometers is less than 100, and too much can not remove the thickness of described thermal oxide layer, and can not have a negative impact to the flatness of test surfaces and pattern.
Further, the present inventor finds, when adopting the lapping liquid of alkalescence, polishing speed is 400 A/min of clocks, when 5 seconds are ground to described thermal oxide layer, the amounts of particles that the particle size of the described test surfaces not only after polishing is greater than 80 nanometers is less than 100, and minimum to the damage of described thermal oxide layer.
Accompanying drawing explanation
Fig. 1 is existing particle simulation substrate cross-sectional view;
Fig. 2 is an embodiment schematic flow sheet of nanoscale particle simulation substrate reprocessing method of the present invention;
Fig. 3 to Fig. 4 is the process schematic of nanoscale particle simulation substrate reprocessing method one embodiment of the present invention.
Embodiment
From background technology, after external environment a period of time that described particle simulation substrate is placed a period of time or is exposed to clean room, the particle added value data of the corresponding semiconductor technology adopting described particle simulation substrate to obtain are inaccurate, described particle simulation substrate simulation particle size is particularly adopted to be greater than the particle of 80 nanometers, data are especially inaccurate, new particle simulation substrate must be adopted to simulate, cause particle simulation process costs high.
To this, the present inventor is through the experiment of 3 times, select the particle simulation substrate that 3 new, particle below 80 nanometers of testing new particle simulation substrate, before acquisition particle size is greater than 80 nano particles, value is respectively: 28,48,44, particle simulation test is carried out to tungsten physical gas-phase deposition, afterwards, the particle simulation substrate after carrying out tungsten physical gas-phase deposition is tested: after obtaining particle, value is respectively: 64,95,69; Wherein particle added value is respectively 36,47,25, particularly, please refer to form 1:
Form 1
| Value before particle | Be worth after particle | Particle added value |
| #1 | 28 | 64 | 36 |
| #2 | 48 | 95 | 47 |
| #3 | 44 | 69 | 25 |
Correspondingly, the present inventor selects the particle simulation substrate of 2 placement a period of times, and the particle size of the particle simulation substrate of test placement a period of time is greater than the particle of 80 nanometers, and before acquisition particle size is greater than 80 nano particles, value is respectively: 249,113; Particle simulation test is carried out to identical tungsten physical gas-phase deposition, afterwards, the particle simulation substrate after carrying out tungsten physical gas-phase deposition is tested: after obtaining particle, value is respectively: 3089,3584; Wherein particle added value is respectively 2840,3471, particularly, please refer to form 2:
Form 2
| Value before particle | Be worth after particle | Particle added value | |
| #5 | 249 | 3089 | 2840 |
| #6 | 113 | 3584 | 3471 |
It should be noted that, the tungsten physical gas-phase deposition of form 1 and form 2 adopts same deposition chambers and adopts same deposition process parameters, inventor finds, the particle added value that placement a period of time obtains with the particle simulation substrate of the external environment a period of time being exposed to clean room is inaccurate, departs from actual value.
For this reason, the present inventor, through a large amount of experiments, please refer to Fig. 1, and find that described particle simulation substrate 100 specifically comprises: substrate 110, be positioned at the thermal oxide layer 120 on substrate 110 surface, described thermal oxide layer has test surfaces I.
When described particle simulation substrate is placed a period of time or is exposed to external environment a period of time of clean room, the particle being positioned at described test surfaces I is more, and adopts and be positioned at the more described particle simulation substrate of the particle of described test surfaces I to carry out the experimental data that particle simulation experiment obtains all inaccurate.
For this reason, the present inventor proposes a kind of nanoscale particle simulation substrate reprocessing method, please refer to Fig. 2, comprising:
Step S101, provide the described particle simulation substrate of the external environment a period of time of placing a period of time or being exposed to clean room, described particle simulation substrate comprises: substrate, is positioned at the thermal oxide layer of substrate surface, and described thermal oxide layer has test surfaces;
Step S102, carries out chemico-mechanical polishing along described test surfaces to described thermal oxide layer, makes the amounts of particles of the described test surfaces after polishing be less than 100.
Fig. 3 to Fig. 4 is the process schematic of nanoscale particle simulation substrate reprocessing method one embodiment of the present invention, is described in detail to one embodiment of the invention below in conjunction with Fig. 2 to Fig. 4.
Please refer to Fig. 3, the described particle simulation substrate 200 of the external environment a period of time of placing a period of time or being exposed to clean room is provided, described particle simulation substrate 200 comprises: substrate 210, is positioned at the thermal oxide layer 220 on substrate 210 surface, and described thermal oxide layer 220 has test surfaces I.
Described substrate 210 is silicon substrate, is such as N-type silicon substrate or P-type silicon substrate.
Described thermal oxide layer 220 thickness be 50 dusts to 20000 dusts, described thermal oxide layer 220 formation process is furnace oxidation, and described thermal oxide layer 220 has test surfaces I.
Also it should be noted that, place a period of time due to described particle simulation substrate 200 or be exposed to external environment a period of time of clean room, described test surfaces I has more particle contamination 211.
From describing before, because the test result of particle simulation substrate 200 particle tested with more particle contamination 211 test surfaces I is inaccurate, error is larger, the particle simulation substrate 200 usually with more particle contamination 211 test surfaces I can only be scrapped, in view of particle simulation substrate 200 is expensive, cause the cost increase of manufacturing process.
For this reason, the present inventor is by the test surfaces I process to described thermal oxide layer 220, please refer to Fig. 4, the present inventor carries out chemico-mechanical polishing along described test surfaces I to described thermal oxide layer 220, makes the amounts of particles of the described test surfaces after polishing be less than 100.
Particularly, because follow-up tungsten physical gas-phase deposition needs the thickness on the 5000 Izod right sides, and to the flatness of test surfaces I and pattern, there is requirement, the present inventor adopts: polishing speed is that 50 A/min of clocks are to 10000 A/min of clocks, grind 5 seconds to 200 seconds the present inventor to described thermal oxide layer 220 to find, adopt above-mentioned grinding technics condition, the amounts of particles that the particle size of the described test surfaces after polishing can be made to be greater than 80 nanometers is less than 100, and too much can not remove the thickness of described thermal oxide layer 220, and can not have a negative impact to the flatness of test surfaces I and pattern.And the amounts of particles that the particle size of the described test surfaces after polishing is greater than 80 nanometers be less than 100 particle simulation substrate 200 test result accurate.
In order to verify the effect of the embodiment of the present invention further, the present inventor adopts two panels to place a period of time or is exposed to the particle simulation substrate of external environment a period of time of clean room, the amounts of particles that the particle size of testing above-mentioned two panels particle simulation substrate is greater than 80 nanometers is: 246,141, and adopt the process for subsequent treatment of the embodiment of the present invention to reprocess above-mentioned two panels particle simulation substrate, and the amounts of particles that the particle size of testing test surfaces described in the particle simulation substrate after obtaining two panels polishing is greater than 80 nanometers is less than 100, is respectively 11,22.Afterwards, adopt the tungsten physical gas-phase deposition identical with form 2 with form 1 to carry out particle simulation test, the two panels particle simulation substrate after carrying out tungsten physical gas-phase deposition is tested: after obtaining particle, value is respectively: 28,42; Wherein particle added value is respectively 17,20, experimental result surface, adopts the particle simulation substrate analog result of embodiment of the present invention process accurate.Particularly, please refer to form 3:
Form 3
In sum, embodiments of the invention adopt and carry out chemico-mechanical polishing along described test surfaces to described thermal oxide layer, make the amounts of particles of the described test surfaces after polishing be less than 100, improve the utilance of nanoscale particle simulation substrate, avoid the increase of production cost.
Further, the lapping liquid of the employing alkalescence of the embodiment of the present invention, polishing speed is 400 dusts to 800 A/min clocks, test surfaces described in 5 seconds to the process of 10 seconds grinding technics conditions is ground to described thermal oxide layer 220, the amounts of particles that the particle size of the described test surfaces after polishing can be made to be greater than 80 nanometers is less than 100, and too much can not remove the thickness of described thermal oxide layer 220, and can not have a negative impact to the flatness of test surfaces I and pattern.
Especially, the present inventor finds, when adopting the lapping liquid of alkalescence, polishing speed is 400 A/min of clocks, when 5 seconds are ground to described thermal oxide layer 220, the amounts of particles that the particle size of the described test surfaces not only after polishing is greater than 80 nanometers is less than 100, and minimum to the damage of described thermal oxide layer 220.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; the Method and Technology content of above-mentioned announcement can be utilized to make possible variation and amendment to technical solution of the present invention; therefore; every content not departing from technical solution of the present invention; the any simple modification done above embodiment according to technical spirit of the present invention, equivalent variations and modification, all belong to the protection range of technical solution of the present invention.
Claims (5)
1. a nanoscale particle simulation substrate reprocessing method, is characterized in that, comprising:
There is provided particle simulation substrate, described particle simulation substrate comprises: substrate, is positioned at the thermal oxide layer of substrate surface, and described thermal oxide layer has test surfaces;
Along described test surfaces, chemico-mechanical polishing is carried out to described thermal oxide layer, make the amounts of particles of the described test surfaces after polishing be less than 100;
Wherein, described CMP (Chemical Mechanical Polishing) process parameter is: the lapping liquid adopting alkalescence, polishing speed is 400 A/min of clocks, grinds 5 seconds to described thermal oxide layer.
2. simulation substrate reprocessing method as claimed in claim 1, it is characterized in that, described thermal oxide layer thickness is that 50 dusts are to 20000 dusts.
3. simulation substrate reprocessing method as claimed in claim 2, it is characterized in that, described thermal oxide layer formation process is furnace oxidation.
4. simulation substrate reprocessing method as claimed in claim 1, it is characterized in that, described particle size is greater than 80 nanometers.
5. simulation substrate reprocessing method as claimed in claim 1, it is characterized in that, described backing material is silicon.
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| CN201110134655.4A CN102231364B (en) | 2011-05-23 | 2011-05-23 | Nanoscale particle simulation substrate reprocessing method |
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| CN201110134655.4A CN102231364B (en) | 2011-05-23 | 2011-05-23 | Nanoscale particle simulation substrate reprocessing method |
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| CN102231364B true CN102231364B (en) | 2016-02-03 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101684391A (en) * | 2008-09-26 | 2010-03-31 | 安集微电子（上海）有限公司 | Chemical mechanical polishing solution |
| CN101684392A (en) * | 2008-09-26 | 2010-03-31 | 安集微电子（上海）有限公司 | Chemical mechanical polishing solution |
| CN101818047A (en) * | 2010-02-08 | 2010-09-01 | 中国科学院上海微系统与信息技术研究所 | Silicon oxide-cerium oxide nuclear shell compounded abrasive granules, and preparation and application thereof |
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2011
- 2011-05-23 CN CN201110134655.4A patent/CN102231364B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101684391A (en) * | 2008-09-26 | 2010-03-31 | 安集微电子（上海）有限公司 | Chemical mechanical polishing solution |
| CN101684392A (en) * | 2008-09-26 | 2010-03-31 | 安集微电子（上海）有限公司 | Chemical mechanical polishing solution |
| CN101818047A (en) * | 2010-02-08 | 2010-09-01 | 中国科学院上海微系统与信息技术研究所 | Silicon oxide-cerium oxide nuclear shell compounded abrasive granules, and preparation and application thereof |
Non-Patent Citations (1)
| Title |
|---|
| Effects of mixed abrasives in CMP of oxide films;Zhenyu Lu,Seung-Ho Lee,et al.;《Journal of Materials Research》;20031031;第18卷(第10期);正文第2326页第2栏 * |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140403 |
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Effective date of registration: 20140403 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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