Summary of the invention
The objective of the invention is to overcome the deficiencies in the prior art, a kind of control circuit and comprise the Switching Power Supply of this bootstrapping control circuit of booting is provided, its forward conduction pressure reduction is little, and conducting resistance is little, the efficient height of Switching Power Supply, and reliability and fail safe are good.
For achieving the above object, the present invention adopts following technical scheme:
A kind of bootstrapping control circuit is used for the sequential logic control of Switching Power Supply bootstrap capacitor, comprises that sequential logic drives the generation circuit, high voltage PMOS pipe and bootstrapping drive circuit; Described sequential logic drives and produces circuit, utilizes the modulation signal that the digital modulation circuit generates in the Switching Power Supply, produces the input signal of high voltage PMOS pipe and the input signal of bootstrapping drive circuit; Described high voltage PMOS pipe utilizes sequential logic to drive and produces the output signal that circuit produces, and controls the conducting and the shutoff of high voltage PMOS pipe, is output as the source voltage terminal signal of high voltage PMOS pipe, as the input signal of bootstrapping drive circuit; Described bootstrapping drive circuit, utilize sequential logic to drive the output signal that produces circuit, utilizing the source end signal of nmos switch pipe and the output signal of high voltage PMOS pipe is the both end voltage of bootstrap capacitor, and the conducting and the shutoff of control nmos switch pipe make the Switching Power Supply operate as normal.
Preferably, described sequential logic drives and produces circuit, utilize the modulation signal that the digital modulation circuit generates in the Switching Power Supply, control produces first logical signal and second logical signal through Dead Time, first logical signal is as the input signal of bootstrapping drive circuit, second logical signal obtains the 3rd logical signal, as the input signal of high voltage PMOS pipe through the trigger-type level shifter.
Preferably, described high voltage PMOS pipe, internal source voltage provides the power supply of high voltage PMOS pipe, the drain terminal that connects the high voltage PMOS pipe, utilize sequential logic to drive and produce circuit output signal, connect the grid of high voltage PMOS pipe, the substrate terminal of high voltage PMOS pipe connects the source end of high voltage PMOS pipe, the source end of high voltage PMOS pipe is as the output of high voltage PMOS pipe, as the input signal of bootstrapping drive circuit.
Preferably, described bootstrapping drive circuit, sequential logic is driven the output signal that produces circuit, through the trigger-type level shifter, the source end of nmos switch pipe connects an end of bootstrap capacitor, and the output signal of high voltage PMOS pipe connects the other end of bootstrap capacitor, the source end signal of nmos switch pipe is as relative low-voltage, the output signal of high voltage PMOS pipe is as relative high voltage, and the conducting and the shutoff of control nmos switch pipe make the Switching Power Supply operate as normal.
Described Dead Time control is to utilize the homophase of the modulation signal generation that the digital modulation circuit generates in the Switching Power Supply not first logical signal and second logical signal of crossover, the modulation signal that generates when digital modulation circuit in the Switching Power Supply is during by the low transition high level, then second logical signal is through postponing to become earlier high level, then become high level through postponing first logical signal, the modulation signal that generates when digital modulation circuit in the Switching Power Supply is when changing low level by high level, then first logical signal then becomes high level through postponing second logical signal through postponing to become earlier low level.
Preferably, described trigger-type level shifter, comprise that burst pulse produces circuit and level shifter, described burst pulse produces circuit, input signal is carried out rising edge and trailing edge to carry out the edge and detects, output signal is the narrow pulse signal that the edge of rising edge and trailing edge detects, input signal as level shifter, described level shifter, comprise the first high pressure NMOS pipe, the second high pressure NMOS pipe, the one PMOS pipe, the 2nd PMOS pipe, the first high pressure P N junction diode, the second high pressure P N junction diode, first resistance, first inverter, second inverter, the 3rd inverter and the 4th inverter, the public ground of the source termination of the described first high pressure NMOS pipe, the grid end connects the narrow pulse signal of rising edge, drain terminal connects the N end of the first high pressure P N junction diode, the drain terminal of the one PMOS and grid, the public ground of the source termination of second high pressure NMOS, grid connects the narrow pulse signal of trailing edge, drain terminal connects the N end of the second high pressure P N junction diode, the drain terminal of the 2nd PMOS pipe, one end of first resistance and the input of first inverter, the other end of first resistance connects the output of second inverter, the P end of the first high pressure P N junction diode and the second high pressure P N junction diode connects together, the source end that connects the nmos switch pipe, the grid end of the one PMOS pipe and the 2nd PMOS pipe connects together, the source end connects together, receive the source end of high voltage PMOS pipe, the output of first inverter connects the input of second inverter, the relative high voltage end of first inverter and second inverter is received the source end of high voltage PMOS pipe, the relative low-voltage end of first inverter and second inverter is connected the source end of nmos switch pipe, the output of second inverter connects the input of the 3rd inverter, the output of the 3rd inverter connects the input of the 4th inverter, and the output of the 4th inverter is as the output signal of trigger-type level shifter.
The present invention provides a kind of Switching Power Supply simultaneously, comprises the bootstrapping control circuit, is used for the bootstrap capacitor sequential logic control of switch power controller, and described bootstrapping control circuit comprises that sequential logic drives the generation circuit, high voltage PMOS pipe and bootstrapping drive circuit; Described sequential logic drives and produces circuit, utilizes the modulation signal that the digital modulation circuit generates in the Switching Power Supply, drives through sequential logic and produces circuit, produces the input signal of high voltage PMOS pipe and the input signal of bootstrapping drive circuit; Described high voltage PMOS pipe utilizes sequential logic to drive and produces the output signal that circuit produces, and controls the conducting and the shutoff of high voltage PMOS pipe, is output as the source voltage terminal signal of high voltage PMOS pipe, as the input signal of bootstrapping drive circuit; Described bootstrapping drive circuit utilizes sequential logic to drive the output signal that produces circuit, the source end signal of nmos switch pipe and the output signal of high voltage PMOS pipe, and the conducting and the shutoff of control nmos switch pipe make the Switching Power Supply operate as normal.
Preferably, described sequential logic drives and produces circuit, utilize the modulation signal that the digital modulation circuit generates in the Switching Power Supply, control produces first logical signal and second logical signal through Dead Time, first logical signal is as the input signal of bootstrapping drive circuit, second logical signal obtains the 3rd logical signal, as the input signal of high voltage PMOS pipe through the trigger-type level shifter.
Preferably, described high voltage PMOS pipe, internal source voltage provides the power supply of high voltage PMOS pipe, the drain terminal that connects the high voltage PMOS pipe, utilize sequential logic to drive and produce circuit output signal, connect the grid of high voltage PMOS pipe, the substrate terminal of high voltage PMOS pipe connects the source end of high voltage PMOS pipe, the source end of high voltage PMOS pipe is as the output of high voltage PMOS pipe, as the input signal of bootstrapping drive circuit.
Preferably, described bootstrapping drive circuit, sequential logic is driven the output signal that produces circuit, through the trigger-type level shifter, the source end of nmos switch pipe connects an end of electric capacity, and the output signal of high voltage PMOS pipe connects the other end of electric capacity, the source end signal of nmos switch pipe is as relative low-voltage, the output signal of high voltage PMOS pipe is as relative high voltage, and the conducting and the shutoff of control nmos switch pipe make the Switching Power Supply operate as normal.
Preferably, described Dead Time control is to utilize the homophase of the modulation signal generation that the digital modulation circuit generates in the Switching Power Supply not first logical signal and second logical signal of crossover, the modulation signal that generates when digital modulation circuit in the Switching Power Supply is during by the low transition high level, then second logical signal is through postponing to become earlier high level, then become high level through postponing first logical signal, the modulation signal that generates when digital modulation circuit in the Switching Power Supply is when changing low level by high level, then first logical signal then becomes high level through postponing second logical signal through postponing to become earlier low level.
Preferably, described trigger-type level shifter, comprise that burst pulse produces circuit and level shifter, described burst pulse produces circuit, input signal is carried out rising edge and the detection of trailing edge edge, output signal is the narrow pulse signal that the edge of rising edge and trailing edge detects, input signal as level shifter, described level shifter, comprise the first high pressure NMOS pipe, the second high pressure NMOS pipe, the one PMOS pipe, the 2nd PMOS pipe, the first high pressure P N junction diode, the second high pressure P N junction diode, first resistance, first inverter and second inverter, the public ground of the source termination of the described first high pressure NMOS pipe, the grid end connects the narrow pulse signal of rising edge, drain terminal connects the N end of the first high pressure P N junction diode, the drain terminal of the one PMOS and grid, the public ground of the source termination of second high pressure NMOS, grid connects the narrow pulse signal of trailing edge, drain terminal connects the N end of the second high pressure P N junction diode, the drain terminal of the 2nd PMOS pipe, one end of first resistance and the input of first inverter, the other end of first resistance connects the output of second inverter, the P end of the first high pressure P N junction diode and the second high pressure P N junction diode connects together, the source end that connects the nmos switch pipe, the grid end of the one PMOS pipe and the 2nd PMOS pipe connects together, the source end connects together, receive the source end of high voltage PMOS pipe, the output of first inverter connects the input of second inverter, the relative high voltage end of first inverter and second inverter is received the source end of high voltage PMOS pipe, the relative low-voltage end of first inverter and second inverter is connected the source end of nmos switch pipe, the output of second inverter connects the input of the 3rd inverter, the output of the 3rd inverter connects the input of the 4th inverter, and the output of the 4th inverter is as the output signal of trigger-type level shifter.
The advantage of the technical solution adopted in the present invention is:
The present invention utilizes high voltage PMOS pipe and sequential logic control circuit thereof to replace diode, operate as normal during high temperature, and forward conduction pressure reduction is little, and conducting resistance is little, and does not have the problem of electric leakage, high efficient and reliable safety.
Below in conjunction with accompanying drawing the embodiment and advantages of the present invention are further explained.
For the clearer explanation embodiment of the invention or technical scheme of the prior art, at first the accompanying drawing of required use in embodiment or the description of the Prior Art is done simple the introduction below, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is known complete description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on embodiments of the invention, this area those skilled in the art belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
Describe inventing related technical term:
MOS:metal oxide semiconductor, metal-oxide semiconductor (MOS);
NMOS:N-channel metal oxide semiconductor FET, n channel metal oxide semiconductor field effect transistor.
PMOS:P-channel metal oxide semiconductor FET, the P-channel metal-oxide-semiconductor field-effect transistor.
For making purpose of the present invention, it is clearer that technical scheme and advantage are expressed, and below in conjunction with drawings and the specific embodiments the present invention is further described in detail again.
The present invention is efficient according to Switching Power Supply, reliable and safe requirement, in Switching Power Supply commonly used, introduce a kind of bootstrapping control circuit, substitute existing high pressure P N junction diode or high pressure Schottky diode, utilize the modulation signal that the digital modulation circuit generates in the Switching Power Supply, by sequential logic control high voltage PMOS pipe, the conducting and the shutoff of control bootstrap capacitor driving N MOS switching tube.
The composition structure chart that sees figures.1.and.2, a kind of bootstrapping control circuit under synchronous and asynchronous utilizes the modulation signal that the digital modulation circuit generates in the Switching Power Supply, by conducting and the shutoff of bootstrap capacitor control nmos switch pipe MN1.Internal source voltage VCC connects the P end of high-voltage diode D1, the N end of high-voltage diode D1 connects the end BS of bootstrap capacitor C0, the other end of bootstrap capacitor C0 connects the source end SW of high pressure NMOS switching tube MN1, utilize the high level of the BS end of bootstrap capacitor C0, use the low level of the SW end of bootstrap capacitor C0 as the driving of driving N MOS switching tube MN1 as the driving of driving N MOS switching tube MN2.High-voltage diode D1 can adopt high pressure P N junction diode or high pressure Schottky diode, and high pressure P N junction diode D1 forward conduction pressure reduction is big, causes loss too big.High pressure Schottky diode forward conduction voltage drop is little, but has the problem of high temperature reverse leakage.
With reference to the composition structure chart of Fig. 3 and Fig. 4, be the preferred embodiment of the present invention one and preferred embodiment two, the bootstrapping control circuit under synchronous and asynchronous is formed structure chart.As shown in the figure,, be used for the sequential logic control of Switching Power Supply bootstrap capacitor, comprise that sequential logic drives generation circuit 110, high voltage PMOS pipe MP1 and bootstrapping drive circuit 200 according to a kind of bootstrapping control circuit of the present invention.
Can be simultaneously with reference to Fig. 3, Fig. 4 and Fig. 5, described sequential logic drives and produces circuit 110, utilizes the modulation signal that the digital modulation circuit generates in the Switching Power Supply, produces the input signal of high voltage PMOS pipe MP1 and the input signal of bootstrapping drive circuit 200.Described high voltage PMOS pipe MP1 utilizes sequential logic to drive and produces the output signal that circuit 110 produces, and controls conducting and the shutoff of high voltage PMOS pipe MP1, is output as the source voltage terminal signal of high voltage PMOS pipe MP1, as the input signal of bootstrapping drive circuit 200.Described bootstrapping drive circuit 200, utilize sequential logic to drive the output signal that produces circuit 200, utilizing the source end signal of nmos switch pipe MN1 and the output signal of high voltage PMOS pipe MP1 is the both end voltage of bootstrap capacitor C0, conducting and the shutoff of control nmos switch pipe MN1 make the Switching Power Supply operate as normal.
With reference to Fig. 6, furthermore, described sequential logic drives and produces circuit 110, when utilizing the modulation signal that the digital modulation circuit generates in the Switching Power Supply, be the input signal that produces first logical signal 103 and second logical signal, 301, the first logical signals, 103 conduct bootstrapping drive circuits 200 through dead-time control circuit 310, second logical signal 301 is through trigger-type level shifters 320, obtain the 3rd logical signal 102, as the input signal of high voltage PMOS pipe MP1.
Continuation is with reference to Fig. 6, the Dead Time control action that described dead-time control circuit 310 is had, be not first logical signal 103 and second logical signal 301 of crossover of the homophase that produces of the modulation signal 101 that utilizes digital modulation circuit in the Switching Power Supply to generate, the modulation signal 101 that generates when digital modulation circuit in the Switching Power Supply is during by the low transition high level, then second logical signal 301 is through postponing to become earlier high level, then become high level through postponing first logical signal 103, the modulation signal 101 that generates when digital modulation circuit in the Switching Power Supply is when changing low level by high level, then first logical signal 103 then becomes high level through postponing second logical signal 301 through postponing to become earlier low level.
Referring again to Fig. 6, second logical signal 301 produces circuit 321 through burst pulse earlier, detect rising edge and trailing edge, export 301 rising edge burst pulses and 301 trailing edge burst pulses, through level shifter 322, converting high voltage to is high voltage PMOS pipe MP1 source voltage terminal 104, and low-voltage is the source voltage terminal 106 of nmos switch pipe MN1.The substrate terminal of high voltage PMOS pipe MP1 connects the source end of high voltage PMOS pipe MP1, has parasitic drain end liner bottom high pressure P N junction diode.When nmos switch pipe MN1 turn-offed, high voltage PMOS pipe grid terminal voltage changed low-voltage 106 into through one section Dead Time, and this moment, the high voltage PMOS pipe was opened.When high voltage PMOS pipe grid end changes high voltage 104 into, this moment, the high voltage PMOS pipe turn-offed, and stopped the charging to bootstrap capacitor C0, opened through one section Dead Time nmos switch pipe MN1.
With reference to Fig. 7, described high voltage PMOS pipe MP1, internal source voltage VCC provides the power supply of high voltage PMOS pipe MP1, the drain terminal that connects high voltage PMOS pipe MP1, utilize sequential logic to drive and produce the grid of circuit 110 outputs the 3rd logical signal 102 to high pressure PMOS pipe MP1, the substrate terminal of high voltage PMOS pipe MP1 connects the source end of high voltage PMOS pipe MP1, and the source end 104 of high voltage PMOS pipe MP1 is bootstrapping drive circuit 200 input signals as the output of high voltage PMOS pipe MP1.
With reference to Fig. 8, described bootstrapping drive circuit 200, sequential logic is driven the output signal 103 that produces circuit 110, through trigger-type level shifter 520, the source end 106 of nmos switch pipe MN1 connects the end of bootstrap capacitor C0, the output signal 104 of high voltage PMOS pipe MP1 connects the other end of bootstrap capacitor C0, the source end signal 106 of nmos switch pipe MN1 is as relative low-voltage, the output signal 104 of high voltage PMOS pipe is as relative high voltage, conducting and the shutoff of control nmos switch pipe MN1 make the Switching Power Supply operate as normal.
With reference to Figure 11, described trigger- type level shifter 320 or 520 comprises that burst pulse produces circuit 321 or 521 and level shifter 322 or 522.
Continuation is with reference to Figure 11, and described burst pulse produces circuit 321 or 521, input signal carried out rising edge and trailing edge carry out the edge and detect, and output signal is the narrow pulse signal that the edge of rising edge and trailing edge detects, as the input signal of level shifter.
With further reference to Figure 11, described level shifter 322 or 522, comprise the first high pressure NMOS pipe MN81, the second high pressure NMOS pipe MN82, the one PMOS manages MP81, the 2nd PMOS manages MP82, the first high pressure P N junction diode D81, the second high pressure P N junction diode D82, first resistance R 1, first inverter 810 and second inverter 820, the public ground of the source termination of the described first high pressure NMOS pipe MN81, the grid end connects the narrow pulse signal of rising edge, drain terminal connects the N end of the first high pressure P N junction diode D81, drain terminal and the grid end of the one PMOS pipe MP81, the public ground of the source termination of the second high pressure NMOS pipe MN82, the grid end connects the narrow pulse signal of trailing edge, drain terminal connects the N end of the second high pressure P N junction diode D82, the drain terminal of the 2nd PMOS pipe MP82, one end of first resistance R 1 and the input of first inverter 810, the other end of first resistance R 1 connects the output of second inverter 820, the P end of the first high pressure P N junction diode D81 and the second high pressure P N junction diode D82 connects together, and connects the source end 106 of nmos switch pipe MN1.The grid end of the one PMOS pipe MP81 and the 2nd PMOS pipe MP82 connects together, and the source end of PMOS pipe MP81 and the 2nd PMOS pipe MP82 connects together, and is connected to the source end 104 of high voltage PMOS pipe.The output of first inverter 810 connects the input of second inverter 820, first inverter 810 and the relative high voltage end of second inverter 820 are received the source end 104 of high voltage PMOS pipe, first inverter 810 is connected the source end 106 of nmos switch pipe MN1 with the relative low-voltage end of second inverter 820, the output of second inverter 820 connects the input of the 3rd inverter 830, the output of the 3rd inverter 830 connects the input of the 4th inverter 840, and the output of the 4th inverter 840 is as the output signal of trigger-type level shifter.
Referring again to Figure 11, the inverter 810 in the described level shifter 322 or 522, inverter 820 and resistance R 1 constitute latch cicuit.When the burst pulse of rising edge or trailing edge did not trigger, latch cicuit was with state latch.When the burst pulse of rising edge or trailing edge triggered, the balance of latch cicuit was destroyed, and the new state of triggering decision by the burst pulse of rising edge or trailing edge finally latchs new stable state.
The course of work and operation principle to described a kind of control circuit of booting is described in detail below.
With reference to the composition structure chart of Fig. 6 and the sequential chart of Fig. 9, the digital modulation circuit generates modulation signal 101 in the Switching Power Supply, is used for the duty ratio of control switch pipe, reaches the final stable state of Switching Power Supply.Utilize the modulation signal 101 that the digital modulation circuit generates in the Switching Power Supply, the homophase that produces is first logical signal 103 and second logical signal 301 of crossover not, the modulation signal 101 that generates when digital modulation circuit in the Switching Power Supply is when being high level by low transition, then second logical signal 301 is through postponing to become earlier high level, then become high level through postponing first logical signal 103, the modulation signal 101 that generates when digital modulation circuit in the Switching Power Supply is when changing low level by high level, then first logical signal 103 then becomes high level through postponing second logical signal 301 through postponing to become earlier low level.
The present invention adopts high voltage PMOS pipe MP1 to replace traditional high-voltage diode D1, and MP1 opens shutoff with sequential logic control high voltage PMOS diode.When high voltage PMOS pipe MP1 booted at bootstrap capacitor C0, high voltage PMOS pipe MP1 turn-offed, and parasitic diode is anti-inclined to one side simultaneously.When bootstrap capacitor C0 did not boot, high voltage PMOS pipe MP1 opened, and parasitic diode positively biased is given bootstrap capacitor C0 charging simultaneously, makes bootstrap capacitor C0 two ends pressure reduction remain on VCC.
Drive the sequential chart that produces circuit and high voltage PMOS pipe with reference to Fig. 9 sequential logic, second logical signal 301 detects through the edge earlier, detect rising edge and trailing edge, export 301 rising edge burst pulses and 301 trailing edge burst pulses, through the trigger-type level shifter, converting high voltage to is high voltage PMOS pipe MP1 source voltage terminal 104, and low-voltage is the source voltage terminal 106 of nmos switch pipe MN1.The substrate terminal of high voltage PMOS pipe MP1 connects the source end of high voltage PMOS pipe, has parasitic drain end liner bottom high pressure P N junction diode.When nmos switch pipe MN1 turn-offed, high voltage PMOS pipe MP1 grid terminal voltage changed low-voltage 106 into through one section Dead Time, and this moment, high voltage PMOS pipe MP1 opened, and this moment, parasitic diode positively biased was given bootstrap capacitor C0 charging; When high voltage PMOS pipe MP1 grid end changes high voltage 104 into, this moment, high voltage PMOS pipe MP1 turn-offed, stop charging to bootstrap capacitor C0, open through one section Dead Time nmos switch pipe MN1, when bootstrap capacitor C0 begins to boot, parasitic diode is anti-inclined to one side, and bootstrap capacitor C0 can not leak electricity by the high voltage PMOS pipe.The purpose of doing Dead Time is in order to turn-off at Dead Time high voltage PMOS pipe MP1 the last period that begins bootstrapping at bootstrap capacitor C0, to prevent that in bootstrapping, high voltage PMOS pipe MP1 does not turn-off, causing bootstrapping not boot.Equally, when bootstrap capacitor C0 lowers, through one section Dead Time, high voltage PMOS pipe MP1 just opens, prevent when bootstrap capacitor C0 lowers, high voltage PMOS pipe MP1 opens in advance, and the high voltage of bootstrap capacitor C0 passes to inner VCC voltage source end by the high voltage PMOS pipe MP1 that does not turn-off, and burns device.The purpose of doing Dead Time is in order to make the bootstrap capacitor C0 can be by the electric leakage of high voltage PMOS pipe MP1 and parasitic high-voltage diode, and the regular hour remaining has improved the reliability of boostrap circuit.
With reference to Fig. 8 boot the composition structure chart of drive circuit and the sequential chart of Figure 10, first logical signal 103 is through trigger-type level transfer signals, and converting high voltage to is high voltage PMOS pipe MP1 source voltage terminal 104, and low-voltage is the source voltage terminal 106 of nmos switch pipe MN1.High voltage PMOS pipe MP1 source voltage terminal 104 and nmos switch pipe MN1 source voltage terminal 106 are respectively the both end voltage of bootstrap capacitor C0, and two ends pressure reduction is kept the pressure reduction about VCC all the time.After the transfer of trigger-type level, when being transformed into high level 104 by low level 106, logical signal begins open NMOS switching tube MN1, in the time of open NMOS switching tube MN1, nmos switch pipe MN1 source voltage terminal 106 can rise, because bootstrap capacitor C0 both end voltage can not be suddenlyd change, bootstrap capacitor C0 other end voltage 104 also can rise, provide sufficiently high level with open NMOS switching tube MN1, final nmos switch pipe MN1 source voltage terminal 106 can rise to supply voltage, 104 can rise to the voltage than the high VCC of supply voltage, make nmos switch pipe MN1 be operated in dark linear zone.When being transformed into low level 106 by high level 104, logical signal begins to turn-off nmos switch pipe MN1, when turn-offing nmos switch pipe MN1, NMOS source voltage terminal 106 can descend, because bootstrap capacitor C0 both end voltage can not be suddenlyd change, bootstrap capacitor C0 other end voltage 104 also can descend, final NMOS source voltage terminal can drop to low level, 104 all the time with 106 voltage differences that keep VCC, final plant closure nmos switch pipe MN1.Promptly logical signal open NMOS switching tube MN1 in bootstrap capacitor C0 bootstrapping turn-offs nmos switch pipe MN1 when bootstrap capacitor C0 both end voltage lowers.
Sequential logic of the present invention drives to produce in the circuit and has comprised the Dead Time circuit, the modulation signal that is generated by digital modulation circuit in the Switching Power Supply produces two not in-phase signals of crossover, a driving that is used for nmos switch pipe MN1, another is when having NMOS lock-in tube MN2, remove driving N MOS lock-in tube MN2 again through an inverter, the drive signal that makes nmos switch pipe MN1 and NMOS lock-in tube MN2 is anti-phase not crossover signal, make nmos switch pipe MN1 and not conducting simultaneously of NMOS lock-in tube MN2, there is Dead Time simultaneously, prevents electric current from power pins VDD to ground.
The present invention utilizes high voltage PMOS pipe MP1 and sequential logical drive to replace high pressure P N junction diode or Schottky diode D1, and conducting resistance is little, and does not have the problem of electric leakage, high efficient and reliable safety.
Based on above reason, bootstrapping control circuit of the present invention is applied to Switching Power Supply and is undoubtedly optimal selection.Certainly also be not limited thereto the application in field, under concrete identical application conditions, bootstrapping control circuit of the present invention can be suitable for.
The invention also discloses a kind of Switching Power Supply, described Switching Power Supply also comprises the described bootstrapping control circuit of above each embodiment, considers for length, does not state chela at this, gets final product with reference to the description of front relevant portion.
The above only is a preferred embodiments of the present invention, and is in order to restriction the present invention, within the spirit and principles in the present invention not all, done any modification, be equal to replacement, improve etc., all should be included within protection scope of the present invention.