CN101866608B - Grid power supply control circuit and liquid crystal display driving circuit - Google Patents

Abstract

A gate power supply control circuit and the liquid crystal display drive circuit with the gate power supply control circuit, the gate power supply control circuit includes: a first input circuit, a second input circuit, a control module and an output circuit, the control module will come from The first voltage of the first input circuit is converted into a clipped voltage, and the clipped voltage is combined with the second voltage of the second input circuit to form the high-level voltage signal, which is output through the output circuit; wherein the second input The circuit is a voltage dividing circuit, which is arranged between the first input circuit and the output circuit, and the voltage dividing circuit converts the first voltage into the second voltage so that the minimum value of the high level voltage signal is greater than or equal to the second voltage. The flicker value adjustment of the liquid crystal display becomes safe and convenient.

Description

Grid power supply control circuit and driving circuit of liquid crystal display

technical field

The present invention provides a gate power control circuit and the liquid crystal display drive circuit with the gate power control circuit, especially a gate power control circuit for controlling the high level voltage of the gate and a gate power control circuit with the gate power control circuit The LCD driver circuit.

Background technique

Liquid crystal display devices (LCDs) have high-definition display capabilities, and are characterized by thinness, light weight, and low-voltage-low-power operation. LCDs are widely used from small-area panels (for example, 2-inch type) for mobile phones and digital cameras, to large-area television panels exceeding 40 inches.

The main working principle of LCD is to drive the thin film transistor (thin film transistor; TFT) in the panel through an external drive circuit, so as to control the amount of light passing through. The external drive circuit is mainly composed of a data drive circuit and a gate drive circuit, wherein the data drive circuit is mainly connected to the source of each TFT and provides the data signal required for display, and the gate drive circuit is connected to the gate of each TFT to provide Switching signal required for TFT operation. Generally speaking, the gate drive circuit needs to receive a periodic voltage signal from the gate power control circuit.

Fig. 1 is an existing gate power supply control circuit. As shown in the figure, the gate power supply control circuit 10 includes a first input circuit 11, a control module 13, an output circuit 14 and a regulation circuit 15, wherein the control module 13 converts the first voltage VGH1 from the first input circuit 11 into a second The three voltages VGH are provided to the output circuit 14 for output. The first voltage VGH1 is a DC voltage (the voltage value is generally above 12V), and in practical applications, the output of the third voltage VGH is a high-level voltage for the gate drive circuit (the maximum value is generally above 12V), and In order to reduce the flickering value of the display, it is necessary to perform corner-cutting processing on the basis of the first voltage VGH1 to form a corner-cutting voltage (waveform such as S1 or S2 ) as shown in FIG. 2 . According to the different degree of flickering of the display, by adjusting the resistance value of the variable resistor 16 connected to the control module 13, the angle-cutting amplitude of the third voltage VGH can be adjusted to form a corner-cutting voltage with different falling edge-cutting slopes ( Please refer to comparing waveforms S1 and S2). However, during the adjustment process, the lowest point of the clipping voltage and the clipping slope of the falling edge will change in a larger range with the change of the resistance value of the variable resistor 16, and the lowest value of the third voltage VGH may appear. If it is too low (for example, below 1V), it will exceed the range that the gate drive circuit can withstand, resulting in abnormal display or even damage to the display.

Therefore, in the patent application number CN200910211916.0, another gate power supply control circuit with another structure is proposed. Please refer to FIG. 3 . FIG. 3 is a diagram of another existing gate power supply control circuit. As shown in the figure, the gate control power supply circuit 20 is based on FIG. 1, and a third input circuit 21 is connected to the output circuit 14. 14 Unidirectionally input a predetermined voltage Vfix (generally above 1.5V). In this way, when the third voltage VGH is lower than the predetermined voltage Vfix, its lowest point is clamped at the value of Vfix, which solves the aforementioned defects in the prior art.

However, there are usually special requirements for the start-up time of the gate drive voltage VGH. For example, the gate drive voltage VGH is input after 200 milliseconds after power-on, that is, wait for the logic voltage of the data drive circuit and the gate drive circuit to stabilize before Input the gate drive voltage VGH to it to avoid displaying some noise when starting up. However, since the predetermined voltage Vfix in FIG. 3 is generated by an external power source, its start-up sequence is difficult to synchronize with VGH, and Vfix is often loaded on the output circuit 14 at the moment of starting up, so that VGH is essentially inactive when starting up. produce. In this way, a large number of bright lines will appear on the display screen when the device is turned on, which seriously affects the display effect.

Contents of the invention

In view of this, the present invention will provide a gate power control circuit, which can not only clamp the low point of the gate high-level voltage VGH to a fixed value, but also avoid bright lines when starting up. At the same time, the present invention will also provide a driving circuit for a liquid crystal display, through the above-mentioned grid power supply control circuit, effectively control the chamfering slope of the grid driving voltage, and reduce flickering.

A grid power supply control circuit proposed according to the object of the present invention is used to provide a grid high-level voltage signal of a liquid crystal display, and is characterized in that it includes a first input circuit, a second input circuit, a control module and an output circuit, The control module converts the first voltage from the first input circuit into a clipping voltage, and the clipping voltage and the second voltage of the second input circuit are combined into the high-level voltage signal, which is output through the output circuit; Wherein the second input circuit is a voltage divider circuit, which is arranged between the first input circuit and the output circuit, and the voltage divider circuit converts the first voltage into the second voltage, so that the high level voltage signal The minimum value of is greater than or equal to the second voltage.

As an optional technical solution, the first voltage is a DC voltage.

As an optional technical solution, the second voltage is a DC voltage.

As an optional technical solution, the voltage dividing circuit is provided with a first variable resistor for adjusting the voltage value of the second voltage.

As an optional technical solution, the gate power supply control circuit is provided with a diode, the anode of the diode is connected to the voltage dividing circuit, and the cathode is connected to the output circuit.

As an optional technical solution, the gate power supply control circuit further includes an adjustment circuit for adjusting the slope of the falling edge of the clipping voltage.

As an optional technical solution, the regulating circuit is provided with a second variable resistor.

According to another object of the present invention, a driving circuit for a liquid crystal display is characterized in that it includes a data driving circuit, a gate driving circuit, an image data circuit, a voltage conversion circuit, a timing control circuit, and any of the above gates A power control circuit, wherein the output circuit of the gate power control circuit is connected to the gate drive circuit for providing the high-level voltage signal to the gate drive circuit; the image data circuit receives an external power input to the gate drive circuit A voltage conversion circuit, the timing control circuit controls the voltage conversion circuit to sequentially output a digital logic voltage and the first voltage; the digital logic voltage is provided to the data driving circuit, the image data circuit and the gate driving circuit .

Through the above-mentioned gate power supply control circuit, the voltage divider circuit is used to form the second voltage, which is provided to the output circuit to form a clamping voltage, thereby effectively controlling the low point of the gate high-level voltage output on the output circuit, and using A variable resistor adjusts the clamping voltage, which simplifies the adjustment of the flicker value of the LCD.

The present invention will be described in detail below in conjunction with the accompanying drawings.

Description of drawings

Fig. 1 is a kind of existing gate power supply control circuit;

FIG. 2 is a waveform diagram of the third voltage under two different resistance values of variable resistors;

Fig. 3 is another kind of existing grid power supply control circuit diagram;

Fig. 4 is a structural schematic diagram of the gate power supply control circuit of the present invention

Fig. 5 is a waveform diagram of the third voltage of the gate power supply control circuit of the present invention under different resistance values of the second variable resistor

Fig. 6 is a start-up sequence diagram of the third piezoelectric of the gate power supply control circuit of the present invention;

FIG. 7 is a structural diagram of the driving circuit of the liquid crystal display of the present invention.

Detailed ways

Please refer to FIG. 4 . FIG. 4 is a schematic structural diagram of the gate power supply control circuit of the present invention. As shown in the figure, the gate power control circuit 30 includes a first input circuit 31 , a second input circuit 32 , a control module 33 , an output circuit 34 and a regulation circuit 35 . The first input circuit 31 inputs a first voltage VGH1 to the control module 33, and the first voltage VGH1 is a DC voltage. The control module 33 converts the first voltage VGH1 from the first input circuit 31 into a clipped voltage. The DC voltage input by the two input circuits 32 is combined with the clipping voltage to generate the gate high level voltage VGH, which is provided to the output circuit 34 for output. The adjusting circuit 35 includes a second variable resistor 36 , and by adjusting the resistance of the second variable resistor 36 , the slope of the falling edge of the gate high level voltage VGH is adjusted.

The second input circuit 32 is a voltage divider circuit and is disposed between the first input circuit 31 and the output circuit 34 . The voltage dividing circuit includes a first variable resistor 301 and a diode 302 . Through the first variable resistor 301 , the first voltage VGH1 from the first input circuit 31 is converted into a second voltage and input to the output circuit 34 . Since the second voltage has a clamping effect, the lowest point of the gate high level voltage VGH can only be greater than or equal to the second voltage. At the same time, the diode 302 is used so that the voltage divider circuit can only pass the current from the first input circuit 31 to the output circuit 34 in one direction, so as to prevent the reverse current when the voltage value on the output circuit 34 is greater than the second voltage. poured into the first input circuit 32.

In this way, when the gate high-level voltage VGH formed on the output circuit 34 is regulated by the regulating circuit 35, not only its lowest value is always clamped at the second voltage, but also because the second voltage is the same as the gate high voltage. The level voltage VGH is synchronized, so there will be no bright line phenomenon caused by the gate driving circuit being turned on in advance.

Please refer to Fig. 5 and Fig. 6. S3 and S4 in Fig. 5 are waveform diagrams of the gate high-level voltage VGH of the gate power supply control circuit of the present invention under different resistance values of the second variable resistor, and the lowest value is always will not fall below the second voltage. FIG. 6 is a start-up timing diagram of the gate high level voltage VGH of the gate power supply control circuit of the present invention. However, the starting time of the gate high-level voltage VGH is later than the total power supply voltage VCC of the display device, and there will be no bright line phenomenon caused by the gate driving circuit being turned on in advance.

Please refer to FIG. 7 in conjunction with FIG. 4 . FIG. 7 is a structural diagram of the driving circuit of the liquid crystal display of the present invention. As shown in the figure, the liquid crystal display driving circuit 100 includes a data driving circuit 106 , a gate driving circuit 107 , an image data circuit 108 , a voltage conversion circuit 109 , a timing control circuit 110 and a gate power control circuit 30 . Wherein the data drive circuit 106 is connected to a plurality of data signal lines 102 located in the vertical direction of the substrate 101 and provides data signals thereto; the gate drive circuit 107 is connected to a plurality of gate signal lines 103 located in the horizontal direction of the substrate 101 , and provide gate signals thereto; the junctions of the plurality of data signal lines 102 and gate signal lines 103 are provided with thin film transistors TFT104 and pixel regions 105 . The input circuit 34 of the gate power supply control circuit 30 is connected to the gate drive circuit 107 for providing the third voltage VGH to the gate drive circuit 107, that is, the third voltage is the gate drive circuit 107 High-level voltage; the image data circuit 108 receives an external power supply (not shown) to input the total power supply voltage VCC of the display device to the voltage conversion circuit 109, and the timing control circuit 110 controls the voltage conversion circuit 109 to output digital logic in sequence The voltage VDD and the first voltage VGH1 ; the digital logic voltage VDD is provided to the data driving circuit 106 , the image data circuit 108 and the gate driving circuit 107 . Wherein the first voltage VGH1 has a delay relative to the digital logic voltage VDD. When a person adjusts the regulating circuit 35 of the gate power supply control circuit 30, the slope of the clipped angle of the gate high level voltage VGH is changed, and the lowest point of the gate high level voltage VGH is clamped at the second voltage On top of that, it greatly simplifies the adjustment of the flicker value of the liquid crystal display.

To sum up, the gate power supply control circuit of the present invention uses a voltage divider circuit to provide the second voltage to the output circuit to form a gate high-level voltage, thereby effectively controlling the gate high-level voltage output on the output circuit. The low point of the voltage, and a variable resistor is used to adjust the second voltage, so that the adjustment of the flicker value of the liquid crystal display becomes safe and convenient.

From the above detailed description of the preferred embodiments, it is hoped that the features and spirit of the present invention can be described more clearly, and the scope of the claims of the present invention is not limited by the preferred embodiments disclosed above. On the contrary, the intention is to cover various modifications and equivalent arrangements within the scope of the appended claims of the present invention.

Claims (8)

1. grid power supply control circuit; In order to the grid one high levle voltage signal that LCD is provided; It is characterized in that comprising first input circuit, second input circuit, control module and output circuit; This control module will be converted into top rake voltage from first voltage of first input circuit, and second voltage of this top rake voltage and this second input circuit is merged into said high levle voltage signal, exports through this output circuit; Wherein this second input circuit is a bleeder circuit, is arranged between this first input circuit and this output circuit, and this bleeder circuit becomes said second voltage with said first voltage transitions, and the minimum value that makes said high levle voltage signal is more than or equal to said second voltage.

2. grid power supply control circuit as claimed in claim 1 is characterized in that: said first voltage is DC voltage.

3. grid power supply control circuit as claimed in claim 1 is characterized in that: said second voltage is DC voltage.

4. grid power supply control circuit as claimed in claim 1 is characterized in that: said bleeder circuit is provided with first variable resistor, in order to regulate the magnitude of voltage of this second voltage.

5. grid power supply control circuit as claimed in claim 1 is characterized in that being provided with diode, and the positive pole of this diode connects this bleeder circuit, and negative pole connects this output circuit.

6. grid power supply control circuit as claimed in claim 1 is characterized in that: further comprise regulating circuit, in order to regulate the negative edge top rake slope of this top rake voltage.

7. grid power supply control circuit as claimed in claim 6 is characterized in that: this regulating circuit is provided with the second adjustable resistance.

8. the driving circuit of a LCD; It is characterized in that: comprise data drive circuit, gate driver circuit, image data circuit, voltage conversion circuit, sequential control circuit and like any described grid power supply control circuit in the claim 1 to 7; Wherein this output circuit of this grid power supply control circuit connects this gate driver circuit, in order to this high levle voltage signal is offered this gate driver circuit; This image data circuit receives an external power source and inputs to this voltage conversion circuit, and this sequential control circuit is controlled said voltage conversion circuit and exported Digital Logic voltage and said first voltage successively; This Digital Logic voltage offers said data drive circuit, said image data circuit and said gate driver circuit.

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