CN101814481B - No-pad lead frame structure and production method thereof - Google Patents
No-pad lead frame structure and production method thereof Download PDFInfo
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- CN101814481B CN101814481B CN2010101658814A CN201010165881A CN101814481B CN 101814481 B CN101814481 B CN 101814481B CN 2010101658814 A CN2010101658814 A CN 2010101658814A CN 201010165881 A CN201010165881 A CN 201010165881A CN 101814481 B CN101814481 B CN 101814481B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 122
- 239000002184 metal Substances 0.000 claims abstract description 122
- 239000000758 substrate Substances 0.000 claims description 76
- 229920002120 photoresistant polymer Polymers 0.000 claims description 41
- 239000000945 filler Substances 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 17
- 238000005530 etching Methods 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 229910052742 iron Inorganic materials 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims 3
- 239000000565 sealant Substances 0.000 claims 3
- 238000010030 laminating Methods 0.000 claims 2
- 238000000465 moulding Methods 0.000 claims 2
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 claims 1
- 238000001465 metallisation Methods 0.000 claims 1
- 239000003566 sealing material Substances 0.000 abstract 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract 1
- 229910052799 carbon Inorganic materials 0.000 abstract 1
- 238000007789 sealing Methods 0.000 abstract 1
- 239000002699 waste material Substances 0.000 abstract 1
- 239000005022 packaging material Substances 0.000 description 17
- 239000012528 membrane Substances 0.000 description 13
- 238000005538 encapsulation Methods 0.000 description 10
- 238000003384 imaging method Methods 0.000 description 8
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- 238000005253 cladding Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 230000005496 eutectics Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 238000011112 process operation Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
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- 238000006243 chemical reaction Methods 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The invention relates to a no-pad lead frame structure and a production method thereof. The structure comprises pins (2). A first metal layer (4) is arranged on the front surface of each pin (2). A second metal layer (5) is arranged on the back surface of each pin (2). The front surface of each pin (2) extends to a position beside an area subsequently required for installing a chip as much as possible. Packless plastic sealing materials (3) are embedded in areas on the periphery of the pins (2) and areas among the pins (2). The packless plastic sealing materials (3) connect the periphery of the lower part of the pins and the lower parts of the pins (2) with the lower parts of the pins (2) into a whole body. Moreover, the dimension of the back surface of each pin (2) is smaller than the dimension of the front surface of each pin (2), and thereby a pin structure is formed, wherein the upper part of the pin structure is large and the lower part of the pin structure is small. The invention has the advantages that the binding capacity of the plastic sealing body and the pins is high, the cost is reduced, the energy is saved, the carbon emission is reduced and the waste is reduced.
Description
(1) technical field
The present invention relates to a kind of lead frame structure and production method thereof.Belong to the semiconductor packaging field.
(2) background technology
Traditional lead frame structure mainly contains two kinds:
First kind:
After chemical etching and surface electrical coating are carried out in the front of employing metal substrate, stick the resistant to elevated temperatures glued membrane of one deck at the back side of metal substrate and form the leadframe carrier (shown in figure 14) that to carry out encapsulation process.
Second kind:
After chemical etching and surface electrical coating are carried out in the front of employing metal substrate, promptly accomplish the making (shown in figure 15) of lead frame.Back etched is then carried out at the back side of lead frame again in encapsulation process.
And the not enough point of two kinds of above-mentioned lead frames below in encapsulation process, having existed:
First kind:
1) but this kind lead frame must stick the glued membrane of one deck costliness high temperature resistance because of the back side.So directly increased high cost.
2) but also because the glued membrane of one deck high temperature resistance must be sticked in the back side of this kind lead frame; So the load technology in encapsulation process can only be used conduction or nonconducting resin technology; And the technology that can not adopt eutectic technology and slicken solder is fully carried out load, so selectable product category just has bigger limitation.
3) but again because the glued membrane of one deck high temperature resistance must be sticked in the back side of this kind lead frame; And in the ball bonding bonding technology in encapsulation process; Because but the glued membrane of this high temperature resistance is a soft materials; So caused the instability of ball bonding bonding parameter, seriously influenced the quality of ball bonding and the stability of production reliability.
4) but again because the glued membrane of one deck high temperature resistance must be sticked in the back side of this kind lead frame; And the plastic package process process in encapsulation process; Because the high pressure of plastic packaging relation is easy to cause between lead frame and the glued membrane and infiltrates plastic packaging material, be that the kenel of conduction has become insulation pin (shown in figure 16) on the contrary because of having infiltrated plastic packaging material and will formerly should belong to metal leg.
Second kind:
This kind lead frame structure has carried out etching partially technology in the metal substrate front; Though can solve the problem of first kind of lead frame, because only carried out the work that etches partially in the metal substrate front, and plastic packaging material only envelopes the height of half pin in the plastic packaging process; So the constraint ability of plastic-sealed body and metal leg has just diminished; When if the plastic-sealed body paster is not fine to pcb board, does over again again and heavily paste, with regard to the problem (shown in figure 17) that is easy to generate pin.
Especially the kind of plastic packaging material is to adopt when filler is arranged; Because material is at the environment and the follow-up surface-pasted stress changing relation of production process; Can cause metal and plastic packaging material to produce the crack of vertical-type, its characteristic is the high more then crisp more firmly more crack that is easy to generate more of proportion of filler.
In addition, because the distance between chip and the metal leg is far away, the length of metal wire is longer, shown in Figure 18～19, and metal wire cost higher (the especially metal wire of expensive proof gold matter); Same because the length of metal wire is longer, make that the signal output speed of chip is slow (being the product of storage class and the calculating that needs mass data by it, more outstanding); Too because the length of metal wire is longer, so existing dead resistance/parasitic capacitance of metal wire and parasitic electric pole are also higher to the interference of signal; Because the distance between chip and the metal leg is far away, make that the volume and the area of encapsulation are bigger again, material cost is higher, and discarded object is more.
(3) summary of the invention
The objective of the invention is to overcome above-mentioned deficiency, provide a kind of and reduce that packaging cost, selectable product category are wide, the big no-pad lead frame structure and the production method thereof of constraint ability of good stability, plastic-sealed body and the metal leg of the quality of ball bonding and production reliability.
(3) summary of the invention
The objective of the invention is to realize like this: a kind of no-pad lead frame structure; Comprise pin; Front at said pin is provided with the first metal layer, is provided with second metal level at the back side of said pin, and said pin front extends to the follow-up next door, zone that needs cartridge chip as much as possible; Be equipped with packless plastic packaging material in the zone of said pin periphery and the zone between pin and the pin; Said packless plastic packaging material links into an integrated entity periphery, pin bottom and pin bottom and pin bottom, and makes said pin back side size less than the positive size of pin, forms up big and down small pin configuration.
The production method of no-pad lead frame structure of the present invention, said method comprises following processing step:
Step 1, get metal substrate
Utilize film sticking equipment to stick the photoresist film that can carry out exposure imaging respectively at the front and the back side of metal substrate,
The metal substrate front that utilizes exposure imaging equipment that step 2 is accomplished the pad pasting operation is carried out exposure imaging and is removed the part photoresist film, exposing the zone that follow-up needs etch partially on the metal substrate,
The positive zone of removing the part photoresist film of metal substrate in the step 3 is etched partially,, forms the back side of pin simultaneously relatively in the positive half-etched regions that forms depression of metal substrate,
The film operation is taken off at step 5, the positive back side of metal substrate
The positive remaining photoresist film of metal substrate and the photoresist film at the back side are removed.
In the positive half-etched regions that forms depression of step 4 metal substrate, packless soft gap filler in the full-filling, and toast simultaneously, impel packless soft underfill cures to become packless plastic packaging material.
Utilize film sticking equipment to stick the photoresist film that can carry out exposure imaging respectively at the front and the back side of the metal substrate of accomplishing the packless soft gap filler operation of full-filling,
The part photoresist film is removed at the front and the back side at metal substrate, and purpose is the back side and the front of exposing pin.
The back side of the pin that exposes in step 8 plates second metal level, plates the first metal layer in the front of pin,
Step 10, removal metal substrate back portion photoresist film
Remove metal substrate back portion photoresist film, exposing peripheral zone of metal substrate back side pin and the zone between pin and the pin,
Step 11, the metal substrate back side etch partially
At the back side of metal substrate to being not the front that the metal etch of step 4 remaining part goes out described pin by the photoresist film region covered; Simultaneously the pin front is extended to the follow-up next door, zone that needs cartridge chip as much as possible; And make said pin back side size less than the positive size of pin, form up big and down small pin configuration.
The film operation is taken off at step 12, the positive back side of metal substrate
The photoresist film that the metal substrate front and back is remaining removes.
The invention has the beneficial effects as follows:
1) but the glued membrane of one deck costliness high temperature resistance need not sticked in the back side of this kind lead frame.So directly reduced high cost.
2) but because the glued membrane of one deck high temperature resistance need not sticked in the back side of this kind lead frame yet; So the load technology in encapsulation process is except using conduction or nonconducting resin technology; Can also adopt the technology of eutectic technology and slicken solder to carry out load, so selectable product category is just wide.
3) but again because the glued membrane of one deck high temperature resistance need not sticked in the back side of this kind lead frame, guaranteed the stability of ball bonding bonding parameter, guaranteed the quality of ball bonding and the stability of production reliability.
4) but again because this kind lead frame need not stick the glued membrane of one deck high temperature resistance, and the plastic package process process in encapsulation process can not cause between lead frame and the glued membrane fully and infiltrate plastic packaging material.
5) because the zone between said pin and pin is equipped with packless soft gap filler; This packless soft gap filler has the filler plastic packaging material to envelope the height of whole pin with the routine in the plastic packaging process; So the constraint ability of plastic-sealed body and pin just becomes big, do not have the problem that produces pin again.
6) owing to adopted positive method of separating the etching operation with the back side; So in the etching operation, can form slightly little and the structure that positive pin size is big slightly of the size of back side pin, and slided by the tighter more difficult generation that packless plastic packaging material coated and falling pin with the size that varies in size up and down of a pin.
7) separate etched technology owing to used the back side with the front; So can extend to the follow-up next door, zone that needs cartridge chip as much as possible by the pin that lead frame is positive; Impel chip and pin distance significantly to shorten; Like Figure 20～21, so the cost of metal wire also can significantly reduce (the especially metal wire of expensive proof gold matter).
8) also because the shortening of metal wire makes also significantly speedup (the especially product of storage class and the calculating that needs mass data of signal output speed of chip; More outstanding); Because the length of metal wire has shortened, so existing dead resistance/parasitic capacitance of metal wire and parasitic electric pole are to the also significantly reduction of interference of signal.
9) because of having used the elongation technology of pin,, make the volume and the area of encapsulation significantly to dwindle so can be easy to produce the distance between high pin number and highdensity pin and the pin.
10) because volume after being encapsulated is significantly dwindled, more directly embody material cost significantly descend with because the minimizing of material usage also significantly reduces the puzzlement of discarded object environmental protection.
(4) description of drawings
Fig. 1～12 are each operation sketch map of production method of no-pad lead frame of the present invention.
Figure 13 is a no-pad lead frame structure sketch map of the present invention.
Figure 14 was for sticked the resistant to elevated temperatures glued membrane figure of one deck operation in the past at the back side of metal substrate.
Figure 15 was for to adopt the front of metal substrate to carry out chemical etching and surface electrical coating flow diagram in the past.
Figure 16 was for formed insulation pin sketch map in the past.
Figure 17 pin figure for what formed in the past.
Figure 18 is an encapsulating structure sketch map in the past.
Figure 19 is 18 vertical view.
Figure 20 is for adopting the encapsulating structure sketch map of lead frame of the present invention.
Figure 21 is 20 vertical view.
Reference numeral among the figure:
(5) embodiment
No-pad lead frame production method of the present invention is following:
Step 1, get metal substrate
Referring to Fig. 1, get the suitable metal substrate of a slice thickness 6.The material of metal substrate 6 can be carried out conversion according to the function and the characteristic of chip, for example: copper, aluminium, iron, copper alloy or dilval etc.
Referring to Fig. 2, utilize film sticking equipment to stick the photoresist film 7 and 8 that can carry out exposure imaging respectively, to protect follow-up etch process operation at the front and the back side of metal substrate.
Referring to Fig. 3, exposure imaging removal part photoresist film is carried out in the metal substrate front that utilizes exposure imaging equipment that step 2 is accomplished the pad pasting operation, to expose the zone that follow-up needs etch partially on the metal substrate.
Referring to Fig. 4; The positive zone of removing the part photoresist film of metal substrate in the step 3 is etched partially; In the positive half-etched regions 9 that forms depression of metal substrate, form the back side of pin 2 simultaneously relatively, its purpose mainly is to avoid in subsequent job, occurring the glue that overflows.
The film operation is taken off at step 5, the positive back side of metal substrate
Referring to Fig. 5, the positive remaining photoresist film of metal substrate and the photoresist film at the back side are removed.
Referring to Fig. 6, in the positive half-etched regions 9 that forms depression of step 4 metal substrate, packless soft gap filler in the full-filling, and toast simultaneously, impel packless soft underfill cures to become packless plastic packaging material 3.
Referring to Fig. 7, utilize film sticking equipment to stick the photoresist film 10 and 11 that can carry out exposure imaging respectively, to protect follow-up metal cladding process operation at the front and the back side of the metal substrate of accomplishing the packless soft gap filler operation of full-filling.
Referring to Fig. 8, remove the part photoresist film at the front and the back side of metal substrate, purpose is the back side and the front of exposing pin.
Referring to Fig. 9; The back side of the pin that exposes in step 8 plates second metal level 5; Plate the first metal layer 4 in the front of pin; Can be tightr, firm between metal wire and chip region and the routing Nei Jiao district during in order to follow-up bonding wire engage is increased in the conjugation that impels in the encapsulating process between Packed plastic packaging material simultaneously.And the one-tenth branch of metal level can be to adopt golden nickel gold, golden ambrose alloy nickel gold, NiPdAu, golden NiPdAu, nickel gold, silver or tin etc. because of different chip materials.
Step 10, removal metal substrate back portion photoresist film
Referring to Figure 10, remove metal substrate back portion photoresist film, exposing peripheral zone of metal substrate back side pin and the zone between pin and the pin,
Step 11, the metal substrate back side etch partially
Referring to Figure 11; At the back side of metal substrate to being not the front that the metal etch of step 4 remaining part goes out described pin by the photoresist film region covered; Simultaneously the pin front is extended to the follow-up next door, zone that needs cartridge chip as much as possible; And make said pin back side size less than the positive size of pin, form up big and down small pin configuration.
The film operation is taken off at step 12, the positive back side of metal substrate
Referring to Figure 12, the photoresist film that the metal substrate front and back is remaining removes.
End product is referring to Figure 13: among Figure 13; Pin 2, packless plastic packaging material 3, the first metal layer 4 and second metal level 5 can be found out no-pad lead frame structure of the present invention by Figure 13; Comprise pin 2; Said pin 2 fronts extend to the follow-up next door, zone that needs cartridge chip as much as possible, are provided with the first metal layer 4 in the front of said pin 2, are provided with second metal level 5 at the back side of said pin 2; Be equipped with packless plastic packaging material 3 in the zone of said pin 2 peripheries and the zone between pin 2 and the pin 2; Said packless plastic packaging material 3 links into an integrated entity periphery, pin bottom and pin 2 bottoms and pin 2 bottoms, and makes said pin back side size less than the positive size of pin, forms up big and down small pin configuration.
The present invention can electroplate the making that the first metal layer 4 or regional area are electroplated the first metal layer 4 because of the Zone Full that need carry out in the front of above-mentioned pin 2 of chip functions.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101658814A CN101814481B (en) | 2010-04-30 | 2010-04-30 | No-pad lead frame structure and production method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101658814A CN101814481B (en) | 2010-04-30 | 2010-04-30 | No-pad lead frame structure and production method thereof |
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| CN101814481A CN101814481A (en) | 2010-08-25 |
| CN101814481B true CN101814481B (en) | 2012-01-25 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101958257B (en) * | 2010-09-04 | 2012-07-04 | 江苏长电科技股份有限公司 | Packaging method of directly placing firstly-plated and later-etched module by double-sided graphic chip |
| CN101969032B (en) * | 2010-09-04 | 2012-04-11 | 江苏长电科技股份有限公司 | Double-sided graphic chip right-handed electroplating-etching module packaging method |
| CN102005432B (en) * | 2010-09-30 | 2012-03-28 | 江苏长电科技股份有限公司 | Four-sided leadless packaging structure and packaging method thereof |
| US8735224B2 (en) | 2011-02-14 | 2014-05-27 | Stats Chippac Ltd. | Integrated circuit packaging system with routed circuit lead array and method of manufacture thereof |
| CN102324411A (en) * | 2011-09-13 | 2012-01-18 | 江苏长电科技股份有限公司 | A Novel Baseless Island Prefilled Molded Lead Frame Structure |
| CN102324412B (en) * | 2011-09-13 | 2013-03-06 | 江苏长电科技股份有限公司 | Island-free lead frame structure prefilled with plastic encapsulating material, plated firstly and etched later and production method thereof |
| CN102324415B (en) * | 2011-09-13 | 2013-03-06 | 江苏长电科技股份有限公司 | Sequentially etched and plated lead frame structure without island prepacked plastic sealed material and producing method thereof |
| US9275877B2 (en) | 2011-09-20 | 2016-03-01 | Stats Chippac, Ltd. | Semiconductor device and method of forming semiconductor package using panel form carrier |
| CN102376656B (en) * | 2011-11-28 | 2013-11-27 | 江苏长电科技股份有限公司 | Island-free four-sided leadless packaging structure and manufacturing method thereof |
| CN102376672B (en) * | 2011-11-30 | 2014-10-29 | 江苏长电科技股份有限公司 | Foundation island-free ball grid array packaging structure and manufacturing method thereof |
| CN102420206B (en) * | 2011-11-30 | 2014-05-14 | 江苏长电科技股份有限公司 | Four-side pin-free packaging structure subjected to plating and etching sequentially and manufacturing method thereof |
| CN105097758B (en) | 2014-05-05 | 2018-10-26 | 日月光半导体制造股份有限公司 | Substrate, its semiconductor package and its manufacturing method |
| CN113192900A (en) * | 2021-04-02 | 2021-07-30 | 江阴苏阳电子股份有限公司 | Packaging process of packaging structure with etched back first |
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| TWI236742B (en) * | 2004-03-02 | 2005-07-21 | Kingtron Electronics Co Ltd | Manufacturing method of film carrier |
| US7087461B2 (en) * | 2004-08-11 | 2006-08-08 | Advanced Semiconductor Engineering, Inc. | Process and lead frame for making leadless semiconductor packages |
| CN201060865Y (en) * | 2007-07-15 | 2008-05-14 | 天水华天科技股份有限公司 | Non-basic island lead frame |
| CN201417765Y (en) * | 2009-04-01 | 2010-03-03 | 苏州固锝电子股份有限公司 | Base island free semi-conductor chip package structure |
| CN201681895U (en) * | 2010-04-30 | 2010-12-22 | 江苏长电科技股份有限公司 | Lead frame structure without base island |
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2010
- 2010-04-30 CN CN2010101658814A patent/CN101814481B/en active Active
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| CN101814481A (en) | 2010-08-25 |
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Effective date of registration: 20170207 Address after: The 200127 Tianjin Tianjin FTA test area (Dongjiang Bonded Port) No. 6865 North Road, 1-1-1802-7 financial and trade center of Asia Patentee after: Xin Xin finance leasing (Tianjin) Co., Ltd. Address before: 214434 Binjiang Middle Road, Jiangyin Development Zone, Jiangsu, China, 275 Patentee before: Jiangsu Changjiang Electronics Technology Co., Ltd. |
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Application publication date: 20100825 Assignee: Jiangsu Changjiang Electronics Technology Co., Ltd. Assignor: Xin Xin finance leasing (Tianjin) Co., Ltd. Contract record no.: 2017320000152 Denomination of invention: No-pad lead frame structure and production method thereof Granted publication date: 20120125 License type: Exclusive License Record date: 20170614 |
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Assignee: JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY Co.,Ltd. Assignor: Xin Xin finance leasing (Tianjin) Co., Ltd. Contract record no.: 2017320000152 Date of cancellation: 20200416 |
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Effective date of registration: 20200423 Address after: 214434, No. 78, mayor road, Chengjiang, Jiangsu, Jiangyin, Wuxi Patentee after: JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY Co.,Ltd. Address before: 1-1-1802-7, North Zone, financial and Trade Center, No. 6865, Asia Road, Tianjin pilot free trade zone (Dongjiang Free Trade Port Area), Tianjin Patentee before: Xin Xin finance leasing (Tianjin) Co., Ltd. |
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