CN101763824B - Pixel Structure of Electroluminescence Display Panel - Google Patents

Abstract

The invention discloses a pixel structure of an electroluminescent display panel, which comprises a plurality of sub-pixel rows, a plurality of first power lines and a plurality of second power lines. Each first power line and each second power line are arranged between two adjacent sub-pixel rows. Each first power line is electrically connected with a part of sub-pixels of the sub-pixel row on one side of the first power line and is electrically connected with a part of sub-pixels of the sub-pixel row on the other side of the first power line. Each second power line is electrically connected with a part of sub-pixels of the sub-pixel row on one side of the second power line and is electrically connected with a part of sub-pixels of the sub-pixel row on the other side of the second power line. The invention can avoid the influence of voltage signal drop on the display picture caused by the resistance of the power line, thereby effectively improving the uniformity of the display picture of the electroluminescent display panel.

Description

Pixel Structure of Electroluminescence Display Panel

technical field

The present invention relates to a pixel structure of an electroluminescent display panel, in particular to a pixel structure having a plurality of power lines with different voltage signals, and each power line is electrically connected to some sub-pixels located on both sides thereof in a crossing manner. Pixel structure of an electroluminescent display panel.

Background technique

In recent years, electroluminescent display panels, such as organic light emitting diode display panels, have been gradually and widely used in various flat display products due to their advantages such as self-illumination, wide viewing angle, fast response time and high luminous efficiency.

Currently, the mainstream products in the consumer market are high-resolution large-size flat-panel display devices. Therefore, in order to meet the large-size and high-resolution specifications, the size and resolution of the electroluminescence display panel must also be increased. However, while increasing the size and resolution of the electroluminescent display panel, the electroluminescent display panel has a problem of signal voltage drop due to the increase in panel size. To be precise, when the size of the electroluminescent display panel increases, the length of the power line used to transmit the voltage signal from the driver chip to each pixel must also increase accordingly, and the increase in the length of the power line will cause the resistance to change. Therefore, there will be a voltage drop problem, that is, the actual voltage signal obtained by the pixels farther from the driver chip will be lower than the actual voltage signal obtained by the pixels closer to the driver chip, resulting in uneven display.

Since the voltage drop problem of the voltage signal will lead to unevenness of the display screen and seriously affect the display quality, the voltage drop problem of the voltage signal has become a limitation for the development of the electroluminescent display panel towards a larger size.

Contents of the invention

One of the objectives of the present invention is to provide a pixel structure of an electroluminescence display panel, so as to solve the problem of non-uniformity of the display image caused by the voltage drop of the voltage signal in the existing electroluminescence display panel.

A preferred embodiment of the present invention provides a pixel structure of an electroluminescence display panel, which includes a plurality of sub-pixel columns, a plurality of first power lines and a plurality of second power lines. Each sub-pixel row includes a plurality of sub-pixels, each sub-pixel includes a first sub-pixel and a second sub-pixel, and the first sub-pixel and the second sub-pixel of each sub-pixel are electrically separated from each other. Each first power supply line and each second power supply line are disposed between two adjacent sub-pixel rows, and each first power supply line is electrically connected to the first pixel of each sub-pixel in the sub-pixel row on one side of the first power supply line. connected, and electrically connected to the first pixel of each sub-pixel in the sub-pixel row on the other side, and each second power supply line is respectively connected to the second sub-pixel of each sub-pixel in the sub-pixel row on one side electrically connected, and electrically connected to the second sub-pixel of each sub-pixel in the sub-pixel row on the other side.

Another preferred embodiment of the present invention provides a pixel structure of an electroluminescent display panel, which includes a plurality of sub-pixel rows, a plurality of first power lines and a plurality of second power lines. Each sub-pixel row includes a plurality of sub-pixels, wherein the sub-pixels in the same sub-pixel row have the same display color, and the sub-pixels in two adjacent sub-pixel rows have different display colors. Each first power supply line and each second power supply line are arranged between two adjacent sub-pixel rows, and each first power supply line is respectively electrically connected to a part of the sub-pixels in the sub-pixel row on one side thereof, and is connected to the Part of the sub-pixels in the sub-pixel row on the other side are electrically connected, and each second power supply line is respectively electrically connected to a part of the sub-pixels in the sub-pixel row on one side, and to the sub-pixel row in the other side Part of the sub-pixels are electrically connected.

The pixel structure of the electroluminescent display panel of the present invention utilizes a plurality of first power lines and second power lines to provide a first voltage signal and a second voltage signal respectively, and makes each power line cross with the parts located on both sides thereof The electrical connection of the sub-pixels can avoid the influence of the voltage signal drop caused by the resistance of the power line on the display screen, thus effectively improving the uniformity of the display screen of the electroluminescence display panel.

Description of drawings

FIG. 1 shows a schematic diagram of a pixel structure of an electroluminescence display panel according to a first preferred embodiment of the present invention;

FIG. 2 illustrates a schematic diagram of a single sub-pixel of the pixel structure in FIG. 1;

3 is a schematic diagram illustrating a pixel structure of an electroluminescent display panel according to a second preferred embodiment of the present invention;

FIG. 4 is a schematic diagram of a pixel structure of an electroluminescent display panel according to a third preferred embodiment of the present invention.

Figure number:

10 Pixel structure 12 Substrate

14 sub-pixel rows 16 sub-pixels

161 first pixel 162 second pixel

PL1 First Power Line PL2 Second Power Line

181 The first driver chip 182 The second driver chip

TFT1 first switching element TFT2 second switching element

Cst Storage Capacitor EL EL Electroluminescent Element

30 pixel structure 40 pixel structure

Detailed ways

In order to enable those skilled in the technical field of the present invention to further understand the present invention, the preferred embodiments of the present invention are enumerated below, together with the accompanying drawings, to describe in detail the composition and desired effects of the present invention.

Please refer to Figure 1. FIG. 1 is a schematic diagram of a pixel structure of an electroluminescence display panel according to a first preferred embodiment of the present invention. As shown in FIG. 1, the pixel structure 10 of the electroluminescent display panel of this embodiment is arranged on a substrate 12. The pixel structure 10 includes a plurality of sub-pixel rows 14, a plurality of first power lines PL1, and a plurality of second power lines PL1. Power cord PL2. In this embodiment, the sub-pixel row 14 is defined as a set of sub-pixels arranged along the row direction (vertical direction) of FIG. 1 . Each sub-pixel row 14 includes a plurality of sub-pixels 16, and each sub-pixel 16 at least includes a first-time pixel 161 and a second-sub-pixel 162, wherein the first-time pixel 161 and the second-sub-pixel 162 are used to display the same The sub-pixel picture, but the first-time pixel 161 and the second-time pixel 162 are electrically separated from each other, and can respectively receive different voltage signals. In addition, each first power line PL1 and each second power line PL2 are arranged between two adjacent sub-pixel rows 14, wherein each first power line PL1 is respectively connected to each sub-pixel row 14 on one side thereof. The first-time pixel 161 of the pixel 16 is electrically connected to the first-time pixel 161 of each sub-pixel 16 of the sub-pixel row 14 on the other side; each second power line PL2 is respectively connected to the second power line PL2 The second sub-pixel 162 of each sub-pixel 16 in one sub-pixel row 14 is electrically connected to the second sub-pixel 162 of each sub-pixel 16 in the other side of the sub-pixel row 14 . In addition, the first power line PL1 receives the first voltage signal provided by at least one first driver chip (first voltage source) 181, and the second power line PL2 receives the voltage signal provided by at least one second driver chip (second voltage source) 182. A second voltage signal is provided, and the first voltage signal is preferably different from the second voltage signal. In this embodiment, the first driving chip 181 is electrically connected to one end of each first power line PL1, whereby the first driving chip 181 can provide a first voltage signal from one end of each first power line PL1, and the second driving The chip 182 is electrically connected to one end of each second power line PL2 , so that the second driving chip 182 can provide a second voltage signal from one end of each second power line PL2 . In other words, one end of the first power line PL1 electrically connected to the first driver chip 181 is the VDD end, and the other end of the first power line PL1 is the VSS end; similarly, the second power line PL2 is electrically connected to the second driver chip 182 One end of the second power line PL2 is the VDD end, and the other end of the second power line PL2 is the VSS end. However, the relationship between the first voltage signal and the second voltage signal, the number of the first driving chip 181 and the second driving chip 182, the connection method between the first driving chip 181 and the first power line PL1, and the connection between the second driving chip 182 and the second driving chip 182 The connection method of the second power line PL2 is not limited thereto. For example, the first voltage signal and the second voltage signal can be the same voltage signal, or the first driver chip 181 can provide the first voltage signal from one end of each first power line PL1, and the second driver chip 182 can be on the substrate 12 relative to the other side of the first driver chip 181 is provided with a second voltage signal by one end of each second power line PL2, or the first driver chip 181 can also be provided with a first voltage signal by both ends of each first power line PL1 , and the second driver chip 182 can also provide a second voltage signal from both ends of each second power line PL2.

In this embodiment, the sub-pixels 16 of the sub-pixel row 14 located in the 2n-1th row are arranged sequentially in the order of the first-time pixel 161 and the second sub-pixel 162, and the sub-pixel row 14 located in the 2n-th row The sub-pixels 16 are arranged sequentially in the order of the second sub-pixel 162 and the first sub-pixel 161, and n is a positive integer greater than or equal to 1. For example, the sub-pixels 16 of the sub-pixel row 14 located in the first row are the first pixel 161, the second sub-pixel 162, the first pixel 161 in sequence from top to bottom, and so on. The sub-pixels 16 of the row 14 are the second sub-pixel 162 , the first sub-pixel 161 , the second sub-pixel 162 from top to bottom, and so on. In addition, the n-th first power line PL1 is located between the n-th sub-pixel row 14 and the n+1-th sub-pixel row 14, and the n-th second power line PL2 is located in the n-th sub-pixel row 14. Between the pixel row 14 and the sub-pixel row 14 of the n+1th row. For example, the first first power line PL1 is arranged between the sub-pixel row 14 in the first row and the sub-pixel row 14 in the second row, and the second first power line PL1 is arranged in the sub-pixel row 14 in the second row Between the row 14 and the sub-pixel row 14 of the third row, and so on, and the first second power line PL2 is arranged between the sub-pixel row 14 of the first row and the sub-pixel row 14 of the second row, and the first The two second power lines PL2 are disposed between the second sub-pixel row 14 and the third sub-pixel row 14 , and so on. In addition, in this embodiment, the sub-pixels 16 in the same sub-pixel row 14 have the same display color, and the sub-pixels 16 in two adjacent sub-pixel rows 14 have different display colors, but this does not mean that limit. For example, the sub-pixels 16 of the sub-pixel row 14 located in the 3n-2 row, including the first sub-pixel 161 and the second sub-pixel 162, all have the same display color, such as red, and the sub-pixels located in the 3n-1 row The sub-pixels 16 of the sub-pixel row 14, including the first pixel 161 and the second sub-pixel 162, all have the same display color, such as green, and the sub-pixels 16 of the sub-pixel row 14 located in the 3nth row, including the first Both the pixel 161 and the second sub-pixel 162 have the same display color, such as blue, where n is a positive integer greater than 1. In this way, the sub-pixels 16 in the same sub-pixel row 14 have the same display color, but the sub-pixels 16 in two adjacent sub-pixel rows 14 have different display colors.

Please refer to FIG. 2 again, and refer to FIG. 1 together. FIG. 2 is a schematic diagram of a single sub-pixel (such as a single first sub-pixel or a single second sub-pixel) of the pixel structure in FIG. 1 . As shown in FIG. 2, taking the first-time pixel 161 as an example, the first-time pixel 161 includes a first switching element TFT1, a second switching element TFT2, a storage capacitor Cst and an electroluminescent element EL, wherein the first The switch element TFT1 and the second switch element TFT2 can be, for example, thin film transistor elements, and the electroluminescent element EL can be, for example, an organic diode light emitting element, but not limited thereto. The gate of the first switching element TFT1 is electrically connected to a scan line SL, its source is electrically connected to a data line DL, and its drain is connected to the gate of the second switching element TFT2 and an electrode of the storage capacitor Cst electrical connection. The source of the second switching element TFT2 is electrically connected to the first power line PL1 and the other electrode of the storage capacitor Cst, and its drain is electrically connected to the electroluminescent element EL. When displaying, the signal transmitted by the scanning line SL will turn on the first switching element TFT1, and at this time, the signal transmitted by the data line DL will pass through the first switching element TFT1 and turn on the second switching element TFT2, and the storage capacitor Cst can maintain The turn-on time of the second switching element TFT2 is such that the first voltage signal provided by the first power line PL1 can pass through the second switching element TFT2 and drive the electroluminescent element EL to emit light.

The pixel structure 10 of the electroluminescent display panel in this embodiment is provided with a plurality of first power lines PL1 and second power lines PL2, wherein each first power line PL1 crosses with the primary pixels 161 on both sides thereof are electrically connected, and each second power line PL2 is also electrically connected to the second sub-pixels 162 on both sides thereof in a crossing manner. The voltage drop problem caused by only a single power line driving all the sub-pixels in the same row can be compensated by the above-mentioned connection method, so that the display picture can be uniformed and the display quality can be improved.

The implementation of the pixel structure of the electroluminescent display panel of the present invention is not the same as the above-mentioned embodiments. The following will describe other implementations of the pixel structure of the electroluminescent display panel of the present invention. In order to simplify the description and facilitate the comparison of the differences between the various embodiments, the various embodiments of the present invention use the same symbols to mark the same Components, the same parts of the various embodiments will not be repeated.

Please refer to Figure 3. FIG. 3 is a schematic diagram of a pixel structure of an electroluminescence display panel according to a second preferred embodiment of the present invention. As shown in FIG. 3 , in the pixel structure 30 of the electroluminescent display panel of this embodiment, the arrangement rules of the first sub-pixel 161 and the second sub-pixel 162 of the sub-pixel 16 are different from those of the first preferred embodiment. . More precisely, in this embodiment, the sub-pixels 16 of the sub-pixel rows 14 located in the 4n-3th row and the 4n-2th row are in the order of the first sub-pixel 161 and the second sub-pixel 162 Arrangement, the sub-pixels 16 located in the 4n-1th row and the sub-pixel row 14 located in the 4nth row are arranged sequentially in the order of the second sub-pixel 162 and the first-time pixel 161, and n is a positive integer greater than or equal to 1 . For example, the sub-pixels 16 of the sub-pixel row 14 located in the first row and the second row are sequentially from top to bottom the first pixel 161, the second sub pixel 162, the first pixel 161, and so on. ; The sub-pixels 16 of the sub-pixel row 14 located in the third row and the fourth row are the second sub-pixel 162 , the first sub-pixel 161 , the second sub-pixel 162 from top to bottom, and so on. In addition, the arrangement positions of the first power line PL1 and the second power line PL2 in this embodiment are also different from those in the first preferred embodiment. More precisely, the nth first power line PL1 is located between the 2nth sub-pixel row 14 and the 2n+1th subpixel row 14, and the nth second power line PL2 is located at the 2nth Between the sub-pixel row 14 of the first row and the sub-pixel row 14 of the 2n+1th row. For example, the first first power line PL1 and the first second power line PL2 are arranged between the second sub-pixel row 14 and the third sub-pixel row 14, and the second first power line PL1 and the second second power line PL2 are disposed between the fourth sub-pixel row 14 and the fifth sub-pixel row 14 , and so on.

Please refer to Figure 4. FIG. 4 is a schematic diagram of a pixel structure of an electroluminescent display panel according to a third preferred embodiment of the present invention. As shown in FIG. 4 , in the pixel structure 40 of the electroluminescent display panel of this embodiment, the sub-pixels 16 located in the same sub-pixel row 14 have the same display color, but the two adjacent sub-pixel rows 14 The sub-pixels 16 have different display colors. Different from the first preferred embodiment, each sub-pixel 16 of this embodiment does not further include a first-time pixel and a second-sub-pixel. In addition, the n-th first power line PL1 is located between the sub-pixel row 14 in the 2nth row and the sub-pixel row 14 in the 2n+1-th row, and the n-th second power line PL2 is located in the sub-pixel row 2n Between the row 14 and the sub-pixel row 14 of the 2n+1th row, and n is a positive integer greater than or equal to 1. For example, the first first power line PL1 and the first second power line PL2 are located between the second sub-pixel row 14 and the third sub-pixel row 14, and the second first power line PL1 The second power line PL2 is located between the fourth sub-pixel row 14 and the fifth sub-pixel row 14 , and so on. In addition, each first power line PL1 is electrically connected to part of the sub-pixels 16 in the sub-pixel row 14 on one side, and is electrically connected to a part of the sub-pixels 16 in the sub-pixel row 14 on the other side. The second power line PL2 is respectively electrically connected to a part of the sub-pixels 16 of the sub-pixel row 14 on one side thereof, and is electrically connected to a part of the sub-pixels 16 of the sub-pixel row 14 on the other side thereof. To be precise, the nth first power line PL1 is electrically connected to the sub-pixel 16 in the 2m-1th column of the 2nth sub-pixel row 14, and the nth first power line PL1 is electrically connected to the 2n+1th sub-pixel row 14. The sub-pixels 16 in the 2mth column of the sub-pixel row 14 of the first row are electrically connected, and the nth second power line PL2 is electrically connected to the sub-pixels 16 in the 2mth column of the 2nth sub-pixel row 14. The first power line PL2 is electrically connected to the sub-pixel 16 in the 2m−1th column of the 2n+1th sub-pixel row 14 , and m is a positive integer greater than or equal to 1. For example, the first power line PL1 of the first line is electrically connected to the sub-pixels 16 of the odd-numbered columns of the second row of sub-pixel rows 14, and the first first power line PL1 is connected to the third row of sub-pixel rows The sub-pixels 16 in the even-numbered columns of 14 are electrically connected, the first second power line PL2 is electrically connected to the sub-pixels 16 in the even-numbered columns of the second row of sub-pixel rows 14, and the first second power line PL2 It is electrically connected to the sub-pixels 16 of the odd-numbered columns of the sub-pixel row 14 in the third row, and so on.

To sum up, the pixel structure of the electroluminescent display panel of the present invention uses a plurality of first power lines and second power lines to respectively provide a first voltage signal and a second voltage signal, and make each power line connect with the Part of the sub-pixels on both sides are electrically connected to avoid the influence of the voltage signal drop caused by the resistance of the power line on the display screen, thus effectively improving the uniformity of the display screen of the electroluminescent display panel. In addition, by changing the connection position between the first driver chip and the first power line, the connection position between the second driver chip and the second power line, or adjusting the relationship between the first voltage signal and the second voltage signal, further Compensate the voltage drop caused by the resistance of the power line, and greatly improve the display quality.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (15)

1. A pixel structure of an electroluminescence display panel, characterized in that, the pixel structure of the electroluminescence display panel comprises: A plurality of sub-pixel rows, wherein each of the sub-pixel rows includes a plurality of sub-pixels, each of the sub-pixels includes a first-time pixel and a second-time pixel, and the first-time pixel of each of the sub-pixels electrically separated from the second sub-pixel; and A plurality of first power lines and a plurality of second power lines, wherein each of the first power lines and each of the second power lines is arranged between two adjacent rows of the sub-pixels, and each of the first The power line is respectively electrically connected to the first pixel of each of the sub-pixels in the row of sub-pixels on one side thereof, and is connected to each of the sub-pixels of the row of sub-pixels on the other side thereof Each of the second power supply lines is electrically connected to the second sub-pixel of each of the sub-pixels in the row of sub-pixels located on one side thereof, and to the second power line located at the The second sub-pixels of the sub-pixels in the sub-pixel row on the other side are electrically connected. 2. The pixel structure of the electroluminescence display panel according to claim 1, wherein each of the sub-pixels in the sub-pixel row located in the 2n-1th row uses the first-order pixel and the first-order pixel The order of the second sub-pixels is arranged in order, and each of the sub-pixels in the sub-pixel row located in the 2nth row is arranged in sequence in the order of the second sub-pixel and the first-time pixel, and n is greater than A positive integer equal to 1. 3. The pixel structure of the electroluminescence display panel according to claim 2, wherein the first power supply line of the nth line is located between the sub-pixel row of the nth row and the sub-pixel row of the n+1th row Between the sub-pixel rows, and the n-th second power supply line is located between the n-th sub-pixel row and the (n+1)-th sub-pixel row. 4. The pixel structure of the electroluminescent display panel according to claim 1, wherein each of the sub-pixels in the sub-pixel row located in the 4n-3th row uses the first-order pixel and the first-order pixel The order of the second sub-pixels is arranged in order, and each of the sub-pixels in the sub-pixel row located in the 4n-2th row is arranged in sequence in the order of the first-time pixel and the second sub-pixel, and the sub-pixels in the 4n-2th row are arranged in order. Each of the sub-pixels in the sub-pixel row of row 4n-1 is arranged sequentially in the order of the second sub-pixel and the first-time pixel, and each of the sub-pixel rows located in row 4n The sub-pixels are arranged sequentially in the order of the second sub-pixel and the first-time pixel, and n is a positive integer greater than or equal to 1. 5. The pixel structure of the electroluminescent display panel according to claim 4, wherein the first power supply line of the nth line is located between the sub-pixel row of the 2nth row and the sub-pixel row of the 2n+1th row Between the sub-pixel rows, and the nth second power supply line is located between the sub-pixel row of the 2nth row and the sub-pixel row of the 2n+1th row. 6. The pixel structure of an electroluminescent display panel according to claim 1, wherein the sub-pixels located in the same row of sub-pixels have the same display color, and two adjacent The sub-pixels of the sub-pixel row have different display colors. 7. The pixel structure of an electroluminescent display panel according to claim 1, wherein the first power line and the second power line respectively have a first voltage signal and a second voltage signal, and The first voltage signal is different from the second voltage signal. 8. A pixel structure of an electroluminescence display panel, characterized in that, the pixel structure of the electroluminescence display panel comprises: A plurality of sub-pixel rows, wherein each of the sub-pixel rows includes a plurality of sub-pixels, the sub-pixels located in the same sub-pixel row have the same display color, and two adjacent sub-pixel rows The sub-pixels of have different display colors; and A plurality of first power lines and a plurality of second power lines, wherein each of the first power lines and each of the second power lines is arranged between two adjacent rows of the sub-pixels, and each of the first The power lines are respectively electrically connected to part of the sub-pixels in the sub-pixel row on one side thereof, and electrically connected to part of the sub-pixels in the sub-pixel row on the other side thereof, each of the The second power lines are respectively electrically connected to part of the sub-pixels in the sub-pixel row on one side thereof, and electrically connected to part of the sub-pixels in the sub-pixel row on the other side thereof. 9. The pixel structure of an electroluminescence display panel according to claim 8, wherein when each of the sub-pixel rows includes a plurality of sub-pixels, each of the sub-pixels includes a first-time pixel and a first-time pixel The first sub-pixel and the second sub-pixel of each of the sub-pixels are electrically separated from each other. 10. The pixel structure of the electroluminescent display panel according to claim 9, wherein each of the sub-pixels in the sub-pixel row located in the 2n-1th row uses the first-order pixel and the The order of the second sub-pixels is arranged in order, and each of the sub-pixels in the sub-pixel row located in the 2nth row is arranged in sequence in the order of the second sub-pixel and the first-time pixel, and n is greater than A positive integer equal to 1. 11. The pixel structure of the electroluminescent display panel according to claim 10, wherein the first power supply line of the nth line is located between the sub-pixel row of the nth row and the sub-pixel row of the n+1th row Between the sub-pixel rows, and the n-th second power supply line is located between the n-th sub-pixel row and the (n+1)-th sub-pixel row. 12. The pixel structure of the electroluminescent display panel according to claim 9, wherein each of the sub-pixels in the sub-pixel row located in the 4n-3th row uses the first-order pixel and the first-order pixel The order of the second sub-pixels is arranged in order, and each of the sub-pixels in the sub-pixel row located in the 4n-2th row is arranged in sequence in the order of the first-time pixel and the second sub-pixel, and the sub-pixels in the 4n-2th row are arranged in order. Each of the sub-pixels in the sub-pixel row of row 4n-1 is arranged sequentially in the order of the second sub-pixel and the first-time pixel, and each of the sub-pixel rows located in row 4n The sub-pixels are arranged sequentially in the order of the second sub-pixel and the first-time pixel, and n is a positive integer greater than or equal to 1. 13. The pixel structure of the electroluminescent display panel according to claim 12, wherein the first power supply line of the nth line is located between the sub-pixel row of the 2nth row and the sub-pixel row of the 2n+1th row Between the sub-pixel rows, and the nth second power supply line is located between the sub-pixel row of the 2nth row and the sub-pixel row of the 2n+1th row. 14. The pixel structure of an electroluminescent display panel according to claim 8, wherein the first power supply line of the nth line is located between the sub-pixel row of the 2nth row and the sub-pixel row of the 2n+1th row Between the sub-pixel rows, and the second power supply line of the nth row is located between the sub-pixel row of the 2nth row and the sub-pixel row of the 2n+1th row, and n is greater than or equal to 1 positive integer. 15. The pixel structure of the electroluminescent display panel according to claim 14, wherein the nth first power supply line is connected to the 2m-1th column of the 2nth row of the sub-pixel row The sub-pixels are electrically connected, the first power line of the nth line is electrically connected with the sub-pixels in the 2mth column of the sub-pixel row in the 2n+1th row, and the second power line of the nth The power supply line is electrically connected to the sub-pixel in the 2mth column of the sub-pixel row in the 2nth row, and the second power supply line in the nth row is connected to the 2mth column of the sub-pixel row in the 2n+1th row. The sub-pixels in -1 column are electrically connected, and m is a positive integer greater than or equal to 1.

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